Bit banging
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Bit banging is a term of art that describes a method of digital data transmission as using general-purpose input/output (GPIO) instead of computer hardware that is intended specifically for data communication.[1] Controlling software is responsible for satisfying protocol requirements including timing which can be challenging due to limited host system resources and competing demands on the software.
In contrast, dedicated communication hardware (e.g., UART, SPI, I²C) satisfies protocol requirements which tends to reduce the runtime load on the controlling system Template:Endash software and its host processor. In particular, some communication hardware provides data buffering to lower the runtime load of the controlling system.
The bit banging method may allow a computer to support a protocol with limited or no hardware changes and therefore bit banging can be a lower cost option since changing software is typically less expensive than changing hardware.
Bit banging is commonly used in embedded systems.[2]
Choosing between bit banging and dedicated communication hardware involves trade-offs between load, performance and reliability on one hand, and availability of hardware on the other. Bit banging consumes more processing resources than using dedicated hardware. The processor spends much of its time controlling data lines which precludes other processing. Also, bit banging typically results in a lower quality signal Template:Endash with more jitter and glitches Template:Endash especially if the processor is performing other tasks simultaneously. However, if the software is interrupt-driven by the signal, the signal quality may be better, especially if control signals such as RTS, CTS, or DCD are available. Bit banging may be the only solution when dedicated communication hardware is not available.
Example
The following C language code example transmits a byte of data on an SPI bus via bit banging.
void send_8bit_serial_data(unsigned char data)
{
// select device (active low)
output_low(SD_CS);
// send bits 7..0
for (int i = 0; i < 8; i++)
{
// consider leftmost bit
// set line high if bit is 1, low if bit is 0
if (data & 0x80)
output_high(SD_DI);
else
output_low(SD_DI);
// pulse the clock state to indicate that bit value should be read
output_low(SD_CLK);
delay();
output_high(SD_CLK);
// shift byte left so next bit will be leftmost
data <<= 1;
}
// deselect device
output_high(SD_CS);
}
See also
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