Tensilica

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Products

Script error: No such module "Unsubst". Cadence Tensilica develops SIP blocks to be included in chip (IC) designs of products of their licensees, such as system on a chip architectures for embedded systems. Tensilica processors are delivered as synthesizable RTL to aid integration with other designs.

Xtensa configurable cores

Xtensa processors range from small, low-power cache-less microcontroller to more performance-oriented SIMD processors, multiple-issue VLIW DSP cores, and neural network processors.[3] Cadence standard DSPs are based on the Xtensa architecture.[4] The architecture offers a user-customizable instruction set through automated customization tools that can extend the base instruction set, including and not limited to, addition of new SIMD instructions and register files.[5][6]

Xtensa instruction set

The Xtensa instruction set is a 32-bit architecture with a compact 16- and 24-bit instruction set. The base instruction set has 82 RISC instructions and includes a 32-bit ALU, 16 general-purpose 32-bit registers, and one special-purpose register.[7]

Audio and voice DSP IP

File:Cadence Tensilica HiFi 2.svg
Simplified block diagrams of HiFi audio engine and Xtensa LX

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  • HiFi Mini Audio DSP — A small low power DSP core for voice triggering and voice recognition[8]
  • HiFi 2 Audio DSP — DSP core for low power MP3 audio processing[9]
  • HiFi EP Audio DSP — A superset of HiFi 2 with optimizations for DTS Master Audio, voice pre- and post-processing, and cache management[10]
  • HiFi 3 Audio DSP — 32-bit DSP for audio enhancement algorithms, wideband voice codecs, and multi-channel audio[11]
  • HiFi 3z Audio DSP — For lower-powered audio, wideband voice codecs, and neural-network-based speech recognition.[12]
  • HiFi 4 DSP - Higher performance DSP for applications such as multi-channel object-based audio standards.[13]
  • HiFi 5 DSP - For digital assistants, infotainment, and voice-controlled products.[14]

Vision DSPs

Adoption

History

  • In 1997, Tensilica was founded by Chris Rowen.
  • Five years later, Tensilica released support for flexible length instruction encodings, known as FLIX.
  • By 2013, Cadence Design Systems acquired 100% of Tensilica.

Company name

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References

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  1. Script error: No such module "citation/CS1".
  2. Source: http://ip.cadence.com/news/432/330/Cadence-Reports-First-Quarter-2013-Financial-Results-and-Completes-Acquisition-of-Tensilica
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  5. https://0x04.net/~mwk/doc/xtensa.pdf §1.2.2
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  7. https://0x04.net/~mwk/doc/xtensa.pdf Chapter 3 "Core Architecture"
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External links

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