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  • [[Category:SPARC microprocessors]] ...
    63 bytes (6 words) - 11:46, 28 September 2011
  • [[Category:SPARC microprocessors]] ...
    63 bytes (6 words) - 11:50, 28 September 2011
  • | arch = [[SPARC]] V7 ...d instruction set computer|RISC]] [[central processing unit|processor]] ([[SPARC]] V7 specification) developed for space applications. It was developed by [ ...
    2 KB (229 words) - 14:13, 4 June 2023
  • | arch = [[SPARC]] * S1 Core only has one 64-bit [[SPARC]] Core (supporting one to four independent threads of execution) instead of ...
    2 KB (249 words) - 05:27, 19 October 2024
  • ...Set''', or '''VIS''', is a [[SIMD]] instruction set extension for [[SPARC|SPARC V9]] [[microprocessor]]s developed by [[Sun Microsystems]]. There are five ...[UltraSPARC]] microprocessor (1995) and by Fujitsu in their [[SPARC64 GP]] microprocessors (2000). ...
    4 KB (535 words) - 02:52, 26 September 2025
  • ...hardware]] project, started in December 2005, for CPUs implementing the [[SPARC]] instruction architecture. The initial contribution to the project was [[S {{Soft microprocessors}} ...
    3 KB (344 words) - 11:15, 16 June 2025
  • ...[[LSI Corporation]], and [[Sun Microsystems]]. It was an evolution Sun's [[SPARC]] [[RISC]] [[computer architecture|architecture]] with features geared towa [[Category:SPARC microprocessors]] ...
    2 KB (274 words) - 21:21, 24 February 2024
  • | arch = [[SPARC V9]] ...id-1995. It is the first microprocessor from Sun to implement the 64-bit [[SPARC V9]] [[instruction set architecture]] (ISA). [[Marc Tremblay]] was a co-mic ...
    4 KB (560 words) - 22:09, 16 April 2025
  • | arch = [[SPARC|SPARC V9]] ...generation of UltraSPARC microprocessors, and implement the 64-bit [[SPARC|SPARC V9]] [[instruction set architecture]] (ISA). The UltraSPARC IV was original ...
    6 KB (730 words) - 22:09, 16 April 2025
  • * [[SPARC T series]], a range of multi-core microprocessors made by Sun Microsystems and Oracle ...
    1 KB (178 words) - 19:32, 27 May 2025
  • | platform = [[SPARC]], [[DEC Alpha|Alpha]], [[PowerPC]], [[IA-32]] ...microprocessor]]s. Ports of the compiler have been made for [[PowerPC]], [[SPARC]], [[x86]], and [[DEC Alpha|Alpha]] processors. ...
    3 KB (446 words) - 00:40, 11 February 2025
  • | arch = [[SPARC V9]] | successor = [[SPARC T3]] ...
    10 KB (1,377 words) - 22:09, 16 April 2025
  • ...emiconductor]] design and manufacturing company, specializing in [[SPARC]] microprocessors. It was founded in [[Austin, Texas]] in August 1988 by Dr. Roger D. Ross, ...ed not to compromise proprietary information regarding the 68000 and 88000 microprocessors. The lawsuit was settled in October.<ref>"Motorola Sues Defecting 88000 Des ...
    9 KB (1,381 words) - 10:04, 26 March 2025
  • ...intent to develop a high-performance [[microprocessor]] implementing the [[SPARC]] architecture prompted [[Fujitsu]] to fund the company in 1991. $40.2 mill ...icrosystems]]' [[UltraSPARC|UltraSPARC I]] by a few months to be the first SPARC V9 microprocessor produced. ...
    5 KB (725 words) - 11:24, 13 November 2025
  • ...SPARCstation 20]] workstations. The bus permits the integration of several microprocessors on a single motherboard, in a [[multiprocessing]] configuration with up to .../www.thefreelibrary.com/hyperSPARC+GOES+HOLLYWOOD%3b+PIXAR+USES+hyperSPARC+MICROPROCESSORS+FROM...-a017824466 |date=2012-10-20 }}.</ref> ...
    3 KB (477 words) - 22:12, 16 April 2025
  • ...r [[Sun-3]] series, but employing [[microprocessor]]s based on Sun's own [[SPARC]] V7 [[RISC]] architecture in place of the [[68k]] family processors of pre ...an engineering context to identify the basic hardware architecture of all SPARC-based Sun systems. ...
    7 KB (1,020 words) - 19:06, 24 April 2025
  • | caption = [[Moscow Center of SPARC Technologies]] designed a laptop for military and industrial purpose. In 1992, a spin-off company [[Moscow Center of SPARC Technologies]] (MCST) was created and continued development, using the "Elb ...
    13 KB (1,641 words) - 14:42, 6 December 2025
  • ...ate (DDR) buses (AMD Athlon and Duron) and quad-data rate buses (all Intel microprocessors starting from Pentium 4) the effective bus speed should be divided by 2 for ...y CPU design. While these qualification samples and majority of production microprocessors cannot be overclocked by increasing their clock multiplier, they still can ...
    7 KB (996 words) - 11:28, 19 August 2024
  • | arch = [[SPARC V9]] ...omputer Systems]] and fabricated by [[Fujitsu]]. It implements the [[SPARC|SPARC V9]] [[instruction set architecture]] (ISA), the first microprocessor to do ...
    13 KB (1,937 words) - 15:04, 14 February 2024
  • ...Systems|defunct = 1996|type = Private|industry = Semiconductors|products = microprocessors, chipset|location = [[San Jose, California]]}} ...Weitek's WTL 1167]][[File:KL Weitek SPARC Power uP.jpg|thumb|180px|Weitek SPARC Power μP]] ...
    9 KB (1,251 words) - 07:58, 19 May 2025
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