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	<title>Synchronous Backplane Interconnect - Revision history</title>
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	<updated>2026-10-26T01:42:31Z</updated>
	<subtitle>Revision history for this page on the wiki</subtitle>
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		<id>http://debianws.lexgopc.com/wiki143/index.php?title=Synchronous_Backplane_Interconnect&amp;diff=2411188&amp;oldid=prev</id>
		<title>imported&gt;Coldupnorth: update template #JUN25</title>
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		<updated>2025-06-01T10:56:11Z</updated>

		<summary type="html">&lt;p&gt;update template #JUN25&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;{{Short description|Internal processor-memory bus}}&lt;br /&gt;
{{Notability|date=June 2025}}&lt;br /&gt;
The &amp;#039;&amp;#039;&amp;#039;Synchronous Backplane Interconnect&amp;#039;&amp;#039;&amp;#039; (&amp;#039;&amp;#039;&amp;#039;SBI&amp;#039;&amp;#039;&amp;#039;) was the internal processor-memory bus used by early [[VAX]] computers manufactured by the [[Digital Equipment Corporation]] of [[Maynard, Massachusetts]].&amp;lt;ref name=&amp;quot;o148&amp;quot;&amp;gt;{{cite book | last=Rus | first=Teodor | last2=Rus | first2=Daniela | title=Systems Methodology for Software | publisher=World Scientific | publication-place=Singapore ; River Edge, NJ | date=1993 | isbn=978-981-02-1254-4 | page=151}}&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
The bus was implemented using [[Schottky transistor|Schottky]] [[Transistor-transistor logic|TTL]] logic levels and allowed [[multiprocessor]] operation.&lt;br /&gt;
&lt;br /&gt;
==References==&lt;br /&gt;
{{Reflist}}&lt;br /&gt;
&lt;br /&gt;
[[Category:Computer buses]]&lt;br /&gt;
[[Category:DEC hardware]]&lt;br /&gt;
&lt;br /&gt;
{{Digital Equipment Corporation}}&lt;br /&gt;
{{Compu-hardware-stub}}&lt;/div&gt;</summary>
		<author><name>imported&gt;Coldupnorth</name></author>
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