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{{Short description|Processor using Java bytecode as its instruction set}}
A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a [[high-level language computer architecture]], and were "an attractive choice for building embedded and real-time systems that are programmed in Java".<ref name=Binder>{{cite book |last1=Binder |first1=Walter |last2=Schoeberl |first2=Martin |last3=Moret |first3=Philippe |last4=Villazon |first4=Alex |title=2008 Fifth International Conference on Quantitative Evaluation of Systems |chapter=Cross-Profiling for Embedded Java Processors |date=September 2008 |pages=287–296 |doi=10.1109/QEST.2008.39|isbn=978-0-7695-3360-5 |s2cid=16966639 }}</ref> However, as of 2017, embedded Java is no longer common and no realtime Java chip vendors exist.<ref>{{cite web |title=Systronix Home |url=http://www.systronix.com/ |website=www.systronix.com |access-date=6 June 2022 |archive-url=https://web.archive.org/web/20170818062055/http://www.systronix.com/ |archive-date=18 August 2017}}</ref>

== Implementations ==
There are several research Java processors tested on [[Field-programmable gate array|FPGA]], including:

*[[picoJava]] was the first attempt to build a Java processor, by [[Sun Microsystems]]. Its successor picoJava-II was freely available under the [[Sun Community Source License]],<ref name=Binder/> and is still available from some archives.
*{{Proper name|jHISC}}<ref>{{Cite journal| doi = 10.1016/j.micpro.2005.12.007| title = A Java processor with hardware-support object-oriented instructions| year = 2006| last1 = Yiyu | first1 = T.| last2 = Wanyiu | first2 = L.| last3 = Chihang | first3 = Y.| last4 = Li | first4 = R.| last5 = Fong | first5 = A.| journal = Microprocessors and Microsystems| volume = 30| issue = 8| pages = 469 }}</ref> provides hardware support for object-oriented functions
*[[Java Optimized Processor]]<ref>{{Cite journal| first1 = M.| title = A Java processor architecture for embedded real-time systems| last1 = Schoeberl| journal = Journal of Systems Architecture| volume = 54| issue = 1–2| pages = 265–286| year = 2008 | doi = 10.1016/j.sysarc.2007.06.001| citeseerx = 10.1.1.68.8757}}</ref> for [[FPGA]]s. A PhD thesis is [https://web.archive.org/web/20120204093123/http://www.jopdesign.com/thesis/index.jsp available], and it has been used in several commercial applications.<ref name=Binder/> In 2019 it was extended to be energy aware (EAJOP).<ref>{{cite book |last1=Tewary |first1=Manish |last2=Malik |first2=Avinash |last3=Salcic |first3=Zoran |last4=Biglari-Abhari |first4=Morteza |chapter=An Energy Efficient Embedded Processor for Hard Real-Time Java Applications |title=Architecture of Computing Systems – ARCS 2019 |series=Lecture Notes in Computer Science |date=2019 |volume=11479 |pages=281–292 |doi=10.1007/978-3-030-18656-2_21|isbn=978-3-030-18655-5 |s2cid=153311249 |hdl=2292/62302 |hdl-access=free }}</ref>

Some commercial implementations included:
* The aJile processor was the most successful [[ASIC]] Java processor.<ref name=Binder/>
* Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless<ref>"Imsys hedges bets on Java: [[Microcode#Writable control store| rewritable-microcode]] chip has instruction sets for Java, Forth, C/C++"]
by Tom R. Halfhill
[http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf] {{Webarchive|url=https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf|date=2008-11-19}}</ref>
* [[ARM9E|ARM926EJ-S]] was an ARM processor able to run Java bytecode, this technology being named ''[[Jazelle]]''.

==See also==
* [[Java Card]]

==References==
{{Reflist}}

[[Category:Java virtual machine]]
[[Category:High-level language computer architecture]]

Java processor - Revision history