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{{Short description|Computer series from British company ICL}}
{{Use dmy dates|date=April 2022}}
The '''ICL Series 39''' was a range of [[mainframe computer|mainframe]] and [[minicomputer]] [[computer]] systems released by the UK manufacturer [[International Computers Limited|ICL]] in 1985. The original Series 39 introduced the "S3L" (whose corrupt pronunciation resulted in the name "Estriel"<ref name="campbell-kelly">{{ cite book | url=https://archive.org/details/iclbusinesstechn0000camp/mode/2up | title=ICL: A Business and Technical History | publisher=Oxford University Press | last1=Campbell-Kelly | first1=Martin | date=1989 | access-date=30 May 2024 | isbn=0-19-853918-5 }}</ref>{{rp|pages=341}}) processors and [[microcode]]s, and a nodal architecture, which is a form of [[Non-Uniform Memory Access]].

== Origins ==
The Series 39 range was based upon the '''New Range''' concept and the [[ICL VME|VME]] operating system from the company's [[ICL 2900 Series|ICL 2900]] line, and was introduced as two ranges:
* Series 39 "Estriel" systems (Series 39 Level 40 and above, including multinodes), which replaced previous mid-range and large processors from the 2900 range, and needed a full computer room environment
* Series 39 DM1 systems (up to Series 39 Level 30), which were intended to replace the smaller processors such as the ICT1901/2, the ICL2903/4 and the ME29 ranges. These brought mainframe class operating system facilities into the office environment, a first for ICL.

== Design ==
The original Series 39 introduced the "S3L" processors and microcodes, and a nodal architecture (see [[ICL VME]]) which is a form of [[Non-Uniform Memory Access]] which allowed nodes to be up to {{convert|1000|m}} apart.

The Series 39 range introduced Nodal Architecture, a novel implementation of [[distributed shared memory]] that can be seen as a hybrid of a [[multiprocessor]] system and a [[computer cluster|cluster]] design. Each machine consists of a number of [[node (networking)|nodes]], and each node contains its own order-code processor and main memory. [[Virtual machine]]s are typically located (at any one time) on one node, but have the capability to run on any node and to be relocated from one node to another. Discs and other peripherals are shared between nodes. Nodes are connected using a high-speed optical bus (Macrolan) using multiple [[fibre optic]] cables, which is used to provide applications with a virtual shared memory. Memory segments that are marked as shared (public or global segments) are replicated to each node, with updates being broadcast over the inter-node network. Processes which use unshared memory segments (nodal or local) run in complete isolation from other nodes and processes.<ref name="warboys198505">{{ cite journal | url=https://archive.org/details/ICL-Technical-Journal-v04i03/page/236/mode/2up | title=VME nodal architecture: a model for the realisation of a distributed system concept | journal=ICL Technical Journal | last1=Warboys | first1=B. C. | date=May 1985 | access-date=28 May 2024 | volume=4 | issue=3 | pages=236–247 }}</ref>

The [[Semaphore (programming)|semaphore instructions]] prove their worth by controlling access to the shared writable memory segments while allowing the contents to be moved around efficiently.

Overall, a well configured Series 39 with VME had an architecture which can provide a significant degree of proofing against disasters, a nod to the abortive [[ICL VME#Origins|VME/T]] ideas of the previous decade.

All Series 39 machines were supported by a set of waist height peripheral 'Cabinets' (connected via fibre optic cables via one or more Multi Port Switch Units or MPSU's) providing disk storage capabilities:-
* Cabinet 2 - these were the main Disk Storage Cabinets holding a pair of 330Mb 8-inch "Swallow" Hard Drives
* Cabinet 3 - these were an expansion cabinet to the Cabinet 2 and could hold up to four more 330Mb 8-inch "Swallow" Hard Drives
* Cabinet 4 - these were a bridge cabinet would was used to connect Series 39 to older 2900 Diskpack based Storage (such as EDS200's)

Cabinet 1 was the name given to the DM1 Series 39 Level 30 (and 20/15/25/35 variants) core system.

All Series 39 machines also featured a Node Support Computer (NSC) hosted on their Storage Motherboards - this was [[x86 architecture]] and acted much like today's ILO or DRAC cards on [[HP Inc.|HP]]/[[Dell]] Servers and allowed Support Staff to manage the Nodes remotely including the ability to completely stop and restart the main Nodes.

== Evolution ==

In the mid-1980s the Series 39 Level 30 was supplemented by a Level 20 variant which was a forcibly underclocked Level 30 (using wire links on a daughterboard). In the late 80s these were both replaced by Level 15, 25 and 35 variants which also carried various levels of clocking state but featured more memory than their predecessors and could also be fitted with Dual OCP and IOC motherboards for even more computing and I/O capability.

The early 1990s saw upgrades to the Series 39 range. DX System products were introduced to replace the DM1 systems, appearing in product line-ups already in late 1991.<ref name="computerworld19911118_mainframes">{{ cite magazine | url=https://archive.org/details/sim_computerworld_1991-11-18_25_46/page/n90/mode/1up | title=Mainframes | magazine=Computerworld | last1=Gannon | first1=Susan | date=18 November 1991 | access-date=30 May 2024 | pages=71–75,78–81,84 }}</ref>{{rp|pages=84}} The Essex project led to the introduction of the SX System products in 1990 to replace the Estriel ("S3L") systems.<ref name="icl199011_foreword">{{ cite journal | url=https://archive.org/details/ICL-Technical-Journal-v07i02/page/194/mode/2up | title=The New SX Models | journal=ICL Technical Journal | last1=Hinchliffe | first1=T. A. | date=November 1990 | access-date=30 May 2024 | volume=7 | issue=2 | pages=194–196 }}</ref> These machines featured a new "very sophisticated pipelined processor" design that provided support for the ICL 2900 [[Instruction set|order code]] by employing a low-level "implementation order code" known as Picode. Picode is comparable to [[microcode]] but operates at much higher level than microcode from earlier machines and at a slightly lower level than ICL 2900 instructions, operating within similar constraints to those applying to conventional machine instructions. Picode instruction sequences are fed into [[instruction pipeline]]s and provide atomic results, being uninterruptable.<ref name="icl199011_architecture">{{ cite journal | url=https://archive.org/details/ICL-Technical-Journal-v07i02/page/197/mode/1up | title=The SX Node Architecture | journal=ICL Technical Journal | last1=Eaton | first1=J. R. | last2=Alit | first2=G. | last3=Hughes | first3=K. | date=November 1990 | access-date=30 May 2024 | volume=7 | issue=2 | pages=197–211 }}</ref>

== Replacement ==

The Series 39 SX and DX products were replaced by the SY and DY products respectively, these comprising the '''Trimetra''' range along with LY products. The SY node architecture abandoned [[Emitter-coupled logic|ECL]] in favour of [[CMOS]] technology, introduced support for symmetric multiprocessing involving up to four instruction processors per node, refined the instruction processing architecture, and provided cheaper multi-node connectivity.<ref name="icl199705_sy">{{ cite journal | url=https://archive.org/details/ICL-Technical-Journal-v12i01/page/41/mode/2up | title=The SY Node Design | journal=ICL Systems Journal | last1=Allt | first1=G. | last2=DeSyllas | first2=P. | last3=Duxbury | first3=M. | last4=Hughes | first4=K. | last5=Lo | first5=K. | last6=Lysons | first6=J. S. M. | last7=Rose | first7=P. V. | date=May 1997 | access-date=23 June 2024 | volume=12 | issue=1 | pages=41–72 }}</ref>

In contrast, the Trimetra DY system sought to use commodity hardware to provide OpenVME support through the use of emulation techniques. ICL's Millennium vision, as realised by Trimetra, entailed the provision of OpenVME in the form of an OpenVME Subsystem (OVS) alongside [[Microsoft Windows NT]] or [[SCO UnixWare]] running in a UnixWare/NT Subsystem (UNS). Whereas Trimetra SY and LY (a reduced footprint product based on SY) employed dedicated hardware to provide OVS functionality, alongside a Fujitsu-supplied Intel processor module providing UNS functionality, Trimetra DY offered an approach that supported either OVS or UNS functionality running entirely on an Intel processor system. To provide OVS, an emulator for the SY instruction set, together with input/output functionality and a platform abstraction layer, were deployed on the [[VxWorks]] operating system.<ref name="icl1998_dy">{{ cite journal | url=https://archive.org/details/ICL-Technical-Journal-v13i01/page/36/mode/1up | title=Trimetra DY and the Emulation of OpenVME on Intel Hardware | journal=ICL Systems Journal | last1=Brightwell | first1=Andrew | date=Autumn 1998 | access-date=23 June 2024 | volume=13 | issue=1 | pages=36–48 }}</ref>

With ICL having identified markets seeking higher-performance Unix or NT systems without a need for OpenVME compatibility, introducing the Trimetra Xtraserver product featuring from four to twelve 200 MHz Pentium Pro processors,<ref name="icl1998_xtraserver">{{ cite journal | url=https://archive.org/details/ICL-Technical-Journal-v13i01/page/61/mode/2up | title=Trimetra Xtraserver | journal=ICL Systems Journal | last1=Messham | first1=David | date=Autumn 1998 | access-date=23 June 2024 | volume=13 | issue=1 | pages=61–69 }}</ref> Trimetra in turn was replaced by Fujitsu's mainframe platform, '''Nova''', providing the Trimetra architecture on generic [[Unisys]] [[ES7000]] [[Intel]]-based server hardware.

Nova itself was phased out in 2007 and replaced with '''SuperNova''', which runs OpenVME on top of Windows Server or Linux, using as few as two CPUs on generic [[Wintel]] server hardware.

The transition of the "ICL mainframe" to a pure software product was thus complete, enabling [[Fujitsu]] to concentrate on VME support and development without having to keep up with hardware technology.

== Notes ==
{{Reflist}}

== References ==
* SERIES 39 - An Introduction to VME. Marion and Richard Norris. ICL 1991 R30303/02.
* [https://web.archive.org/web/20070928211005/http://www.vmesupport.net/brochures/nova5data.pdf Datasheet Trimetra NOVA 5] Fujitsu 2006.
* [https://web.archive.org/web/20070928211223/http://www.vmesupport.net/brochures/superNOVAWP.pdf Introduction to superNOVA architecture] Fujitsu 2005
* [https://ieeexplore.ieee.org/document/181513 R. Whetton, M. Jones and D. Murray, "The use of Ward and Mellor Structured Methodology for the design of a complex real time system," IEE Colloquium on Computer Aided Software Engineering Tools for Real-Time Control, 1991, pp. 5/1-5/4.]

{{ICL hardware|39}}

[[Category:Computing platforms]]
[[Category:ICL mainframe computers|39]]
[[Category:32-bit computers]]
[[Category:Computer-related introductions in 1985]]

ICL Series 39 - Revision history

imported>Akira625: Added links, removed dead links.