imported>The Eloquent Peasant: Importing Wikidata short description: "Program that simulates the execution of computer architecture"

2025-03-25T12:43:02Z

Importing Wikidata short description: "Program that simulates the execution of computer architecture"

New page

{{Short description|Program that simulates the execution of computer architecture}}
{{Refimprove|date=December 2013}}
A '''computer architecture simulator''' is a [[Computer program|program]] that simulates the [[Execution (computing)|execution]] of [[computer architecture]].

Computer architecture simulators are used for the following purposes:
* Lowering cost by evaluating hardware designs without building physical hardware systems.
* Enabling access to unobtainable hardware.
* Increasing the precision and volume of computer performance data.
* Introducing abilities that are not normally possible on real hardware such as running code backwards when an error is detected or running in faster-than-[[Real-time computing|real time]].

==Categories==

Computer architecture simulators can be classified into many different categories depending on the context.
* '''Scope''': [[Microarchitecture simulation|Microarchitecture simulators]] model the [[microprocessor]] and its components. Full-system simulators also model the processor, memory systems, and I/O devices.
* '''Detail''': Functional simulators, such as [[instruction set simulator]]s, achieve the same function as modeled components. They can be simulated faster if timing is not considered. Timing simulators are functional simulators that also reproduce timing. Timing simulators can be further categorized into digital cycle-accurate and analog sub-cycle simulators.
* '''Workload''': Trace-driven simulators (also called event-driven simulators) react to pre-recorded streams of instructions with some fixed input. Execution-driven simulators allow dynamic change of instructions to be executed depending on different input data.

===Full-system simulators===

A '''full-system simulator''' is execution-driven architecture simulation at such a level of detail that complete software stacks from real systems can run on the simulator without any modification. A full system simulator provides virtual hardware that is independent of the nature of the host computer. The full-system model typically includes [[processor core]]s, [[peripheral device]]s, [[computer memory|memories]], interconnection buses, and [[computer networking|network]] connections. [[Emulator]]s are full system simulators that imitate obsolete hardware instead of under development hardware.

The defining property of full-system simulation compared to an [[Instruction Set Simulator|instruction set simulator]] is that the model allows real [[Device driver wrapper|device drivers]] and [[operating system]]s to be run, not just single programs. Thus, full-system simulation makes it possible to simulate individual computers and networked computer nodes with all their [[software]], from network device drivers to operating systems, [[network stack]]s, [[middleware]], [[Server (computing)|server]]s, and [[application program]]s.

Full system simulation can speed the system development process by making it easier to detect, recreate and repair flaws. The use of [[multi-core processor]]s is driving the need for full system simulation, because it can be extremely difficult and time-consuming to recreate and debug errors without the controlled environment provided by virtual hardware.<ref>[http://www.ddj.com/184406408 Debugging and Full System Simulation]</ref> This also allows the software development to take place before the hardware is ready,<ref>{{cite web|year=2009|author=Vania Joloboff|url=http://www.irisa.fr/archi09/joloboff.pdf|title=Full System Simulation of Embedded Systems|access-date=2013-03-06|archive-url=https://web.archive.org/web/20140209190242/http://www.irisa.fr/archi09/joloboff.pdf|archive-date=2014-02-09|url-status=dead}}</ref> thus helping to validate design decisions.

===Cycle-accurate simulator===

A '''cycle-accurate simulator''' is a computer program that simulates a [[microarchitecture]] on a cycle-by-cycle basis. In contrast an [[instruction set simulator]] simulates an [[instruction set architecture]] usually faster but not cycle-accurate to a specific implementation of this architecture; they are often used when emulating older hardware, where time precision is important for legacy reasons. Often, a cycle-accurate simulator is used when designing new microprocessors{{spaced ndash}}they can be tested, and benchmarked accurately (including running full operating system, or compilers) without actually building a physical chip, and easily change design many times to meet expected plan.

Cycle-accurate simulators must ensure that all operations are executed in the proper virtual (or real if it is possible) time{{spaced ndash}}branch prediction, cache misses, fetches, pipeline stalls, thread context switching, and many other subtle aspects of microprocessors.

==See also==
* [[Instruction set simulator]]

==References==
<references />

==External links==
*The Archer virtual infrastructure for computer architecture simulation
*{{cite web|url=http://www.mikrocodesimulator.de/index_eng.php |title=Mikrocodesimulator MikroSim 2010 |publisher=0/1-SimWare |access-date=2010-12-06}}

[[Category:Simulation software]]
[[Category:Computer architecture]]

Computer architecture simulator - Revision history

imported>The Eloquent Peasant: Importing Wikidata short description: "Program that simulates the execution of computer architecture"