View source for Table of AMD processors

{{short description|none}}
{{sort-under}}
{|class="wikitable sortable sort-under" style="font-size: 85%; text-align: center;"
|-
! rowspan=2 | [[Microarchitecture|Architecture]]
! rowspan=2 | [[Semiconductor device fabrication|Fabrication<br />(nm)]]
! rowspan=2 | Family
! rowspan=2 | Release Date
! rowspan=2 | Code name
! rowspan=2 | Model Group
! rowspan=2 | Cores
! rowspan="2" |[[Simultaneous multithreading|SMT]]
! rowspan=2 | [[Clock rate]] ([[Hertz|MHz]])
! rowspan=2 | [[Bus (computing)|Bus]] Speed<br />&&nbsp;Type{{efn|name="bus"}}
! colspan=3 | Cache
! rowspan=2 | [[CPU socket|Socket]]
! rowspan=2 | Memory Controller
! colspan="4" | Features
|-
! [[CPU cache|L1]]
! [[CPU cache|L2]]
! [[CPU cache|L3]]
! [[SIMD]]
! Speed/Power
! Other
! Changes
|-
!| Am386
|
| [[Am386]]
|
| Sx/SxL/SxLV<ref name="Am386SX">{{cite web |url = https://www.amd.com/epd/processors/6.32bitproc/10.am386fami/18.am386sx/a21020/21020.pdf | title = Am386 SX/SXL/SXLV |accessdate = 2008-08-29 | publisher=[[Advanced Micro Devices]]}}</ref>
|
| 1
| {{No}}
| 25–40<ref name="Am386SX" />
| <br />FSB
|
|
|
| 100 PQFP<ref name="Am386SX" />
| {{n/a|[[Northbridge (computing)|discrete]]}}
|
|
|
|
|-
! rowspan=2| Am486<ref name="Am486">{{cite web |url=https://www.amd.com/epd/processors/6.32bitproc/11.am486fami/12.am486dx/20037/20037.pdf |title=Am486 DE2 |accessdate=2008-08-29 |publisher=[[Advanced Micro Devices]] |archiveurl=https://web.archive.org/web/20080302202606/http://www.amd.com/epd/processors/6.32bitproc/11.am486fami/12.am486dx/20037/20037.pdf |archivedate=2008-03-02 |url-status=dead}}</ref>
| 500, 350
| [[Am486]]
|
| 
| 
| rowspan="2" | 1
| rowspan="2" {{No}}
| 25–120
| <br />FSB
| 8
|
|
| 168 pin [[Pin grid array|PGA]]<br />208 SQFP
| rowspan=2 {{n/a|[[Northbridge (computing)|discrete]]}}
|
|
|
|
|-
| 500, 350
| Enhanced [[Am486]]
|
|
|
| 66–120
| <br />FSB
| 8, 8/16
|
|
| 168 pin [[Pin Grid Array|PGA]]<br />208 SQFP
<ref name="enham486">{{cite web |url = https://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_1260_1270,00.html |title = Am486 |accessdate = 2008-08-29 |publisher=[[Advanced Micro Devices]]}}</ref>
|
|
|
|
|-
! Am5x86
| 350
| [[Am5x86]]
|
| X5-133
|
| 1
| {{No}}
| 133
| 33<br />FSB
| 16
|
|
| [[Socket 3]]<br />[[Socket 2]]<br />[[Socket 1]]<br />168 pin
| {{n/a|[[Northbridge (computing)|discrete]]}}
|
|
|
|
|-
!| K5
| 500, 350
| [[AMD K5]]
|
| SSA/5, 5k86
|
| 1
| {{No}}
| 75–133
| 50, 60, 66<br />FSB
| 8+16
| 0
|
| [[Socket 5]]<br />[[Socket 7]]
| {{n/a|[[Northbridge (computing)|discrete]]}}
|
|
|
|
|-
! rowspan=3| K6
| 350, 250
| [[AMD K6]]
|
| Model 6, Littlefoot
|
| rowspan="3" | 1
| rowspan="3" {{No}}
| 166–300
| 50, 60, 66<br />FSB
| 32+32
| 0
|
| [[Socket 7]]
| rowspan=3 {{n/a|[[Northbridge (computing)|discrete]]}}
| [[MMX (instruction set)|MMX]]
|
|
|'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|MMX (instruction set)|MMX}}}}'''
|-
| 250, 180
| [[AMD K6-2]]
|
| Chomper, Chomper Extended, mobile
|
| 166–550
| 66, 95, 97, 100<br />FSB
| 32+32
| 0, 128
|
| [[Super Socket 7]]
| rowspan=2 | [[MMX (instruction set)|MMX]], [[3DNow!]]
| rowspan=2 |
| rowspan=2 |
| rowspan=2 |'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|3DNow!}}}}'''
|-
| 250, 180
| [[AMD K6-III|K6-3]]
|
| Sharptooth
|
| 400–550
| 66, 95, 96.2, 100<br />FSB
| 32+32
| 256
| 512, 1024
| [[Super Socket 7]]
|-
! rowspan=18| K7
| 250
| rowspan=3| [[Athlon]]
|
| Argon
|
| rowspan="18" | 1
| rowspan="18" {{No}}
| 500–700
| rowspan=3 | 100<br />FSB
| rowspan="18" | 64+64
| rowspan=2 | 512
|
| rowspan=2| [[Slot A]]
| rowspan=18 {{n/a|[[Northbridge (computing)|discrete]]}}
| rowspan=3 | [[MMX (instruction set)|MMX]], [[3DNow!]]
| rowspan=3 |
| rowspan=3 |
| rowspan=3 |
|-
| rowspan=2 | 180
|
| Pluto/Orion
|
| 550–1000
|
|-
|
| Thunderbird
|
| 1000–1400
| rowspan=4 | 256
|
| [[Slot A]]<br />[[Socket A]]
|-
| 180
| rowspan=4| [[Athlon XP|Athlon XP/MP]]
|
| Palomino
|1500+ – 2100+
| 1333–1733
| 133<br />FSB
|
| rowspan=15| [[Socket A]]
| rowspan=15| [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]]
| rowspan=15|
| rowspan=15|
| rowspan="15" |
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|3DNow!|3DNow!+}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|Streaming SIMD Extensions|SSE}}}}'''
|-
| rowspan=3 | 130
|
| Thoroughbred
|1600+ – 2800+
| 1400–2250
| rowspan=3| 133, 166, 200<br />FSB
|
|-
|
| Thorton
| 2000+ – 3100+
| 1667–2200
|
|-
|
| Barton
| 2500+ – 3200+
| 1833–2333
| 512
|
|-
| rowspan=2 | 180
| rowspan=3| [[Duron]]
|
| Spitfire
|
| 600–950
| rowspan=2| 100<br />FSB
| 64
|
|-
|
| Morgan
|
| 900–1300
| 64
|
|-
| 130
|
| Applebred
|
| 1400, 1600, 1800
| 133<br />FSB
| 64
|
|-
| 180
| Athlon 4
|
| Corvette
|
| 850–1400
| 100<br />FSB
| rowspan=2| 256
|
|-
| rowspan=2 | 130
| rowspan=2| Athlon XP-M
|
| Thoroughbred
|
| 1400–2133
| 100, 133<br />FSB
|
|-
|
| Barton
|
| 1667–2200
| 133<br />FSB
| 512
|
|-
| rowspan=2 | 180
| rowspan=2| Mobile Duron
|
| Spitfire
|
| 600, 700
| rowspan=2| 100<br />FSB
| 64
|
|-
|
| Camaro
|
| 800–1300
| 64
|
|-
| rowspan=3 | 130
| rowspan=3 | [[Sempron]]
|
| Thoroughbred-B
|
| 1500–2000
| rowspan=2 | 166<br />FSB
| rowspan=2 | 256
|
|-
|
| Thorton
|
| 1500–2000
|
|-
|
| Barton
|
| 2000–2200
| 166, 200<br />FSB
| 512
|
|-
! rowspan=77 | [[AMD K8|K8]]
| rowspan=3 | 130
| rowspan=12 | [[Opteron]]
|
| rowspan=3 | Sledgehammer
| 100
| rowspan="6" | 1
| rowspan="77" {{No}}
| rowspan=3 | 1400–2400
| rowspan="6" | 800<br />HT
| rowspan="36" | 64+64
| rowspan="18" | 1024
|
| rowspan=3 | [[Socket 940]]
| rowspan=9 | [[DDR SDRAM|DDR]]
| rowspan=12 | [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]], [[SSE2]]
| rowspan=12 | [[PowerNow!]]
| rowspan=6 | [[AMD64]],<br /> [[ccNUMA]]
| rowspan="12" |
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|SSE2}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|PowerNow!}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|AMD64}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|NX Bit}}}}'''
|-
|
| 200
|
|-
|
| 800
|
|-
| rowspan="9" | 90
|
| Venus
| 100
| rowspan=3 | 1600–3000
|
| [[Socket 939]]
|-
|
| Troy
| 200
|
| rowspan=2 | [[Socket 940]]
|-
|
| Athens
| 800
|
|-
|
| Denmark
| 100
| rowspan="6" | 2
| 1600–3200
| rowspan="6" | 1000<br />HT
|
| [[Socket 939]]
| [[AMD64]],<br /> [[NX Bit]]
|-
|
| Italy
| 200
| 1600–3200
|
| rowspan=2 | [[Socket 940]]
| rowspan=2 | [[AMD64]],<br /> [[NX Bit]],<br /> [[ccNUMA]]
|-
|
| Egypt
| 800
| 1600–3200
|
|-
|
| Santa Ana
| 1200
| 1800–3200
|
| [[Socket AM2]]
| rowspan=3 | [[DDR2 SDRAM|DDR2]]
| rowspan=3 | [[AMD64]],<br /> [[NX Bit]]
|-
|
| rowspan=2 | Santa Rosa
| 2200
| 1800–3200
|
| rowspan=2 | [[Socket F]]
|-
|
| 8200
| 2000–3000
|
|-
| rowspan=2 | 130
| rowspan=6 | [[Athlon 64 FX]]
|
| Sledgehammer
|FX-51, FX-53
| rowspan=3 | 1
| 2200, 2400
| 800<br />HT
|
| [[Socket 940]]
| rowspan=4 | [[DDR SDRAM|DDR]]
| rowspan=6 | [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]]
| rowspan=6 | [[Cool'n'Quiet]]
| rowspan=4 | [[AMD64]],<br /> [[NX Bit]]
| rowspan="65" |
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|SSE3}}}}'''<br />
'''{{Color|#D55E00|-&nbsp;{{colored link|#D55E00|PowerNow!}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|Cool'n'Quiet}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|AMD-V}}}}'''
|-
|
| Clawhammer
|FX-53, FX-55
| 2400, 2400
| rowspan=5 | 1000<br />HT
|
| rowspan=3 | [[Socket 939]]
|-
| rowspan=4 | 90
|
| San Diego
|FX-55, FX-57
| 2600, 2800
|
|-
|
| Toledo
|FX-60
| rowspan=3 | 2
| 2600
|
|-
|
| rowspan=2 | Windsor
|FX-62
| 2800
|
| [[Socket AM2]]
| rowspan=2 | [[DDR2 SDRAM|DDR2]]
| rowspan=2 | [[AMD64]],<br /> [[NX Bit]],<br /> [[AMD-V]]
|-
|
|FX-70, FX-72, FX-74
| 2600, 2800, 3000
|
| [[Socket F]]
|-
| rowspan=4 | 130
| rowspan=10 | [[Athlon 64]]
|
| rowspan=2 | Clawhammer
|
| rowspan="10" | 1
| rowspan=2 | 2000–2600
| 800<br />HT
| rowspan=2 | 1024
|
| [[Socket 754]]
| rowspan=5 | [[DDR SDRAM|DDR]]
| rowspan=5 | [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]], [[SSE2]]
| rowspan=10 | [[Cool'n'Quiet]]
| rowspan=2 | [[AMD64]],<br /> [[NX Bit]] (not in CG stepping)
|-
|
|
| 1000<br />HT
|
| [[Socket 939]]
|-
|
| rowspan=2 | Newcastle
|
| rowspan=2 | 1800–2400
| 800<br />HT
| rowspan=5 | 512
|
| [[Socket 754]]
| rowspan=6 | [[AMD64]],<br /> [[NX Bit]]
|-
|
|
| rowspan=2 | 1000<br />HT
|
| [[Socket 939]]
|-
| rowspan=5 | 90
|
| Winchester
|
| 1800–2200
|
| [[Socket 939]]
|-
|
| rowspan=2 | Venice
|
| rowspan=2 | 1800–2400
| 800<br />HT
|
| [[Socket 754]]
| rowspan=5 | [[DDR2 SDRAM|DDR2]]
| rowspan=5 | [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]]
|-
|
|
| rowspan="12" | 1000<br />HT
|
| [[Socket 939]]
|-
|
| San Diego
|
| 2200–2600
| 1024
|
| [[Socket 939]]
|-
|
| Orleans
|
| 1800–2600
| rowspan=2 | 512
|
| rowspan=2 | [[Socket AM2]]
| rowspan=2 | [[AMD64]],<br /> [[NX Bit]],<br /> [[AMD-V]]
|-
| 65
|
| Lima
|
| 2000–2800
|
|-
| rowspan="7" | 90
| rowspan=8 | [[Athlon 64 X2]]
|
| rowspan=2 | Manchester
| 3600+
| rowspan=8 | 2
| 2000
| 256 PC, FS
|
| rowspan=4 | [[Socket 939]]
| rowspan=4 | [[DDR SDRAM|DDR]]
| rowspan=8 | [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]]
| rowspan=8 | [[Cool'n'Quiet]]
| rowspan=4 | [[AMD64]],<br /> [[NX Bit]]
|-
|
| 3800+, 4200+, 4600+
| 2000, 2200, 2400
| rowspan=2 | 512 PC, FS
|
|-
|
| rowspan=2 | Toledo
| 3800+, 4200+, 4600+
| 2000, 2200, 2400
|
|-
|
| 4400+, 4800+
| 2200, 2400
| 1024 PC, FS
|
|-
|
| rowspan=3 | Windsor
| 3600+
| 2000
| 256 PC, FS
|
| rowspan=4 | [[Socket AM2]]
| rowspan=4 | [[DDR2 SDRAM|DDR2]]
| rowspan=4 | [[AMD64]],<br /> [[NX Bit]],<br /> [[AMD-V]]
|-
|
| 3800+, 4200+, 4600+, 5000+, 5400+
| 2000, 2200, 2400, 2600, 2800
| 512 PC, FS
|
|-
|
| 4000+, 4400+, 4800+, 5200+, 5600+, 6000+, 6400+
| 2000, 2200, 2400, 2600, 2800, 3000, 3200
| 1024 PC, FS
|
|-
| 65
|
| [[Athlon 64 X2#Brisbane (65 nm SOI)|Brisbane]]
| 3600+, 3800+, 4000+, 4200+, 4400+, 4600+, 4800+, 5000+, 5200+, 5400+, 5600+, 5800+, 6000+
| 1900, 2000, 2100, 2200, 2300, 2400, 2500, 2600, 2700, 2800, 2900, 3000, 3100
| 512 PC, FS
|
|-
| rowspan=2 | 130
| rowspan=17 | [[Sempron]]
|
| rowspan=2 | Paris
| 3000+
| rowspan="37" | 1
| 1800
| rowspan="41" | 800<br />HT
| rowspan="41" | 64+64
| 128
|
| rowspan=9 | [[Socket 754]]
|
| rowspan=2 | [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]]
| rowspan=2 | [[Cool'n'Quiet]]
| rowspan=2 | [[NX Bit]]
|-
|
| 3100+
| 1800
| 256
|
|
|-
| rowspan="13" | 90
|
| rowspan=11 | Palermo
| 2500+
| 1400
| 256
|
|
| rowspan=7 | [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]]<ref name="in_some_of_models">In some of models</ref>
| rowspan=3 |
| rowspan=11 | [[AMD64]],<ref name="in_some_of_models">In some of models</ref><br /> [[NX Bit]]
|-
|
| 2600+
| rowspan=2 | 1600
| 128
|
|
|-
|
| 2800+
| 256
|
|
|-
|
| 3000+
| rowspan=2 | 1800
| 128
|
|
| rowspan=4 | [[Cool'n'Quiet]]
|-
|
| 3100+
| 256
|
|
|-
|
| 3300+
| rowspan=2 | 2000
| 128
|
|
|-
|
| 3400+
| 256
|
|
|-
|
| 3000+
| rowspan=2 | 1800
| 128
|
| rowspan=4 | [[Socket 939]]
|
| rowspan=8 | [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]]
| rowspan=4 |
|-
|
| 3200+
| 256
|
|
|-
|
| 3400+
| rowspan=2 | 2000
| 128
|
|
|-
|
| 3500+
| 256
|
|
|-
|
| rowspan=2 | [[Sempron#Manila (90 nm SOI)|Manila]]
| 2800+, 3200+, 3500+
| 1600, 1800, 2000
| 128
|
| rowspan=4 | [[Socket AM2]]
|
| rowspan=4 | [[Cool'n'Quiet]]
| rowspan=9 | [[AMD64]],<br /> [[NX bit]]
|-
|
| 3000+, 3400+, 3600+, 3800+
| 1600, 1800, 2000, 2200
| rowspan=2 | 256
|
|
|-
| rowspan=2 | 65
|
| rowspan=2 | [[Sempron#Sparta (90 nm SOI)|Sparta]]
| LE-1100, LE-1150
| 1900, 2000
|
|
|-
|
| LE-1200, LE-1250, LE-1300
| 2100, 2200, 2300
| 512
|
|
|-
| rowspan=3 | 130
| rowspan=5 | [[List of AMD Athlon 64 microprocessors#Mobile Athlon 64|Mobile Athlon 64]]
|
| rowspan=2 | Clawhammer
| 2700+
| 1600
| 512
|
| rowspan=15 | [[Socket 754]]
|
| rowspan=5 | [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]], [[SSE2]]
| rowspan=5 |
|-
|
| 2800+, 3000+, 3200+, 3400+, 3700+
| 1600, 1800, 2000, 2200, 2400
| 1024
|
|
|-
|
| Odessa
| 2700+, 2800+, 3000+
| 1600, 1800, 2000
| 512
|
|
|-
| rowspan=2 | 90
|
| Oakville
| 2700+, 2800+, 3000+
| 1600, 1800, 2000
| 512
|
|
|-
|
| Newark
| 3000+, 3200+, 3400+, 3700+, 4000+
| 1800, 2000, 2200, 2400, 2600
| 1024
|
|
|-
| rowspan=2 | 130
| rowspan=12 | [[List of AMD Sempron microprocessors#Mobile Sempron|Mobile Sempron]]
|
| rowspan=2 | Dublin
|
| 1600, 1800
| 128
|
|
| rowspan=6 | [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]], [[SSE2]]
| rowspan=6 |
| rowspan=12 | [[AMD64]],<br /> [[NX bit]]
|-
|
|
| 1600
| 256
|
|
|-
| rowspan="15" | 90
|
| rowspan=2 | Georgetown
|
| 1600, 1800, 2000
| 128
|
|
|-
|
|
| 1600, 1800
| 256
|
|
|-
|
| rowspan=2 | Sonora
|
| 1600, 1800
| 128
|
|
|-
|
|
| 1600, 1800
| 256
|
|
|-
|
| rowspan=2 | Albany
|
| 1800, 2000, 2200
| 128
|
|
| rowspan=6 | [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]]
| rowspan=4 |
|-
|
|
| 1800, 2000
| 256
|
|
|-
|
| rowspan=2 | Roma
|
| 1800, 2000
| 128
|
|
|-
|
|
| 1600, 1800, 2000
| 256
|
|
|-
|
| rowspan=2 | Keene
|
| 1800, 2000
| 256
|
| rowspan=2 | [[Socket S1]]
|
| rowspan=2 | [[PowerNow!]]
|-
|
|
| 1600, 1800, 2000
| 512
|
|
|-
| rowspan=3 | [[Turion 64]]
|
| rowspan=2 | [[AMD Turion#Lancaster (90 nm SOI)|Lancaster]]
| MT-28, MT-32, ML-42
| 1600 1800, 2400
| 512
|
| rowspan=3 | [[Socket 754]]
|
| rowspan=3| [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]]
| rowspan=3|
| rowspan=3| [[AMD64]],<br /> [[NX bit]]
|-
|
| MT-30, MT-34, MT-37, MT-40, ML-44
| 1600, 1800, 2000, 2200, 2400
| 1024
|
|
|-
|
| [[AMD Turion#Richmond (90 nm SOI)|Richmond]]
| MK-36, MK-38
| 2000, 2200
| 512
|
|
|-
| rowspan=4 | [[Turion 64 X2]]
|
| [[List of AMD Turion microprocessors#"Taylor" (90 nm)|Taylor]]
| TL-50
| rowspan=4 | 2
| 1600
| 256
|
| rowspan=4 | Socket S1
|
| rowspan=4| [[MMX (instruction set)|MMX]], [[3DNow!|3DNow!+]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]]
| rowspan=4|
| rowspan=4| [[AMD64]]<br />[[NX bit]]
|-
|
| [[List of AMD Turion microprocessors#"Trinidad" (90 nm)|Trinidad]]
| TL-52, TL-56, TL-60, TL-64
| 1600, 1800, 2000, 2200
| 512
|
|
|-
| rowspan=2 | 65
|
| rowspan=2 | [[List of AMD Turion microprocessors#"Tyler" (65 nm)|Tyler]]
| TK-53, TK-55, TK-57
| 1700, 1800, 1900
| 256
|
|
|-
|
| TL-56, TL-58, TL-60, TL-62, TL-64, TL-66, TL-68 
| 1800, 1900, 2000, 2100, 2200, 2300, 2400
| 512
|
|
|-
! rowspan=8| [[AMD 10h|K10]]
| rowspan=8 | 65
| rowspan=2| [[Opteron]]
|
| Barcelona
|
| 4
| rowspan="8" {{No}}
| 1700–2500
| 1000<br />HT
| rowspan=8 | 64+64
| 256, 512
| 2048
| [[Socket F]]
|
| rowspan=2| [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSE4a]], [[3DNow!|Enhanced 3DNow!]]
| rowspan=2| [[PowerNow!]]
| [[AMD64]],<br /> [[NX bit]],<br /> [[AMD-V]],<br /> [[ccNUMA]]
| rowspan="8" |
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|SSE4a}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|3DNow|Enhanced 3DNow!}}}}'''
|-
|
| Budapest
|
| 4
| 1700–2500
| 1000<br />HT
| 256, 512
| 2048
| [[Socket AM2]]
|
| [[AMD64]],<br /> [[NX bit]],<br /> [[AMD-V]]
|-
| rowspan=2| [[Phenom (processor)|Phenom]]
|
| Agena
| 9100e, 9150e, 9350e, 9450e, 9500, 9550, 9600, 9600B, 9600BE, 9650, 9670, 9750, 9750B, 9850, 9850B 9850BE, 9950BE
| 4
| 1800–2600
| 1600, 1800, 2000<br />HT
| 512
| 2048
| rowspan=6| [[Socket AM2+]]
|
| rowspan=2| [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSE4a]], [[3DNow!|Enhanced 3DNow!]]
| rowspan=2| [[Cool'n'Quiet]]
| rowspan=2| [[AMD64]],<br /> [[NX bit]],<br /> [[AMD-V]]
|-
|
| Toliman
| 8250e, 8400, 8450, 8450e, 8550, 8600, 8600B, 8650, 8750, 8750B, 8750BE, 8850
| 3
| 1900–2500
| 1600, 1800<br />HT
| 512
| 2048
|
|-
| rowspan=2| [[Athlon X2]]
|
| rowspan=2|  Kuma
| 6500BE
| rowspan=2 | 2
|2300
| 1600, 1800<br />HT
| rowspan=2| 1024
|
|
| rowspan=4| [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSE4a]], [[3DNow!|Enhanced 3DNow!]]
| rowspan=4| [[Cool'n'Quiet]]
| rowspan=4| [[AMD64]],<br /> [[NX bit]],<br /> [[AMD-V]]
|-
|
|7450, 7550, 7750BE, 7850BE
| 2400–2800
| 1600, 1800<br />HT
| 2048
|
|-
|| [[Athlon]]
|
| Lima
|
| 1
| 2400–2700
| 1600, 1800<br />HT
| 512, 1024
|
|
|-
|| [[Sempron]]
|
| Sparta
|
| 1
| 2700
| 1600<br />HT
| 512
|
|
|-
! rowspan=14| K10.5
| rowspan="13" | 45
| rowspan=5| [[Phenom II]]
|
| Thuban
| 1045T, 1055T, 1075T, 1090T, 1100T
| 6/6
| rowspan="14" {{No}}
| 2600–3300
| 1800, 2000<br />HT
| rowspan="14" | 64+64
| 512
| 6144
| rowspan=12| [[Socket AM2+]]<br />[[Socket AM3]]
| [[DDR2 SDRAM|DDR2]]<br />[[DDR3 SDRAM|DDR3]]
| rowspan=5| [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSE4a]], [[3DNow!|Enhanced 3DNow!]]
| rowspan=5| [[Cool'n'Quiet]]
| rowspan=5| [[AMD64]],<br /> [[NX bit]],<br /> [[AMD-V]]
| rowspan="14" |
|-
|
| Zosma
| 840T, 960T, 970<sup>(E0 stepping)</sup>
| 4/6
| 3000–3400
| 1800, 2000<br />HT
| 512
| 6144
| [[DDR2 SDRAM|DDR2]]<br />[[DDR3 SDRAM|DDR3]]
|-
|
| Deneb
| 805, 810, 820, 830, 905e, 910e, 920, 925, 940, 945, 955, 965, 970, 975, 980
| 4/4
| 2500–3700
| 1800, 2000<br />HT
| 512
| 6144 (805–820 only 4096)
| [[DDR2 SDRAM|DDR2]]<br />[[DDR3 SDRAM|DDR3]]
|-
|
| Heka
| 705e, 720, 740
| 3/4
| 2500–2800
| 2000<br />HT
| 512
| 6144
| [[DDR2 SDRAM|DDR2]]<br />[[DDR3 SDRAM|DDR3]]
|-
|
| Callisto
| 545, 550, 555, 560, 565, 570
| 2/4
| 3000–3400
| 2000<br />HT
| 512
| 6144
| [[DDR2 SDRAM|DDR2]]<br />[[DDR3 SDRAM|DDR3]]
|-
| rowspan=3| [[Athlon II]]
|
| Propus
|
| 4
| 2200–2800
| 2000<br />HT
| 512
|
| [[DDR2 SDRAM|DDR2]]<br />[[DDR3 SDRAM|DDR3]]
| rowspan=3| [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSE4a]], [[3DNow!|Enhanced 3DNow!]]
| rowspan=3| [[Cool'n'Quiet]]
| rowspan=3| [[AMD64]],<br /> [[NX bit]],<br /> [[AMD-V]]
|-
|
| Rana
|
| 3
| 2200–3100
| 2000<br />HT
| 512
|
| [[DDR2 SDRAM|DDR2]]<br />[[DDR3 SDRAM|DDR3]]
|-
|
| Regor
|
| 2
| 1600–3600
| 2000<br />HT
| 512, 1024
|
| [[DDR2 SDRAM|DDR2]]<br />[[DDR3 SDRAM|DDR3]]
|-
| rowspan=4| [[AMD Sempron#Sempron|Sempron]]
|
| rowspan=4| Sargas
|130
| rowspan=4 | 1
|2600
| rowspan=4| 2000<br />HT
|512
| rowspan=4|
| rowspan=4| [[DDR2 SDRAM|DDR2]]<br />[[DDR3 SDRAM|DDR3]]
| rowspan=6| [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSE4a]], [[3DNow!|Enhanced 3DNow!]]
| rowspan=6| [[PowerNow!]]
| rowspan=6| [[AMD64]],<br /> [[NX bit]],<br /> [[AMD-V]]
|-
|
| 140
| 2700
| rowspan=3| 1024
|-
|
| 145
| 2800
|-
|
| 150
| 2900
|-
| [[AMD Turion#Turion II|Turion II]]
|
| Caspian
|&nbsp;
| 2
| 2000–2700
| 1800, 1600<br />HT
| 512, 1024
|&nbsp;
| Socket S1G3
| [[DDR2 SDRAM|DDR2]]
|-
| 32
| [[AMD APU#Llano|Llano]]
|
|Llano
| E2-3200, A4-3300, A4-3420, A6-3500, A6-3600, A6-3620, A6-3650, A6-3670K, A8-3800, A8-3820, A8-3850, A8-3870K
| 2/3/4
| 2100–3000
| 
| 1024, 3072, 4096
| 
| [[Socket FM1]]
| [[DDR3 SDRAM|DDR3]]
|-
![[Bobcat (microarchitecture)|Bobcat]]
|40
|Bobcat
|
|Desna,<br />Ontario,<br />Zacate
|C-series,<br />E-series,<br />G-series,<br />Z-series
|1/2
| {{No}}
|1000 – 1750
|
| 32 + 32
| 512 KB (per core)
|
| [[Socket FT1]]
| [[DDR3]]
| [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3|SSE3s]], [[SSE4a]]
| [[PowerNow!]]
| [[AMD64]],<br /> [[NX bit]],<br /> [[AMD-V]]
|'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|SSSE3|SSE3s}}}}'''
|-
! rowspan=17 | [[Bulldozer (microarchitecture)|Bulldozer]]
| rowspan=14 | 32
| rowspan=6 | [[Bulldozer (microarchitecture)|Bulldozer]]
| rowspan=3 | October 2011
| rowspan=3 | Zambezi
|FX-4100 series (4100, 4120, 4130, 4150, 4170)
|4
| rowspan="17" {{Yes2|[[Bulldozer (microarchitecture)#CMT|CMT]]}}
|3600–4200 (3700–4300 boost)
| rowspan="4" | 2600&nbsp;MHz<br />HT
| rowspan="6" | 64&nbsp;KB {{abbr|inst.|instruction}} per module,<br />16&nbsp;KB data per core
| rowspan="6" | 2&nbsp;MB per module
| 4&nbsp;MB (FX-4130), 8&nbsp;MB (all other models)
| rowspan=4 | [[Socket AM3+]]
| rowspan=4 | Dual-channel [[DDR3 SDRAM|DDR3]]
| rowspan=6 | [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3|SSE3s]], [[SSE4a]], [[SSE4.1]], [[SSE4.2]],<br /> [[Advanced Vector Extensions|AVX]]
| rowspan=6 | [[Cool'n'Quiet]], [[PowerNow!]], [[Turbo Core]] 2.0
| rowspan=6 | [[AMD64]],<br /> [[NX bit]],<br /> [[AMD-V]],<br /> [[IOMMU]],<br /> [[AES instruction set|AES]],<br /> [[CLMUL]],<br /> [[XOP instruction set|XOP]],<br /> [[FMA4]],<br /> [[CVT16 instruction set|CVT16]]/[[F16C]],<br /> [[Bit Manipulation Instruction Sets|ABM]],<br /> [[Exchange coupled composite media|ECC]]
| rowspan="6" |
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|SSE4.1}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|SSE4.2}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|Advanced Vector Extensions|AVX}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|Turbo Core|Turbo Core 2.0}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|IOMMU}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|AES instruction set|AES}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|CLMUL}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|FMA4}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|XOP instruction set|XOP}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|CVT16 instruction set|CVT16}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|F16C}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|Bit Manipulation Instruction Sets#ABM|ABM}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|Exchange coupled composite media|ECC}}}}'''
|-
|FX-6100 series (6100, 6120, 6130, 6200)
|6
|3300–3800 (3600–4200 boost)
| rowspan="2" | 8&nbsp;MB
|-
|FX-8100 series (8100, 8120, 8140, 8150, 8170)
|8
|2800–3900 (3100–4500 boost)
|-
| March 2012
| Zurich
| Opteron 3200 series (3250HE, 3260HE, 3280)
| 4/8
| 2400–2700 (2700–3700 boost)
| 4&nbsp;MB (3250HE, 3260HE), 8&nbsp;MB (3280)
|-
| rowspan=2 | November 2011
| Valencia
| Opteron 4200 series (42DX, 42MX, 4226, 4228HE, 4230HE, 4234, 4238, 4240, 4256EE,4274HE, 4276HE, 4280, 4284)
| 4/6/8
| 1600–3400 (1900–3800 boost)
| 3200&nbsp;MHz<br />HT<br />up to 2 links
| 8&nbsp;MB
| [[Socket C32]]
| Dual-channel [[DDR3 SDRAM|DDR3]]
|-
| Interlagos
| Opteron 6200 series (6204, 6212, 6220, 6230HE, 6234, 6238, 6262HE, 6272, 6274, 6276, 6278, 6282SE, 6284SE)
| 4/8/12/16
| 1600–3300 (2100–3600 boost)
| 3200&nbsp;MHz<br />HT<br />up to 4 links
| 16&nbsp;MB<br />(8&nbsp;MB per chiplet)
| [[Socket G34]]
| Quad-channel [[DDR3 SDRAM|DDR3]]
|-
| rowspan=8 | [[Piledriver (microarchitecture)|Piledriver]]
|
| Trinity
| SempronX2 240, AthlonX2 340, AthlonX4 740, AthlonX4 750K, FirePro A300, FirePro A320, A4-4300M, A4-4355M, A4-5300, A4-5300B, A6-4400M, A6-4455M, A6-5400K, A6-5400B, A8-5500, A8-4500M, A8-4555M, A8-5500B, A8-5600K, A10-4600M, A10-4655M, A10-5700, A10-5800K, A10-5800B
| 2/4
| 1600–3800 (2400–4200 boost)
| rowspan=2 | 
| rowspan=8 | 64&nbsp;KB {{abbr|inst.|instruction}} per module,<br />16&nbsp;KB data per core
| rowspan=2 | 2x2, 1
| rowspan=2 {{no2|none}}
| rowspan=2 | [[Socket FM2]]<br />[[Socket FS1|FS1r2]]<br />FP2
| rowspan=2 | [[DDR3 SDRAM|DDR3]]
| rowspan=9 | [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3|SSE3s]], [[SSE4a]], [[SSE4.1]], [[SSE4.2]],<br /> [[Advanced Vector Extensions|AVX]],<br /> [[Advanced Vector Extensions|AVX1.1]]
| rowspan=11 | [[Cool'n'Quiet]], [[PowerNow!]], [[Turbo Core]] 3.0
| rowspan=9 | [[AMD64]],<br /> [[NX bit]],<br /> [[AMD-V]],<br /> [[IOMMU]],<br />[[AES instruction set|AES]],<br /> [[CLMUL]],<br /> [[XOP instruction set|XOP]],<br />[[FMA3]],<br /> [[FMA4]],<br /> [[CVT16 instruction set|CVT16]]/[[F16C]],<br /> [[Bit Manipulation Instruction Sets|ABM]],<br /> [[Bit Manipulation Instruction Sets|BMI1]],<br />[[Bit Manipulation Instruction Sets|TBM]],<br />[[Exchange coupled composite media|ECC]], <br />EVP.
| rowspan="9" |
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|Advanced Vector Extensions|AVX1.1}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|Turbo Core|Turbo Core 3.0}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|FMA3}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|Bit Manipulation Instruction Sets#BMI1|BMI1}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|Bit Manipulation Instruction Sets#TBM|TBM}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|NX Bit|EVP}}}}'''
|-
|
| Richland
| SempronX2 250, AthlonX2 350, AthlonX2 370K, AthlonX2 750, AthlonX2 760K, FX-670K, A4-4000, A4-4320, A4-5145M, A4-5150M, A4-6300, A4-6300B, A4-6320, A4-6320B, A4-7300, A4PRO-7300B, A6-5345M, A6-5350M, A6-5357M, A6-6400B , A6-6400K, A6-6420B, A6-6420K, A8-5345M, A8-5350M, A8-5357M, A8-6500, A8-6500T, A8-6500B, A8-6600, A10-5745M, A10-5750M, A10-5757M, A10-6700, A10-6700T, A10-6790B , A10-6790K , A10-6800B , A10-6800K
| 2/4
| 1700–4100 (2600–4400 boost)
|-
| rowspan=3 | October 2012
| rowspan=3 | Vishera
| FX-4300 series (4300, 4320, 4350)
| 4
| 3800–4200 (4000–4300 boost)
| rowspan=4 | 2600&nbsp;MHz<br />HT
| rowspan=6 | 2&nbsp;MB per module
| 4&nbsp;MB (FX-4300, FX-4320), 8&nbsp;MB (FX-4350)
| rowspan=4 | [[Socket AM3+]]
| rowspan=4 | Dual-channel [[DDR3 SDRAM|DDR3]]
|-
| FX-6300 series (6300, 6350)
| 6
| 3500–3900 (4100–4200 boost)
| rowspan=2 | 8&nbsp;MB
|-
| FX-8300 series (8300, 8310, 8320, 8320E, 8350, 8370, 8370E, 9370, 9590)
| 8
| 3300–4700 (4000–5000 boost)
|-
| rowspan=2 | December 2012
| Delhi
| Opteron 3300 series (3320EE, 3350HE, 3365, 3380)
| 4/8
| 1900–2800 (2100–3800 boost)
| 8&nbsp;MB (all models)
|-
| Seoul
| Opteron 4300 series (43CXEE, 43GKHE, 4310EE, 4332HE, 4334, 4340, 4365EE, 4376HE, 4386)
| 4/6/8
| 2000–3500 (2300–3800 boost)
| 3200&nbsp;MHz<br />HT<br />up to 2 links
| 8&nbsp;MB (all models)
| [[Socket C32]]
| Dual-channel [[DDR3 SDRAM|DDR3]]
|-
| November 2012
| Abu Dhabi
| Opteron 6300 series (6308, 6320, 6328, 6338P, 6344, 6348, 6366HE, 6370P, 6376, 6378, 6380, 6386SE)
| 4/8/12/16
| 1800–3500 (2300–3800 boost)
| 3200&nbsp;MHz<br />HT<br />up to 4 links
| 16&nbsp;MB<br />(8&nbsp;MB per chiplet)
| [[Socket G34]]
| Quad-channel [[DDR3 SDRAM|DDR3]]
|-
| rowspan=3 |28
| [[Steamroller (microarchitecture)|Steamroller]]
|
| Kaveri
| AthlonX2 450, AthlonX4 840, AthlonX4 860K, AthlonX4 870K, AthlonX4 880K, FX-770K, FX-7500, FX-7600P, A4PRO-7350B, A6-7000, A6Pro-7050B, A6-7400K, A6PRO-7400B, A6-7470K, A8-7100, A8Pro-7150B, A8-7200P, A8-7600, A8PRO-7600B, A8-7650K, A8-7670K, A10-7300, A10Pro-7350B, A10-7400P, A10-7700K, A10-7800, A10PRO-7800B, A10-7850K, A10-7850B, A10-7860K, A10-7870K, A10-7890K
| 2/4
| 1800–4100 (3000–4300 boost)
| 
| 96&nbsp;KB {{abbr|inst.|instruction}} per module,<br />16&nbsp;KB data per core
| 2x2, 1
| {{no2|none}}
| [[Socket FM2+]] [[Socket FP3]]
| rowspan=2 | [[DDR3 SDRAM|DDR3]]
|-
| rowspan=2 | [[Excavator (microarchitecture)|Excavator]]
|
| Carrizo
| AthlonX4 835, AthlonX4 845, FX-8800P, A6-8500P, A6Pro-8500B, A8-8600P, A8Pro-8600B, A10-8700P, A10Pro-8700B, A10-8780P, A12Pro-8800B
| 2/4
| 1600–3500 (3000–3800 boost)
| 
| rowspan=2 | 96&nbsp;KB {{abbr|inst.|instruction}} per module,<br />32&nbsp;KB data per core
| rowspan=2 | 1&nbsp;MB per module
| rowspan=2 {{no2|none}}
| [[Socket FM2+]] [[Socket FP4]]
| rowspan=2 | [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3|SSE3s]], [[SSE4a]], [[SSE4.1]], [[SSE4.2]],<br /> [[Advanced Vector Extensions|AVX]],<br /> [[Advanced Vector Extensions|AVX1.1]],<br /> [[Advanced Vector Extensions|AVX2]]
| rowspan=2 | [[AMD64]],<br /> [[NX bit]],<br /> [[AMD-V]],<br /> [[IOMMU]],<br />[[AES instruction set|AES]],<br /> [[CLMUL]],<br /> [[XOP instruction set|XOP]],<br />[[FMA3]],<br /> [[FMA4]],<br /> [[CVT16 instruction set|CVT16]]/[[F16C]],<br /> [[Bit Manipulation Instruction Sets|ABM]],<br /> [[Bit Manipulation Instruction Sets|BMI1]],<br /> [[Bit Manipulation Instruction Sets|BMI2]],<br />[[Bit Manipulation Instruction Sets|TBM]],<br />[[Exchange coupled composite media|ECC]], <br />EVP. 
| rowspan="2" |
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|Advanced Vector Extensions#Advanced_Vector_Extensions_2|AVX2}}}}'''<br />
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|Bit Manipulation Instruction Sets#BMI2|BMI2}}}}'''
|-
|
|Bristol Ridge
|AthlonX4 940, AthlonX4 950, AthlonX4 970, FX-9800P, FX-9830P, A6-9500, A6PRO-9500, A6Pro-9500B, A6-9500E, A6PRO-9500E, A6-9550, A8-9600, A8PRO-9600, A8Pro-9600B, A8Pro-9630B, A10-9600P, A10-9620P, A10-9630P, A10-9700, A10PRO-9700, A10Pro-9700B, A10-9700E, A10PRO-9700E, A10Pro-9730B, A12-9700P, A12-9720P, A12-9730P, A12-9800, A12PRO-9800, A12Pro-9800B, A12-9800E, A12PRO-9800E, A12Pro-9830B
|2/4
|2300–3800 (3200–4200 boost)
| 
| [[Socket AM4]] [[Socket FP4]]
| [[DDR4]]
|-
! rowspan=2 | [[Jaguar (microarchitecture)|Jaguar]]
| rowspan=2 | 28
| [[Jaguar (microarchitecture)|Jaguar]]
|
| Kabini,<br />Temash,<br />Kyoto
|
| rowspan=2 | 2/4
| rowspan="2" {{No}}
| 1000–2200
| rowspan=2 {{sdash}}
| rowspan=2 | 32&nbsp;KB {{abbr|inst.|instruction}}<br />32&nbsp;KB data<br />per core
| rowspan=2 | 512&nbsp;KB per core
| rowspan=2 {{n/a}}
| Desktop: [[Socket AM1]],<br />Mobile: [[Socket FT3]]
| rowspan=2 | [[DDR3]]
| rowspan=2 | [[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3|SSE3s]], [[SSE4a]], [[SSE4.1]], [[SSE4.2]],<br /> [[Advanced Vector Extensions|AVX]]
| rowspan=2 | [[PowerNow!]]
| rowspan=2 | [[AMD64]],<br /> [[NX bit]],<br /> [[AMD-V]],<br />[[AES instruction set|AES]],<br /> [[CLMUL]],<br />[[CVT16 instruction set|CVT16]]/[[F16C]],<br />[[Bit Manipulation Instruction Sets|BMI1]]
| rowspan=2 | 
|-
| [[Puma (microarchitecture)|Puma]]
|
| Beema,<br />Mullins,<br />Stepped Eagle,<br />Crowned Eagle,<br />Carrizo-L,<br />LX-Family,<br />
|E1-6010, E1-6050, E1-6200T, E1-7010, E2-6110, E2-7110, A4-6210, A4-7210, A4Pro-3350B, A4-6400T, A6-6310, A6-7310, A8-6410, A8-7410
| 800–2400
| [[Socket FT3b]], [[Socket AM1]]
|-
! rowspan="81" |[[Zen (microarchitecture)|Zen]]
| rowspan="16" |[[14 nm process|14]]
[[GloFo]]{{nnbsp}}14LP
| rowspan="16" |[[Zen (first generation)|Zen]]
| rowspan="3" | {{Date table sorting|2 March 2017|format=my}}
| rowspan="3" | Summit Ridge
| Ryzen 3 (Pro 1200, 1200, Pro 1300, 1300X)
| 4
| {{No}}
| 3100–3500 (3400–3700 boost)
| rowspan="16" |8.0&nbsp;[[Transfer (computing)|GT]]/s<br />PCIe
| rowspan="16" |64&nbsp;KB {{abbr|inst.|instruction}}<br />32&nbsp;KB data<br />per core
| rowspan="16" |512&nbsp;KB<br />per core
| 8&nbsp;MB
| rowspan="3" | [[Socket AM4]]
| rowspan="3" | Dual-channel [[DDR4]]
| rowspan="16" |[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3|SSE3s]], [[SSE4a]], [[SSE4.1]], [[SSE4.2]], [[Advanced Vector Extensions|AVX]], [[Advanced Vector Extensions|AVX2]]
| rowspan="16" |
| rowspan="16" |[[AMD64]], [[AES instruction set|AES]],<br />[[CLMUL]], [[FMA3]],<br />[[CVT16 instruction set|CVT16]]/[[F16C]], [[Bit Manipulation Instruction Sets|ABM]],<br />[[Bit Manipulation Instruction Sets|BMI1]], [[Bit Manipulation Instruction Sets|BMI2]],<br />[[Intel SHA Extensions|SHA]]
| rowspan="16" |
'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|Intel SHA Extensions|SHA}}}}'''<br />
'''{{Color|#D55E00|-&nbsp;{{colored link|#D55E00|FMA4}}}}'''<br />
'''{{Color|#D55E00|-&nbsp;{{colored link|#D55E00|Bit Manipulation Instruction Sets#TBM|TBM}}}}'''<br />
'''{{Color|#D55E00|-&nbsp;{{colored link|#D55E00|XOP instruction set|XOP}}}}'''<br />
'''{{Color|#D55E00|-&nbsp;{{colored link|#D55E00|3DNow}}}}'''<br />
'''{{Color|#D55E00|-&nbsp;{{colored link|#D55E00|3DNow|3DNow!+}}}}'''<br />
'''{{Color|#D55E00|-&nbsp;{{colored link|#D55E00|3DNow|Enhanced 3DNow!}}}}'''
|-
| Ryzen 5 (1400, Pro 1500, 1500X, Pro 1600, 1600, 1600X)
| 4/6
| rowspan="4" {{Yes}}
| 3200–3600 (3400–4000 boost)
| 8–16&nbsp;MB
|-
| Ryzen 7 (Pro 1700, 1700, Pro 1700X, 1700X, 1800X)
| 8
| 3000–3600 (3700–4000 boost)
| 16&nbsp;MB
|-
|{{Date table sorting|June 2017}}
|Naples
| [[Epyc|EPYC]] 7001 series
|8/16/24/32
|2000–3100
(2550–3600 all)

(2700–3800 boost)
|32–64&nbsp;MB
|[[Socket SP3]]
|Octa-channel [[DDR4]]
|-
|{{Date table sorting|August 2017}}
|Whitehaven
|Ryzen Threadripper (1900X, 1920X, 1950X)
|8/12/16
|3200–3800 (3800–4000 boost)
|16–32&nbsp;MB
|[[Socket TR4]]
|Quad-channel [[DDR4]]
|-
| rowspan="3" |{{Date table sorting|October 2017}}
| rowspan="6" |Raven Ridge
|Athlon (Pro 200U, 300U),<br />Ryzen 3 (2200U, 3200U, 3250U)
|2
| {{Yes}}
|2300–2600 (3200–3500 boost)
| rowspan="6" |4&nbsp;MB
| rowspan="3" |[[Socket FP5]]
| rowspan="6" |Dual-channel [[DDR4]]
|-
|Ryzen 3 (2300U, Pro 2300U)
| rowspan="2" |4
| {{No}}
|2000 (3400 boost)
|-
| Ryzen 5 (2500U, Pro 2500U, 2600H),<br />Ryzen 7 (2700U, Pro 2700U, 2800H)
| {{Yes}}
| 2000–3300 (3600–3800 boost)
|-
| rowspan="3" |{{Date table sorting|February 2018}}
|Athlon (200GE, Pro 200GE, 220GE, 240GE, 3000G)
|2
| {{Yes}}
|3200–3500
| rowspan="3" |[[Socket AM4]]
|-
|Ryzen 3 (2200GE, Pro 2200GE, 2200G, Pro 2200G)
| rowspan="2" |4
| {{No}}
|3200–3500 (3600–3700 boost)
|-
| Ryzen 5 (2400GE, Pro 2400GE, 2400G, Pro 2400G)
| {{Yes}}
| 3200–3600 (3800–3900 boost)
|-
| rowspan="3" |{{Date table sorting|February 2018}}
| rowspan="2" |Snowy Owl
| [[Epyc|EPYC]] Embedded 3001 series
| rowspan="2" |4/8/12/16
| {{No}}
|1500–2100
(2150–3100 all)

(2900–3100 boost)
|8–32&nbsp;MB<br />(8&nbsp;MB per CCX)
| rowspan="2" |[[Socket SP4r2]]
| rowspan="3" |Dual-channel [[DDR4]]
|-
| [[Epyc|EPYC]] Embedded 3051 series
| {{Yes}}
|1900–2700
(2450–3100 all)

(2900–3100 boost)
|16–32&nbsp;MB<br />(8&nbsp;MB per CCX)
|-
|Great Horned Owl
| Ryzen Embedded V1000 series
|2/4
| {{Yes}}
|2000–3350 (3200–3800 boost)
| rowspan="3" |4&nbsp;MB
| rowspan="3" |[[Socket FP5]]
|-
| rowspan="2" |{{Date table sorting|April 2019}}
| rowspan="2" |Banded Kestrel
| rowspan="2" | Ryzen Embedded R1000 series
| rowspan="2" |2
| {{No}}
|1200 (2600 boost)
|Single-channel [[DDR4]]
|-
| {{Yes}}
|1500–2600 (2800–3500 boost)
|Dual-channel [[DDR4]]
|-
| rowspan="10" |12
[[GloFo]]{{nnbsp}}12LP
| rowspan="10" |[[Zen+]]
| rowspan="3" |{{Date table sorting|19 April 2018|format=my}}
| rowspan="3" |Pinnacle Ridge
|Ryzen 3 (1200 AF, 2300X)
| rowspan="2" |4
| {{No}}
|3100–3500 (3400–4000 boost)
| rowspan="10" |8.0&nbsp;[[Transfer (computing)|GT]]/s<br />PCIe
| rowspan="10" |64&nbsp;KB {{abbr|inst.|instruction}}<br />32&nbsp;KB data<br />per core
| rowspan="10" |512&nbsp;KB<br />per core
| rowspan="2" |8&nbsp;MB
| rowspan="3" |[[Socket AM4]]
| rowspan="3" |Dual-channel [[DDR4]]
| rowspan="10" |[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3|SSE3s]], [[SSE4a]], [[SSE4.1]], [[SSE4.2]], [[Advanced Vector Extensions|AVX]], [[Advanced Vector Extensions|AVX2]]
| rowspan="10" |
| rowspan="10" |[[AMD64]], [[AES instruction set|AES]],<br />[[CLMUL]], [[FMA3]],<br />[[CVT16 instruction set|CVT16]]/[[F16C]], [[Bit Manipulation Instruction Sets|ABM]],<br />[[Bit Manipulation Instruction Sets|BMI1]], [[Bit Manipulation Instruction Sets|BMI2]],<br />[[Intel SHA Extensions|SHA]]
| rowspan="10" |
|-
|Ryzen 5 2500X
| rowspan="2" {{Yes}}
|3600 (4000 boost)
|-
| Ryzen 5 (1600 AF, 2600, 2600E, 2600X),<br />Ryzen 7 (2700, 2700E, 2700X, Pro 2700X)
| 6/8 
| 2800–3700 (3600–4300 boost)
| 16&nbsp;MB
|-
|{{Date table sorting|31 August 2018|format=my}}
|Colfax
|Ryzen Threadripper (2920X, 2950X, 2970WX, 2990WX)
|12/16/24/32
| {{Yes}}
|3000–3500 (4200–4400 boost)
|32–64&nbsp;MB
|[[Socket TR4]]
|Quad-channel [[DDR4]]
|-
| rowspan="2" |{{Date table sorting|6 January 2019|format=my}}
| rowspan="4" |Picasso
|Ryzen 3 (3300U, Pro 3300U, 3350U)
| rowspan="4" |4
| {{No}}
|2100 (3500 boost)
| rowspan="6" |4&nbsp;MB
| rowspan="2" |[[Socket FP5]]
| rowspan="6" |Dual-channel [[DDR4]]
|-
| Ryzen 5 (3450U, 3500C, 3500U, Pro 3500U, 3550H, 3580U),<br />Ryzen 7 (3700C, 3700U, Pro 3700U, 3750H, 3780U)
| {{Yes}}
| 2100–2300 (3500–4000 boost)
|-
| rowspan="2" |{{Date table sorting|7 July 2019|format=my}}
|Ryzen 3 (3200GE, Pro 3200GE, 3200G, Pro 3200G)
| {{No}}
|3300–3600 (3800–4000 boost)
| rowspan="4" |[[Socket AM4]]
|-
| Ryzen 5 (3400GE, Pro 3400GE, 3400G, Pro 3400G)
| {{Yes}}
| 3300–3700 (4000–4200 boost)
|-
| rowspan="2" |{{Date table sorting|July 2020}}
| rowspan="2" |Dali
|Athlon Silver 3050GE<br />Athlon Silver PRO 3125GE
|2
| {{Yes}}
|3400
|-
|Athlon Gold (3150G, 3150GE)<br />Athlon Gold PRO (3150G, 3150GE)
|4
| {{No}}
|3500 (3800–3900 boost)
|-
| rowspan="45" |[[7 nm process|7]]
[[7 nm process|TSMC N7]]
| rowspan="22" |[[Zen 2]]
| rowspan="4" |{{Date table sorting|7 July 2019|format=my}}
| rowspan="4" |Matisse
|Ryzen 3 (3100, 3300X)
|4
| {{Yes}}
|3600–3800 (3900–4200 boost)
| rowspan="22" |16.0&nbsp;[[Transfer (computing)|GT]]/s<br />PCIe
| rowspan="22" |32&nbsp;KB {{abbr|inst.|instruction}}<br />32&nbsp;KB data<br />per core
| rowspan="22" |512&nbsp;KB<br />per core
|16&nbsp;MB
| rowspan="4" |[[Socket AM4]]
| rowspan="4" |Dual-channel [[DDR4]]
| rowspan="22" |[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3|SSE3s]], [[SSE4a]], [[SSE4.1]], [[SSE4.2]], [[Advanced Vector Extensions|AVX]], [[Advanced Vector Extensions|AVX2]]
| rowspan="22" |
| rowspan="22" |[[AMD64]], [[AES instruction set|AES]],<br />[[CLMUL]], [[FMA3]],<br />[[CVT16 instruction set|CVT16]]/[[F16C]], [[Bit Manipulation Instruction Sets|ABM]],<br />[[Bit Manipulation Instruction Sets|BMI1]], [[Bit Manipulation Instruction Sets|BMI2]],<br />[[Intel SHA Extensions|SHA]]
| rowspan="22" |
|-
|Ryzen 5 (3500,  3500X)
|6
| {{No}}
|3600 (4100 boost)
|16–32&nbsp;MB
|-
|Ryzen 5 (3600, Pro 3600, 3600X, 3600XT),<br />Ryzen 7 (Pro 3700, 3700X, 3800X, 3800XT)
|6/8
| {{Yes}}
|3600–3900 (4200–4700 boost)
|32&nbsp;MB
|-
| Ryzen 9 (3900, Pro 3900, 3900X, 3900XT, 3950X)
| 12/16
| {{Yes}}
| 3100–3800 (4300–4700 boost)
| 64&nbsp;MB
|-
|{{Date table sorting|August 2019}}
|Rome
|[[Epyc|EPYC]] 7002 series
|8/12/16/24/32/48/64
| {{Yes}}
|2000–3700 (3200–3900 boost)
|32–256&nbsp;MB
|[[Socket SP3]]
|Octa-channel [[DDR4]]
|-
|{{Date table sorting|November 2019}}
|Castle Peak
|Ryzen Threadripper (3960X, 3970X, 3990X)
|24/32/64
| {{Yes}}
|2900–3800 (4300–4500 boost)
|128/128/256&nbsp;MB
|[[Socket sTRX4]]
|Quad-channel [[DDR4]]
|-
| rowspan="6" |{{Date table sorting|16 March 2020|format=my}}
| rowspan="8" |Renoir
|Ryzen 3 4300U
| rowspan="2" |4
| {{No}}
|2700 (3700 boost)
| rowspan="2" |4&nbsp;MB
| rowspan="8" |Mobile:<br> [[Socket FP6]]

Desktop:<br>[[Socket AM4]]
| rowspan="8" |Mobile:<br> Dual-channel [[DDR4]] or [[LPDDR4]]

Desktop:<br> Dual-channel [[DDR4]]
|-
|Ryzen 3 (4300G, 4300GE, 4350G, 4350GE, Pro 4450U)
| {{Yes}}
|2500–3800 (3700–4200 boost)
|-
|Ryzen 5 4500U
| rowspan="2" |6
| {{No}}
|2300 (4000 boost)
| rowspan="6" |8&nbsp;MB
|-
|Ryzen 5 (4600U, Pro 4650U, 4600H, 4600HS, 4680U),<br />Ryzen 5 (4600G, 4600GE, Pro 4650G, Pro 4650GE)
| {{Yes}}
|2100–3700 (4000–4200 boost)
|-
|Ryzen 7 4700U
| rowspan="2" |8
| {{No}}
|2000 (4100 boost)
|-
| Ryzen 7 (Pro 4750U, 4800U, 4800H, 4800HS),<br />Ryzen 7 (4700G, 4700GE, Pro 4750G, Pro 4750GE),<br />Ryzen 9 (4900H, 4900HS)
| {{Yes}}
| 1800–3600 (4100–4400 boost)
|-
| rowspan="2" |{{Date table sorting|April 2022}}
|Ryzen 3 4100
|4
| rowspan="2" {{Yes}}
|3800 (4000 boost)
|-
|Ryzen 5 4500
|6
|3600 (4100 boost)
|-
|{{Date table sorting|July 2020}}
|Castle Peak (Pro)
|Ryzen Threadripper Pro (3945WX, 3955WX, 3975WX, 3995WX)
|12/16/32/64
| {{Yes}}
|2700–4000 (4200–4300 boost)
|64–256&nbsp;MB<br />(16&nbsp;MB per CCX)
|[[Socket sWRX8]]
|Octa-channel [[DDR4]]
|-
|{{Date table sorting|November 2020}}
|Grey Hawk
|Ryzen Embedded V2000 series
|6/8
| {{Yes}}
|1700–3000 (3950–4250 boost)
|8&nbsp;MB
| rowspan="4" |[[Socket FP6]]
|Dual-channel [[DDR4]] or Quad-channel [[LPDDR4]]
|-
| rowspan="3" |{{Date table sorting|January 2021}}
| rowspan="3" |Lucienne
|Ryzen 3 5300U
|4
| rowspan="3" {{Yes}}
|2600 (3800 boost)
|4&nbsp;MB
| rowspan="3" |Dual-channel [[DDR4]] or [[LPDDR4]]
|-
|Ryzen 5 5500U
|6
|2100 (4000 boost)
| rowspan="2" |8&nbsp;MB
|-
|Ryzen 7 5700U
|8
|1800 (4300 boost)
|-
|rowspan=3 |Q4 2022
|rowspan=3 |Mendocino<ref>{{cite web |title=AMD Ryzen 7020 Series Processors for Mobile Bring High-End Performance and Long Battery Life to Everyday Users |url=https://www.amd.com/en/press-releases/2022-09-20-amd-ryzen-7020-series-processors-for-mobile-bring-high-end-performance |website=AMD |access-date=March 8, 2023 |date=September 20, 2022}}</ref>
|Athlon Silver 7120U
|rowspan=2 |2
|{{No}}
|2400 (3500 boost)
|2&nbsp;MB
|rowspan=3 |Socket FT6
|rowspan=3 |Dual-channel [[LPDDR5]]
|-
|Athlon Gold 7220U
|{{Yes}}
|2400 (3700 boost)
|4&nbsp;MB
|-
|Ryzen 7020
|4
|{{Yes}}
|2400–2800 (4100–4300)
|4&nbsp;MB
|-
| rowspan="23" |[[Zen 3]]
|{{Date table sorting|November 2020}}
| rowspan="3" |Vermeer
|Ryzen 5 (5600X),<br />Ryzen 7 (5800X),<br />Ryzen 9 (5900X, 5950X)
|6/8/12/16
| rowspan="23" {{Yes}}
|3400–3800 (4600–4900 boost)
| rowspan="23" |16.0&nbsp;[[Transfer (computing)|GT]]/s<br />PCIe
| rowspan="23" |32&nbsp;KB {{abbr|inst.|instruction}}<br />32&nbsp;KB data<br />per core
| rowspan="23" |512&nbsp;KB<br />per core
| rowspan="2" |32–64&nbsp;MB<br />(32&nbsp;MB per CCD/CCX)
| rowspan="3" |[[Socket AM4]]
| rowspan="3" |Dual-channel [[DDR4]]
| rowspan="23" |MMX(+), [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3|SSE3s]], [[SSE4a]], [[SSE4.1]], [[SSE4.2]] x86-64, AMD-V,  [[Advanced Vector Extensions|AVX]], [[Advanced Vector Extensions|AVX2]]
| rowspan="23" |
| rowspan="23" |[[AMD64]], [[AES instruction set|AES]],<br />[[CLMUL]], [[FMA3]],<br />[[CVT16 instruction set|CVT16]]/[[F16C]], [[Bit Manipulation Instruction Sets|ABM]],<br />[[Bit Manipulation Instruction Sets|BMI1]], [[Bit Manipulation Instruction Sets|BMI2]],<br />[[Intel SHA Extensions|SHA]]
| rowspan="23" |
|-
| rowspan="2" |{{Date table sorting|April 2022}}
|Ryzen 5 5600<br />Ryzen 7 5700X
|6/8
|3400–3500 (4400–4600 boost)
|-
|Ryzen 7 5800X3D
|8
|3400 (4500 boost)
|96&nbsp;MB
|-
| rowspan="3" |{{Date table sorting|January 2021}}
| rowspan="6" |Cezanne
|Ryzen 3 (5300G, 5300GE, 5400U)
|4
|2600–4000 (4000–4200 boost)
|8&nbsp;MB
| rowspan="17" |Mobile:<br> [[Socket FP6]]

Desktop:<br>[[Socket AM4]]
| rowspan="17" |Mobile:<br> Dual-channel [[DDR4]] or [[LPDDR4]]

Desktop:<br> Dual-channel [[DDR4]]
|-
|Ryzen 5 (5600G, 5600GE, 5600U, 5600H, 5600HS)
|6
|2300–3900 (4200–4400 boost)
| rowspan="2" |16&nbsp;MB
|-
|Ryzen 7 (5700G, 5700GE, 5800U, 5800H, 5800HS)<br />Ryzen 9 (5900HS, 5900HX, 5980HS, 5980HX)
|8
|1900–3800 (4400–4800 boost)
|-
| rowspan="3" |{{Date table sorting|June 2021}}
|Ryzen 3 PRO (5350G, 5350GE)
|4
|3600–4000 (4200 boost)
|8&nbsp;MB
|-
|Ryzen 5 PRO (5650G, 5650GE)
|6
|3400–3900 (4400 boost)
| rowspan="2" |16&nbsp;MB
|-
|Ryzen 7 PRO (5750G, 5750GE)
|8
|3200–3800 (4600 boost)
|-
|{{Date table sorting|May 2022}}
| rowspan="10" |Cezanne / Barcelo<ref>{{Cite web |last=Cutress |first=Dr Ian |title=AMD's Barcelo: Zen 3 APU Refresh for 2022 |url=https://www.anandtech.com/show/17190/amds-barcelo-zen-3-apu-refresh-for-2022 |access-date=2022-05-15 |website=www.anandtech.com}}</ref>
|Ryzen 3 5125C
|2
|3000
| rowspan="4" |8&nbsp;MB
|-
|{{Date table sorting|January 2022}}
|Ryzen 3 5425U
| rowspan="3" |4
| rowspan="3" |2700 (4100 boost)
|-
|{{Date table sorting|April 2022}}
|Ryzen 3 PRO 5475U
|-
|{{Date table sorting|May 2022}}
|Ryzen 3 5425C
|-
|{{Date table sorting|January 2022}}
|Ryzen 5 5625U 
| rowspan="3" |6
| rowspan="3" |2300 (4300 boost)
| rowspan="6" |16&nbsp;MB
|-
|{{Date table sorting|April 2022}}
|Ryzen 5 PRO 5675U
|-
|{{Date table sorting|May 2022}}
|Ryzen 5 5625C
|-
|{{Date table sorting|January 2022}}
|Ryzen 7 5825U
| rowspan="3" |8
| rowspan="3" |2000 (4500 boost)
|-
|{{Date table sorting|April 2022}}
|Ryzen 7 PRO 5875U
|-
|{{Date table sorting|May 2022}}
|Ryzen 7 5825C
|-
|January 2023
|Barcelo-R
|Ryzen 7030
|4/6/8
|2000–2300 (4300–4500)
|8–16&nbsp;MB
|-
|{{Date table sorting|March 2021}}
|Milan
|[[Epyc|EPYC]] 7003 series
|8/16/24/28/32/48/56/64
|2000–3700 (3450–4100 boost)
|64–256&nbsp;MB<br />(16–32&nbsp;MB per CCD/CCX)
| rowspan="2" |[[Socket SP3]]
| rowspan="3" |Octa-channel [[DDR4]]
|-
|{{Date table sorting|March 2022}}
|Milan-X<ref>{{Cite web |last=Bonshor |first=Gavin |title=AMD Releases Milan-X CPUs With 3D V-Cache: EPYC 7003 Up to 64 Cores and 768 MB L3 Cache |url=https://www.anandtech.com/show/17323/amd-releases-milan-x-cpus-with-3d-vcache-epyc-7003 |access-date=2022-03-29 |website=www.anandtech.com}}</ref>
|[[Epyc|EPYC]] 7003X series
|16/24/32/64
|2200–3050 (3500–3800 boost)
|768&nbsp;MB
|-
|{{Date table sorting|March 2022}}
|Chagall<ref>{{Cite web |last=Bonshor |first=Gavin |title=AMD Announces Ryzen Threadripper Pro 5000 WX-Series: Zen 3 For OEM Workstations |url=https://www.anandtech.com/show/17296/amd-announces-ryzen-threadripper-pro-5000-wx-series-zen-3-core-for-oem-workstations |access-date=2022-03-29 |website=www.anandtech.com}}</ref>
|Ryzen Threadripper Pro (5945WX, 5955WX, 5965WX, 5975WX, 5995WX)
|12/16/24/32/64
|2700–4100 (4500 boost)
|64–256&nbsp;MB<br />(32&nbsp;MB per CCD/CCX)
|[[Socket sWRX8]]
|-
| rowspan="3" |6
[[7 nm process|TSMC N6]]
| rowspan="3" |[[Zen 3+]]
|{{Date table sorting|January 2022}}
| rowspan="2" |Rembrandt<ref>{{Cite web|last=Cutress|first=Dr Ian|title=AMD Announces Ryzen 6000 Mobile CPUs for Laptops: Zen3+ on 6nm with RDNA2 Graphics|url=https://www.anandtech.com/show/17166/amd-announces-ryzen-6000-mobile-cpus-for-laptops-zen3-on-6nm-with-rdna2-graphics|access-date=2022-01-30|website=www.anandtech.com}}</ref><ref>{{Cite web|title=CPU Specs Database entries with codename Rembrandt|url=https://www.techpowerup.com/cpu-specs/?codename=Rembrandt&sort=name|access-date=2022-02-24|website=TechPowerUp|language=en}}</ref><ref>{{Cite web|title=AMD Ryzen 5 6600U Specs|url=https://www.techpowerup.com/cpu-specs/ryzen-5-6600u.c2522|access-date=2022-02-24|website=TechPowerUp|language=en}}</ref>
|Ryzen 5 (6600U, 6600H, 6600HS)<br />Ryzen 7 (6800U, 6800H, 6800HS)<br />Ryzen 9 (6900HS, 6900HX, 6980HS, 6980HX)
| rowspan="2" |6/8
| rowspan="3" {{Yes}}
|2700–3300 (4500–5000 boost)
| rowspan="3" |
| rowspan="3" |32&nbsp;KB {{abbr|inst.|instruction}}<br />32&nbsp;KB data<br />per core
| rowspan="3" |512&nbsp;KB<br />per core
| rowspan="3" |16&nbsp;MB
| rowspan="3" |[[Socket FP7]]
| rowspan="3" |Dual-channel [[DDR5 SDRAM|DDR5]] or [[LPDDR|LPDDR5]]
| rowspan="3" |MMX(+), [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3|SSE3s]], [[SSE4a]], [[SSE4.1]], [[SSE4.2]] x86-64, AMD-V,  [[Advanced Vector Extensions|AVX]], [[Advanced Vector Extensions|AVX2]]
| rowspan="3" |
| rowspan="3" |[[AMD64]], [[AES instruction set|AES]],<br />[[CLMUL]], [[FMA3]],<br />[[CVT16 instruction set|CVT16]]/[[F16C]], [[Bit Manipulation Instruction Sets|ABM]],<br />[[Bit Manipulation Instruction Sets|BMI1]], [[Bit Manipulation Instruction Sets|BMI2]],<br />[[Intel SHA Extensions|SHA]]
| rowspan="3" |
|-
|{{Date table sorting|April 2022}}
|Ryzen 5 PRO (6650U, 6650H, 6650HS)<br />Ryzen 7 PRO (6850U, 6850H, 6850HS)<br />Ryzen 9 PRO (6950H, 6950HS)
|2700–3300 (4500–4900 boost)
|-
|January 2023
|Rembrandt-R
|Ryzen 7035
|4/6/8
|2700–3300 (4300–4750)
|-
| rowspan="7" |5
[[5 nm process|TSMC N5]]
| rowspan="7" |[[Zen 4]]
|September 2022
| rowspan=4 |Raphael
|Ryzen 5 (7600X)<br />Ryzen 7 (7700X)<br />Ryzen 9 (7900X, 7950X)
|6/8/12/16
| rowspan="7" {{Yes}}
|4500–4700 (5300–5700 boost)
| rowspan=4 |16.0&nbsp;[[Transfer (computing)|GT]]/s<br />PCIe
| rowspan="7" |32&nbsp;KB {{abbr|inst.|instruction}}<br />32&nbsp;KB data<br />per core
| rowspan="7" |1&nbsp;MB<br />per core
| rowspan=2 |32–64&nbsp;MB<br />(32&nbsp;MB per CCD/CCX)
| rowspan=4 |[[Socket AM5]]
| rowspan=4 |Dual-channel [[DDR5 SDRAM|DDR5]]
| rowspan="7" |MMX(+), [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3|SSE3s]], [[SSE4a]], [[SSE4.1]], [[SSE4.2]] x86-64, AMD-V,  [[Advanced Vector Extensions|AVX]], [[Advanced Vector Extensions|AVX2]], [[AVX-512]]
| rowspan="7" |
| rowspan="7" |[[AMD64]], [[AES instruction set|AES]],<br />[[CLMUL]], [[FMA3]],<br />[[CVT16 instruction set|CVT16]]/[[F16C]], [[Bit Manipulation Instruction Sets|ABM]],<br />[[Bit Manipulation Instruction Sets|BMI1]], [[Bit Manipulation Instruction Sets|BMI2]],<br />[[Intel SHA Extensions|SHA]]
| rowspan="7" |'''{{Color|#009E73|+&nbsp;{{colored link|#009E73|AVX-512}}}}'''
|-
|January 2023
|Ryzen 5 7600<br />Ryzen 7 7700<br />Ryzen 9 7900
|6/8/12
|3700–3800 (5100–5400 boost)
|-
|April 2023
|Ryzen 7 7800X3D
|8
|4200 (5000 boost)
|96&nbsp;MB
|-
|February 2023
|Ryzen 9 7900X3D<br />Ryzen 9 7950X3D
|12/16
|4200–4400 (5600–5700 boost)
|96+32&nbsp;MB
|-
|March 2023
|Phoenix
|Ryzen 7040
|6/8
|3800–4300 (5000–5200)
|{{none}}
|16&nbsp;MB
|Socket FP7, FP7r2, FP8
|Dual-channel [[DDR5 SDRAM|DDR5]] or [[LPDDR5X]]
|-
|February 2023
|Dragon Range
|Ryzen 7045
|6/8/12/16
|2500–4000 (5000–5400 boost)
|{{none}}
|32–64&nbsp;MB<br />(32&nbsp;MB per CCD/CCX)
|Socket FL1
|Dual-channel [[DDR5 SDRAM|DDR5]]
|-
|November 2022
|Genoa
|[[Epyc|EPYC]] 9004 series
|16/24/32/48/64/84/96
|2250–4100 (3700–4400 boost)
|32.0&nbsp;[[Transfer (computing)|GT]]/s<br />PCIe
|64–384&nbsp;MB<br />(32&nbsp;MB per CCD/CCX)
|[[Socket SP5]]
|Dodeca-channel [[DDR5 SDRAM|DDR5]]
|-
! rowspan="2" | [[Microarchitecture|Architecture]]
! rowspan="2" | [[Semiconductor device fabrication|Fabrication]]
! rowspan="2" | Family
! rowspan="2" | Release Date
! rowspan="2" | Code Name
! rowspan="2" | Model Group
! rowspan="2" | Cores
! rowspan="2" |[[Simultaneous multithreading|SMT]]
! rowspan="2" | [[Clock rate]] ([[Hertz|MHz]])
! rowspan="2" | [[Bus (computing)|Bus]] Speed<br />&&nbsp;Type{{efn|name="bus"}}
! [[CPU cache|L1]]
! [[CPU cache|L2]]
! [[CPU cache|L3]]
! rowspan="2" | [[CPU socket|Socket]]
! rowspan="2" | Memory Controller
! [[SIMD]]
! Speed/Power
! Other
! Changes
|-
! colspan="3" | Cache
! colspan="4" | Features
|}

{{notelist|refs=
{{efn|name="bus"|Type can be [[Front side bus]] (FSB), [[HyperTransport]] (HT), [[Unified Media Interface]] (UMI), or [[PCI Express]] (PCIe).}}
}}

==References==
{{Reflist}}

==See also==

* [[List of AMD microprocessors]]
* [[List of AMD CPU microarchitectures]]
* [[List of AMD mobile microprocessors]]
* [[List of AMD Athlon microprocessors]]
* [[List of AMD Athlon XP microprocessors]]
* [[List of AMD Athlon 64 microprocessors]]
* [[List of AMD Athlon X2 microprocessors]]
* [[List of AMD Duron microprocessors]]
* [[List of AMD Sempron microprocessors]]
* [[List of AMD Turion microprocessors]]
* [[List of AMD Opteron microprocessors]]
* [[List of AMD Epyc microprocessors]]
* [[List of AMD Phenom microprocessors]]
* [[List of AMD FX microprocessors]]
* [[List of AMD Ryzen microprocessors]]
* [[List of AMD processors with 3D graphics]]
* [[List of Intel processors|List of Intel microprocessors]]
* [[List of Intel CPU microarchitectures]]
* [[Comparison of Intel processors]]

{{AMD CPU sockets}}
{{AMD processors}}

{{DEFAULTSORT:Comparison Of Amd Processors}}
[[Category:Lists of microprocessors|AMD]]
[[Category:AMD x86 microprocessors|*]]
[[Category:Computing comparisons|AMD Processors]]