View source for PowerPC 400

{{Short description|Family of processor cores}}
{{POWER, PowerPC, and Power ISA}}

The '''PowerPC 400''' family is a line of [[32-bit]] [[Embedded system|embedded]] [[RISC]] [[microprocessor|processor cores]] based on the [[PowerPC]] or [[Power ISA]] [[instruction set architecture]]s. The cores are designed to fit inside specialized applications ranging from [[system-on-a-chip]] (SoC) [[microcontroller]]s, network appliances, [[application-specific integrated circuit]]s (ASICs) and [[field-programmable gate array]]s (FPGAs) to [[set-top box]]es, storage devices and [[supercomputer]]s.

[[Applied Micro Circuits Corporation]] (AMCC) bought assets concerning the 400 family cores from IBM in April 2004 for $227 million, and they now market the processors under their own name.  IBM continues evolving the cores while supplying design and [[Foundry (electronics)|foundry]] services around the cores. Several cores are also available for licensing by [[Original Equipment Manufacturer|OEM]]s from IBM and [[Synopsys]].

== Variants ==
{| class="wikitable"
|-
! Name
! Pipeline stages
|-
| PowerPC 401
| 3
|-
| PowerPC 405
| 5
|-
| PowerPC 440
| 7
|-
| PowerPC 470
| 9
|}

=== PowerPC 403 ===
Introduced in 1994, the PowerPC 403 was one of the first [[PowerPC]] processors. It was the first one targeted strictly to the embedded market. Compared to the other PowerPC processors of the era ([[PowerPC 600#PowerPC 601|PowerPC 601]], [[PowerPC 600#PowerPC 603|PowerPC 603]] and [[PowerPC 600#PowerPC 604|PowerPC 604]]), it was at the very low end, lacking a [[memory management unit]] (MMU) or [[floating-point unit]] (FPU), for instance. The core was offered for custom chips and in pre packaged versions, including versions with MMU, speeds ranging from 20 to 80&nbsp;MHz.

The PowerPC 403 is used in, among other appliances, [[thin client]]s, [[set-top box]]es, [[RAID]]-controllers, [[network switch]]es and printers. The first [[TiVo]] used a 54&nbsp;MHz PowerPC 403GCX.

[[Applied Micro Circuits Corporation|AMCC]] acquired the design of 403 from IBM in 2004, but have chosen not to market it, instead focusing on the 405 and 440 cores.

=== PowerPC 401 ===
While the 403 was popular, it was also too high performance and too costly for some applications, so in 1996 IBM released a bare bones PowerPC core, called PowerPC 401. It has a single issue, three-stage pipeline, with no MMU or DMA and only 2&nbsp;KB instruction and 1&nbsp;KB data L1 [[CPU cache|caches]]. The design contained just 85,000 transistors in all and operated at up to 100&nbsp;MHz, drawing only 0.1&nbsp;W or less. Applications using the 401 core range from set-top boxes and telecom switches to printers and fax machines.<ref>[http://www.byte.com/art/9608/sec5/art3.htm The PowerPC Goes Consumer] {{webarchive|url=https://web.archive.org/web/20060526131532/http://www.byte.com/art/9608/sec5/art3.htm |date=2006-05-26 }}, BYTE, Sept 1996</ref><ref>[https://web.archive.org/web/20050119055124/http://www-03.ibm.com/chips/products/digitalvideo/products/ppc.html 401 based Set-top box, IBM]</ref>

=== {{Anchor|405}}PowerPC 405 ===
[[File:Platine-netzwerk hg (cropped) PowerPC 405GP.jpg|thumb|PowerPC 405GP in a [[Sun StorageTek SL8500]]]]
[[File:IBM STB04500.jpg|thumb|IBM '''STB04500''' in a ''Dilog DT 550''. A [[set top box]] powered by a 252 MHz PowerPC 405 based SoC.]]

The PowerPC 405 was released in 1998 and was designed for price or performance sensitive low-end embedded [[system-on-a-chip]] (SoC) designs. It has a five-stage pipeline, separate 16&nbsp;KB instruction and data L1 [[CPU cache|caches]], a [[CoreConnect|CoreConnect bus]], an Auxiliary Processing Unit (APU) interface for expandability and supports clock rates exceeding 400&nbsp;MHz. The 405 core adheres to the [[Power ISA#Power ISA v.2.03|Power ISA v.2.03]] using the Book III-E specification. Both AMCC and IBM are developing and marketing processors using 405 cores. IBM and [[Synopsys]] also offers a fully synthesizable core. IBM has announced plans to make the specifications of the PowerPC 405 core freely available to the academic and research community.<ref>{{cite web|url=http://www.power.org/news/articles/405download/|title=IBM's PowerPC 405 Core Available for Qualified Academic and Research Community|work=Power.org|access-date=2006-11-14|archive-url=https://web.archive.org/web/20070524051707/http://www.power.org/news/articles/405download/|archive-date=2007-05-24|url-status=dead}}</ref>

PowerPC-405-based applications include digital cameras, modems, set-top boxes (IBM's STB04xxx processors<ref>{{cite web|url=http://www-01.ibm.com/chips/techlib/techlib.nsf/products/STB043xx_-_STB045xx_Set-Top_Box_Integrated_Controllers|title=STB043xx - STB045xx Set-Top Box Integrated Controllers - IBM Microelectronics}}</ref>), cellphones, GPS-devices, printers, fax machines, [[network card]]s, network switches, storage devices and service processors for servers. Up to two 405 cores are used in [[Xilinx]] Virtex-II Pro and Virtex-4 [[FPGA]]s. In 2004 [[Hifn]] bought IBM's PowerNP [[network processor]]s that uses 405 cores.<ref>{{Cite web| title=Hifn Acquires Picoprocessor PowerNP Products from IBM | url=http://www.hifn.com/uploadedFiles/Company/News_and_Events/Press_Releases/20040105.pdf | archive-url=https://web.archive.org/web/20070928072843/http://www.hifn.com/uploadedFiles/Company/News_and_Events/Press_Releases/20040105.pdf | archive-date=2007-09-28}}</ref><ref>[https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/8493418A173C1AC200257559007274AC PPC405-S Embedded Processor Core User’s Manual] {{webarchive|url=https://web.archive.org/web/20120301001944/https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/8493418A173C1AC200257559007274AC |date=2012-03-01 }}</ref><ref>Halfhill, Tom R. (12 July 1999). "PowerPC 405GP Has CoreConnect Bus". ''[[Microprocessor Report]]''.</ref><ref>Halfhill, Tom R. (11 November 2002). "IBM PowerPC 405EP Expands Family". ''[[Microprocessor Report]]''.</ref>

;{{Visible anchor|PlayStation 2}}
{{Main|PlayStation 2}}
:Later versions of the PlayStation 2 slim used a PowerPC 405 chip emulating the MIPS [[R3000|R3000A]] that was used as the I/O processor in earlier models.<ref>{{Cite web|title=IOP/Deckard|url=https://playstationdev.wiki/ps2devwiki/index.php?title=IOP/Deckard|website=PS2 Dev Wiki}}</ref>

;{{Visible anchor|V-Dragon}}
: The [[People's Republic of China|Chinese]] company Culturecom uses a 405 core for its '''V-Dragon''' processor which powers [[Linux]] terminals and set-top-boxes. The V-Dragon processor includes the Multilingual Character Generation Engine (MCGE) that processes and generates [[Chinese character]]s directly in the CPU.<ref>{{cite web |url=http://www.culturecom.com.hk/en/index.php?bx_vdragon |title=Culturecom |access-date=2007-09-27 |url-status=dead |archive-url=https://web.archive.org/web/20070930015147/http://www.culturecom.com.hk/en/index.php?bx_vdragon |archive-date=2007-09-30 }}</ref>

; APM801xx
: [[AppliedMicro]] has a series of system on a chip products based on PowerPC 405 core, under a new name: '''APM801xx'''. These are the most energy efficient Power Architecture products to date (Fall 2010), and supports frequencies up to 800&nbsp;MHz at ~1 W, or 0.3 W idling. Made to support a wide range of applications from networking, to storage and media devices.<ref>{{cite web|url=http://embedded-computing.com/appliedmicro-video-enabled-consumer-devices|title=AppliedMicro APM801xx Energy-Efficient Processor Family Targets 1-Watt Video-Enabled Consumer Devices|work=Embedded Computing Design|access-date=2010-08-16|archive-url=https://web.archive.org/web/20100525092725/http://embedded-computing.com/appliedmicro-video-enabled-consumer-devices|archive-date=2010-05-25|url-status=dead}}</ref>

; POWER8 on-chip controller
: The [[POWER8]] processor contains an embedded on-chip power and thermal management microcontroller, called [[POWER8 on-chip controller|on-chip controller]] (OCC).  Based on a PowerPC&nbsp;405 processor with 512&nbsp;KB of dedicated [[Static random-access memory|static RAM]] (SRAM), OCC monitors the entire chip.<ref>{{Cite web
 | url = http://openpowerfoundation.org/press-releases/occ-firmware-code-is-now-open-source/
 | title = OCC Firmware Code is Now Open Source
 | date = 2014-12-20
 | access-date = 2014-12-27
 | author = Todd Rosedahl
 | website = openpowerfoundation.org
 | archive-date = 2014-12-27
 | archive-url = https://web.archive.org/web/20141227113143/http://openpowerfoundation.org/press-releases/occ-firmware-code-is-now-open-source/
 | url-status = dead
 }}</ref>

=== PowerPC 440 ===<!-- This section is linked from [[PowerPC]] -->
[[File:AMCC PowerPC 440SPe.jpg|thumb|A 533 MHz [[Applied Micro Circuits Corporation|AMCC]] PowerPC 440SPe processor from a [[RAID]] card in an Apple [[Xserve]].]]

Introduced in 1999, the PowerPC 440 was the first PowerPC core from IBM to include the ''Book E'' extension to the PowerPC specification. It also included the [[CoreConnect]] bus technology designed to be the interface between the parts inside a PowerPC based [[system-on-a-chip]] (SoC) device.

It is a high-performance core with separate 32&nbsp;KB instruction and data L1 [[CPU cache|caches]], a seven-stage out-of-order dual-issue pipeline, supporting speeds of up to 800&nbsp;MHz and L2 caches up to 256&nbsp;KB. The core lacks a [[floating-point unit]] (FPU) but it has an associated four-stage FPU that can be included using the APU (Auxiliary Processing Unit) interface. The 440 core adheres to the [[Power ISA#Power ISA v.2.03|Power ISA v.2.03]] using the Book III-E specification.

Xilinx currently incorporates one or two cores (depending on the member of the family) into the Virtex-5 FXT FPGA.

Both AMCC and IBM are developing and marketing stand alone processors using 440 cores. IBM and [[Synopsys]] also offers fully synthesized cores.

; BRE440 Rad Hard SOC
: Broad Reach Engineering has used the IBM 440 synthesized core to build a radiation-hardened embedded SoC that includes various peripherals (two Ethernet MACs, PCI, memory controllers, DMA controllers, EDAC and SIO), 32&nbsp;KB of L1 cache, and 256&nbsp;KB of L2 cache. This device was built using the Honeywell HX5000 rad hard process at 150&nbsp;nm. The BRE440 runs at clock speeds ranging from tens of MHz up to 150&nbsp;MHz.

; QCDOC
: [[QCDOC]] is a custom supercomputer built to solve small but extremely computationally demanding problems in [[quantum physics]]. It uses custom 440-based ASICs to obtain a peak performance of approximately 10&nbsp;TFLOPS.

; Blue Gene/L
: Dual 440 cores are used in the processors powering [[IBM]]'s [[Blue Gene|Blue Gene/L]] [[supercomputer]], which until June 2008 ranked number one on the list of the [[top 500]] supercomputers around the world, with a peak performance of nearly 500 [[teraFLOPS]] in 2008.

; SeaStar
: The 440 core is also used in the [[Cray XT3]], [[Cray XT4|XT4]] and [[Cray XT5|XT5]] supercomputers, where its SeaStar,  SeaStar2 and SeaStar2+ communication processors closely couples [[HyperTransport]] memory interface with routing to other nodes in supercomputer clusters. The SeaStar device provides a 6.4&nbsp;GB/s connection to the [[Opteron]] based processors across HyperTransport (together making a processing element, PE), as well as six 7.6&nbsp;GB/s links to neighboring PEs. SeaStar2+ offers 9.6&nbsp;GB/s intra-node bandwidth and error correcting functionality to intercept errors en route between computing nodes.

; AMCC 460
: The PowerPC 460EX and 460GT from AMCC are, despite their name, processors with the 440 core.<ref>{{cite web
| url = http://www.appliedmicro.com/MyAMCC/retrieveDocument/PowerPC/460EX/PPC460EX_PB2027.pdf
| title = PowerPC 460EX Embedded Processor
}}</ref> They are available at 0.6 to 1.2&nbsp;GHz and have integrated controllers for DDR or DDR2 SDRAM, USB 2.0, PCIe, SATA, and Gigabit Ethernet.

; Titan
: [[Intrinsity]] designed the now defunct [[Titan (microprocessor)|Titan core]] for AppliedMicro from the ground up using the PowerPC 440 core spec. AppliedMicro used the Titan core in their APM832xx family high performance system on a chip products but these parts never came to market.

; Virtex-5 FXT
: In its Virtex-5 FXT [[FPGA]] product line, [[Xilinx]] embeds up to two PPC440 cores. The embedded PPC440 has a maximum frequency of 550&nbsp;MHz, and connects to the surrounding FPGA-fabric through a special crossbar switch, increasing the Virtex-5 FXT family's system performance over 2.6 times compared to the Virtex-4 FX family's embedded PPC405.

; LSI SAS
: [[LSI Corporation|LSI]] uses the PowerPC 440 core in a number of its [[Serial Attached SCSI|SAS]] controller chips, including the widely used SAS2008 variant.<ref>{{cite web|url=http://www.avagotech.com/products/server-storage/io-controllers/sas-2008#specifications|title=SAS2008 I/O Controller}}</ref>

; Acalis CPU872
: The Acalis CPU872 is a highly specialized Security SoC chip built by [http://cputech.com/ CPU Tech] {{Webarchive|url=https://web.archive.org/web/20110714162951/http://www.cputech.com/ |date=2011-07-14 }}. It is designed for highly sensitive and mission critical systems such as military applications. It has provisions to prevent tampering and [[reverse engineering]] and is manufactured at IBM's highly secure Trusted Foundry. It has embedded [[DRAM]], dual 440 cores with dual precision FPUs and auxiliary computing units providing acceleration and protection for communications, complex algorithms and synchronization between cores.<ref>{{cite press release|url=http://www.businesswire.com/news/home/20080428005402/en|title=CPU Tech Launches Acalis(R) CPU872 MultiCore PowerPC(R) with Embedded DRAM and Tamper Protection - Business Wire|date=28 April 2008}}</ref>

=== PowerPC 450 ===
The processing core of the [[Blue Gene|Blue Gene/P]] supercomputer is designed and manufactured by IBM. It is very similar to the PowerPC 440 but few details are disclosed.

; Blue Gene/P
: The [[Blue Gene|Blue Gene/P]] processor consists of four PowerPC 450 cores running at 850&nbsp;MHz reaching 13.6 [[gigaflops]] in total. IBM is claiming very power efficient design compared to other supercomputer processors.<ref>{{cite web|url=http://www-03.ibm.com/press/us/en/pressrelease/21791.wss|archive-url=https://archive.today/20120530045144/http://www-03.ibm.com/press/us/en/pressrelease/21791.wss|url-status=dead|archive-date=May 30, 2012|title=IBM News room - 2007-06-26 IBM Triples Performance of World's Fastest, Most Energy-Efficient Supercomputer - United States}}</ref>

=== PowerPC 460 ===
Introduced in 2006, the 460 cores are similar to the 440 but reach 1.4&nbsp;GHz, are developed with [[Multi-core (computing)|multi-core]] applications in mind and have 24 additional [[digital signal processing]] (DSP) instructions. The cores are designed to be low-power but high performance and the 464-H90 is expected to draw only 0.53&nbsp;W at 1&nbsp;GHz. The 460 core adheres to [[Power ISA#Power ISA v.2.03|Power ISA v.2.03]] using the Book III-E specification.

* PowerPC 460S{{snd}} a completely synthesized core and can be licensed from IBM or Synopsys for manufacturing on different [[Foundry (electronics)|foundries]]. 460S can be configured with different amounts of L1 and L2 cache as well as with or without SMP and FPU.<ref>{{cite web|url=http://edablog.com/2008/11/11/synopsys-synthesizable/|title=IBM PowerPC 460 Microprocessor Cores|access-date=2008-11-16|archive-url=https://web.archive.org/web/20150530163653/http://edablog.com/2008/11/11/synopsys-synthesizable/|archive-date=2015-05-30|url-status=dead}}</ref>
* PowerPC 464-H90{{snd}} a 90&nbsp;nm, hard core (not synthesizable), released in 2006, will offer a customizable core for [[Application-specific integrated circuit|ASIC]]s that can be manufactured with IBM or at manufacturing facilities at Chartered or [[Samsung]].
* PowerPC 464FP-H90{{snd}} released in 2007, is a hard core that adds a double-precision [[floating-point unit]] (FPU).

==== AppliedMicro ====
* PowerPC 460SX and 460GTx are based on the 464-H90 core. They are targeted towards very high-end storage and networking applications, respectively. They run at 0.8 to 1.2&nbsp;GHz, have 512&nbsp;KB of L2 cache that doubles as [[Static random access memory|SRAM]] storage, a 400&nbsp;MHz clock DDR2 memory controller, four Gigabit Ethernet controllers, PCIe controllers and a variety of application-specific accelerators and controller facilities. They are manufactured on a 90&nbsp;nm process.
* APM82181{{snd}} a 0.8–1&nbsp;GHz 464-based SoC designed for storage devices. DDR2-controller, 256&nbsp;KB [[Static random-access memory|SRAM]] configurable as L2 cache. PCIe, SATA2, USB2, Gbit Ethernet and various other I/O interfaces and accelerators like TCP/IP offloading, and RAID5 and cryptography accelerators
* APM86190 and APM86290 PACKETpro{{snd}} codenamed "Mamba", they are single and dual core SoC processors based on the PowerPC 465 core, running at 0.6–1.5&nbsp;GHz. 32&nbsp;KB instruction/32&nbsp;KB data L1 caches and 256&nbsp;KB L2 cache, DDR3 controller, PCIe, SATA2, USB2, Gbit Ethernet and various other I/O interfaces and accelerators like TCP/IP offloading and a cryptography accelerator with non-volatile storage for crypto keys and secure boot and tampering detection.
* APM86791 PACKETpro{{snd}} codenamed "Keelback", it is a single core SoC processor based on the PowerPC 465 core running at 1&nbsp;GHz with 32&nbsp;KB instruction/32&nbsp;KB data L1 caches and 256&nbsp;KB L2 cache, DDR3 controller, 2x PCIe, 2x SATA2, 2x USB2, 4x Gbit Ethernet. It also incorporates an [[ARM Cortex-M3]] based cryptography accelerator named SLIMpro running at 250&nbsp;MHz that allows secure booting from ROM and tempering detection.<ref>[http://www.linleygroup.com/newsletters/newsletter_detail.php?num=4719 ARM CPU Secures APM Processor] – The Liney Group</ref><ref>[http://www.eetimes.com/electronics-news/4216633/Applied-Micro-adds-ARM-core-to-cut-down-security-processor Applied Micro adds ARM core in cut down security processor] – EETimes</ref>

=== PowerPC 470 ===
The 470 embedded and customizable core, adhering to the [[Power ISA#Power ISA v.2.05|Power ISA v2.05]] Book III-E, was designed by IBM together with [[LSI Corporation|LSI]] and implemented in the PowerPC 476FP in 2009.<ref>{{cite web|url=http://www.ibm.com/press/us/en/pressrelease/28399.wss|title=IBM News room - 2009-09-15 IBM Announces Highest Performance Embedded Processor for System-on-Chip Designs - United States|website=[[IBM]]|archive-url=https://web.archive.org/web/20091002200759/http://www-03.ibm.com/press/us/en/pressrelease/28399.wss |archive-date=2009-10-02 |url-status=dead }}</ref> The 476FP core has 32/32&nbsp;KB L1 cache, dual integer units and a [[SIMD]]-capable double-precision [[floating-point unit|FPU]] that handles [[Digital signal processor|DSP]] instructions. Emitting 1.6 W at 1.6&nbsp;GHz on a 45&nbsp;nm fabrication process. The 9 stage out of order, 5-issue pipeline handles speeds up to 2&nbsp;GHz, supports the PLB6 bus, up to 1&nbsp;MB L2 cache and up to 16 cores in [[symmetric multiprocessing|SMP]] configurations.

* LSI Axxia ACP3448{{snd}} 1.8&nbsp;GHz, 4× 476FP cores, 512&nbsp;KB L2 cache per core, 4&nbsp;MB L3 cache on chip, 2× DDR3 controllers, 2× 10&nbsp;Gbit Ethernet, 3× PCIe, and a variety of network-processing engines<ref>{{cite web|url=http://www.prnewswire.com/news-releases/new-axxia-communication-processor-from-lsi-features-asymmetric-multicore-architecture-and-breakthrough-performance-83935107.html|title=New Axxia Communication Processor From LSI Features Asymmetric Multicore Architecture and Breakthrough Performance|date=9 February 2010|publisher=LSI Corporation}}</ref>
* C*Core C1000{{snd}} a family of 476FP-core-based embedded processors for consumer electronics<ref>{{cite web|url=http://www.eetimes.com/electronics-news/4218428/China-IP-provider-plans-Power-family|title=China IP provider plans Power family|work=EETimes}}</ref>
* ChinaChip CC2000{{snd}} a 476FP-core-based processor with integrated DSP and GPU for game consoles
* [[NTC Module]] [[NeuroMatrix#1888TKh018|1888TKh018]]{{snd}} SoC for aircraft onboard video and multimedia processing systems

== See also ==
* [[Power.org]]
* [[CoreConnect]]

== References ==
{{Reflist|40em}}

== Further reading ==
* Halfhill, Tom R. (25 October 1999). "IBM PowerPC 440 Hits 1,000 MIPS". ''[[Microprocessor Report]]''.
* Halfhill, Tom R. (21 July 2000). "PowerPC 440GP: Great Communicator". ''[[Microprocessor Report]]''.

== External links ==
* [https://web.archive.org/web/20110811002304/https://www-01.ibm.com/chips/techlib/techlib.nsf/products/PowerPC_405_Embedded_Cores 405 core]
* [https://web.archive.org/web/20120205002338/https://www-01.ibm.com/chips/techlib/techlib.nsf/products/PowerPC_440_Embedded_Core IBM PowerPC 440 core]
* [https://web.archive.org/web/20090130065556/http://www-01.ibm.com/chips/techlib/techlib.nsf/products/PowerPC_460S_Embedded_Core IBM PowerPC 460 core]
* [https://web.archive.org/web/20061016025347/http://www.amcc.com/Embedded/ AMCC PowerPC 400 page]

[[Category:PowerPC microprocessors|400]]
[[Category:IBM microprocessors|400]]
[[Category:Power microprocessors]]
[[Category:32-bit microprocessors]]