View source for Motorola 68060

{{Short description|Motorola 680x0 microprocessor, released in April 1994}}
{{Refimprove|date=May 2009}}
{{Infobox CPU
| name           = 
| image          = MC68060RC50.jpg
| image_size     = 
| caption        = [[Die shot]] of a Motorola MC68060RC50
| produced-start = April 1994
| produced-end   = 
| slowest        = 50 MHz
| fastest        = 75 MHz; up to 133 MHz overclocked,<ref name="natami"/><ref name="auto">{{Cite web |url=https://www.amigawiki.org/doku.php?id=de:parts:68060_mask |title=68060 Masken und Fakes |access-date=2017-08-11 }}</ref> or even 150 MHz with proper cooling<ref name="auto1">{{Cite web|url=https://www.amibay.com/threads/fastest-motorola-68ks-can-go.2444761/|title=Fastest Motorola 68Ks can go.|website=AmiBay}}</ref>
| slow-unit      = 
| fast-unit      = 
| fsb-slowest    = 
| fsb-fastest    = 
| fsb-slow-unit  = 
| fsb-fast-unit  = 
| hypertransport-slowest   = 
| hypertransport-fastest   = 
| hypertransport-slow-unit = 
| hypertransport-fast-unit = 
| qpi-slowest    = 
| qpi-fastest    = 
| qpi-slow-unit  = 
| qpi-fast-unit  = 
| dmi-slowest    = 
| dmi-fastest    = 
| dmi-slow-unit  = 
| dmi-fast-unit  = 
| size-from      = 
| size-to        = 
| soldby         = 
| designfirm     = Motorola
| manuf1         = 
| core1          = 
| sock1          = 
| pack1          = 
| brand1         = 
| arch           = [[Motorola 68000 series]]
| microarch      = 
| instructions   =
| extensions     =
| data-width     =
| address-width  =
| virtual-width  =
| cpuid          = 
| code           = 
| numcores       = 
| l1cache        = 
| l2cache        = 
| l3cache        = 
| l4cache        = 
| llcache        = 
| gpu            =
| application    = [[Desktop computer]]s and [[embedded system]]s
| predecessor    = [[Motorola 68040]]
| successor      = [[PowerPC]], [[Motorola ColdFire]]
| co-processor   =
| variant        = 68LC060 and 68EC060
}}
[[Image:KL Motorola MC68060.jpg|thumb|A Motorola 68EC060 microprocessor]]
The '''Motorola 68060''' ("''sixty-eight-oh-sixty''") is a [[32-bit computing|32-bit]] [[microprocessor]] from [[Motorola]] released in April 1994.<ref name = Foundations>{{cite book | url = https://books.google.com/books?id=6PUH68h45BsC&pg=PA70| page = 70 | title = Foundations of computer technology | first = A. John | last = Anderson | publisher = CRC Press | year = 1994 | isbn = 978-0-412-59810-4 | access-date = 2009-05-18 }}</ref> It is the successor to the [[Motorola 68040]] and is the highest performing member of the [[Motorola 68000 series|68000 series]]. The 68060 is the last development of the [[68000 family]] for general purpose use, abandoned in favor of the [[PowerPC]] chips. Two derivatives were produced, the '''68LC060''' (low cost) which lacked the [[floating-point unit]] (FPU) and the '''68EC060''' (embedded controller) which removed both the FPU and [[memory management unit]] (MMU).

== Architecture ==
{{for|more information on the instruction set and architecture|Motorola 68000 series}}
There is an '''LC''' (Low-Cost) version, without an [[Floating-point unit|FPU]]<ref>{{Cite web |url=http://www.motorola.com.cn/semiconductors/mcudsp/forms/selector_guide/sg186_Std_Embedded_Controller_rev9.pdf |title=motorola.com.cn - Motorola, Standard Embedded Controller Selector Guide, Quarter 4 2001 |access-date=2010-11-29 |archive-url=https://web.archive.org/web/20041210023003/http://www.motorola.com.cn/semiconductors/mcudsp/forms/selector_guide/sg186_Std_Embedded_Controller_rev9.pdf |archive-date=2004-12-10 |url-status=dead }}</ref> and '''EC''' (Embedded Controller), without [[Memory management unit|MMU]] and FPU. The 68060 design was led by Joe Circello.<ref name="shen2005">{{ cite book | url=https://archive.org/details/modernprocessord0000shen_m3w1/mode/1up | title=Modern Processor Design: Fundamentals of Superscalar Processors | publisher=McGraw-Hill | last1=Shen | first1=John Paul | last2=Lipasti | first2=Mikko H. | isbn=0-07-057064-7 | date=2005 | access-date=13 August 2025 | pages=423 }}</ref>{{rp|pages=423}}

The 68060 shares most architectural features with the [[P5 (microarchitecture)|P5]] [[Pentium]]. Both have a very similar [[superscalar]] [[tree traversal|in-order]] dual [[instruction pipeline]] configuration,<ref name = Foundations/> and an instruction decoder which breaks down complex instructions into simpler ones before execution, described publicly as "two four-stage RISC engines [that] execute the fixed-format instructions emitted by the instruction converter".<ref name="edn19941208_68060" /> Such translated instructions are stored in a 16-entry FIFO buffer, with more complex 68000 instructions occupying multiple entries, and with some of the most complex instructions causing trap conditions for software to handle accordingly.<ref name="shen2005"/>{{rp|pages=423–424}}

However, a significant difference to the Pentium is that the 68060 FPU is not pipelined and is therefore up to three times slower than the Pentium in floating point applications. In contrast to that, integer multiplications and bit shifting instructions are significantly faster on the 68060. The 68060 has the ability to execute simple instructions in the [[address generation unit]] (AGU) and thereby supply the result two cycles before the [[Arithmetic logic unit|ALU]]. In the development of the 68060, large amounts of commercial compiled code were analyzed for clues as to which instructions would be the best candidates for performance optimization.

Against the Pentium, the 68060 can perform better on mixed code; Pentium's decoder cannot issue an FP instruction every opportunity and hence the FPU is not superscalar as the ALUs were. If the 68060's non-pipelined FPU can accept an instruction, it can be issued one by the decoder. This means that optimizing for the 68060 is easier: no rules prevent FP instructions from being issued whenever was convenient for the programmer other than well understood instruction latencies. However, with properly optimized and scheduled code, the Pentium's FPU is capable of double the clock for clock throughput of the 68060's FPU.

The 68060 is the last development of the [[68000 family]] for general purpose use, abandoned in favor of the [[PowerPC]] chips. It saw use in some late-model [[Amiga]] machines and Amiga accelerator cards as well as some [[Atari ST]] clones and [[Atari Falcon|Falcon]] accelerator boards (CT60/CT63/CT60e, the latter of which was created in 2015), and very late models of the [[Alpha Microsystems]] multiuser computers before their migration to x86, but [[Apple Inc.]] and the [[Unix]] world had moved onto various [[RISC]] platforms by the time the 68060 was available. As early as 1989, Apple had indicated a continuing commitment to using the 68040 and its successor, anticipated as the 68050, in its Macintosh range, alongside "preparatory work" on a Macintosh based on Intel's 80486, also indicating no plans to adopt RISC architectures in such a role.<ref name="unigramx19891009_apple">{{ cite news | url=https://archive.org/details/UnigramX1989212-262/page/n245/mode/1up | title=Apple Eschews RISC for Motorola 68040, 68050 | work=Unigram/X | date=9 October 1989 | access-date=13 August 2025 | pages=2 }}</ref> By the arrival of the 68060, however, the company had already announced its adoption of PowerPC, developed by IBM and Motorola, prior to the availability of the 68060.<ref name="byte199301_motorola">{{ cite magazine | url=https://archive.org/details/BYTE-1993-01/page/n35/mode/1up | title=Motorola Skips a Generation with the 68060 | magazine=Byte | last1=Halfhill | first1=Tom R. | date=January 1993 | access-date=26 February 2023 | pages=32 }}</ref>

Upon introduction of low-power variants of the 68040 and other devices, Motorola anticipated that Apple might leave a space in its product range for 68060-based products, giving the company "a high performance hedge in case the transition to RISC proves problematic".<ref name="macweek19930524_motorola">{{ cite magazine | url=https://archive.org/details/MacWEEKV07N21/page/n3/mode/1up | title=Motorola post processor plans | magazine=MacWEEK | last1=Norr | first1=Henry | date=24 May 1993 | access-date=6 May 2024 | pages=4 }}</ref> In late 1992, Apple chairman John Sculley had indicated usage of the 68060 in server products from 1993, followed up by products based on PowerPC from 1994.<ref name="unigramx19921130_apple">{{ cite news | url=https://archive.org/details/UnigramX1992366-416/page/n318/mode/1up | title=Apple Plans Two Enterprise Servers for 1993 | work=Unigram/X | date=30 November 1992 | access-date=18 April 2025 | pages=7 }}</ref> With the 68060 only arriving in 1994, the [[Apple Workgroup Server]] range ultimately transitioned from products based on the 68040 directly to those employing PowerPC processors.

The 68060 was introduced at 50 MHz on Motorola's 0.6 μm manufacturing process. A few years later it was shrunk to 0.42 μm and clock speed raised to 66 MHz and 75 MHz. Some users managed to overclock rev6. 68060 CPU-s (mask: 71E41J) up to 120 or 133 MHz.<ref name="natami"/><ref name="auto"/> Motorola projected a performance of around three-and-a-half times that of a 25 MHz 68040 at the initial clock rate of 50 MHz for the 68060, this described as being "about 77 MIPS",<ref name="byte199301_motorola"/> later adjusting such claims to three times the performance of the 68040 for a 68060 running at twice the frequency of the 68040.<ref name="edn19941208_68060">{{ cite magazine | url=https://archive.org/details/edn-1994_12_08/page/n74/mode/1up | title=68060 μP runs three times faster than 68040 | magazine=EDN | date=8 December 1994 | access-date=18 January 2024 | pages=77,80 }}</ref> Benchmarking of the 50 MHz 68060 fitted in accelerator cards for the Commodore Amiga indicated [[Dhrystone]] 2.1 benchmark results of around 80,000 Dhrystones per second, this being broadly comparable to a Sun [[SPARCstation 10]] workstation.<ref name="amigashopper199603_blizzard1260">{{ cite magazine | url=https://archive.org/details/Amiga_Shopper_Issue_60_1996-03_Future_Publishing_GB/page/n38/mode/2up | title=Blizzard 1260 | magazine=Amiga Shopper | last1=Kennedy | first1=John | date=March 1996 | access-date=26 February 2023 | pages=38–39 }}</ref>

Developments of the basic core continue, intended for embedded systems. Here they are combined with a number of [[Computer peripheral|peripheral]] interfaces to reduce the overall complexity and power requirements of a design. A number of chips, each with different sets of interfaces, are sold under the names [[Freescale ColdFire|ColdFire]] and [[Freescale DragonBall|DragonBall]].

==History==
Model numbers with even second-to-last digit (68000, 680'''2'''0, 680'''4'''0, 680'''6'''0) were reserved for major revisions to the 680x0 core architecture. Model numbers with odd second-to-last digit (680'''1'''0, 680'''3'''0) were reserved for upgrades to the architecture of the previous chip. Motorola never produced a 68050.<ref name = Foundations/>

For example, the Motorola [[68010]] (and the obscure [[Motorola 68010#Motorola 68012|68012]]) is a [[Motorola 68000|68000]] with improvements to the loop instruction and the ability to suspend then continue an instruction in the event of a page fault, enabling the use of [[virtual memory]] with the appropriate [[Memory management unit|MMU]] hardware. There were, however, no major overhauls of the core architecture. Similarly, the Motorola [[Motorola 68030|68030]] represents a process improvement on the [[Motorola 68020|68020]] with the MMU and a small [[CPU cache|data cache]] (256 bytes) moved on-chip. The 68030 was released in speed ratings up to 50 MHz.

The jump from the 68000/68010 to the 68020/68030, however, represents a major overhaul, with innumerable individual changes.

By the time the 68060 was in production, Motorola had abandoned development of the 68000 family in favor of the [[PowerPC]]. The 68060 is the last 68000 family processor from Motorola.

[[Signetics]] (Philips) produced a 68000-based variant that they somewhat confusingly named the [[68070]]. It contains a modestly-improved 68000 CPU, a simple on-chip MMU and an [[I²C]] bus controller. It came out long before the 68060 and was used principally as an embedded processor in some consumer electronics items, notably [[CD-i]] consoles.

==Usage==
[[Chyron Corporation|Chyron]]'s {{Not a typo|iNFiNiT!}}, Max!, and Maxine! series of [[television character generator]]s use the 68060 as the main processor. These character generators were a fixture on many American television networks' affiliate stations.<ref>{{Cite web|url=https://money.cnn.com/1999/03/15/technology/wintelecom/|title=Microsoft, Intel set telecom plan with Nortel, HP - Mar. 15, 1999|website=money.cnn.com|access-date=2018-05-12}}</ref>

In desktops, the 68060 is used in some variants of the [[Amiga 4000T]] produced by Amiga Technologies,<ref name="Amiga Hardware Database">{{Cite web|url=https://amiga.resource.cx/mod/a4000t.html|title=Amiga Hardware Database - Amiga 4000T|website=amiga.resource.cx}}</ref> and available as a third party upgrade for other Amiga models. It is also used in the Amiga clone [[DraCo]] non-linear video system.<ref>[https://amiga.resource.cx/mod/draco.html amiga.resource.cx - Amiga Hardware Database, DraCo] (68060@50/66 ≤128M)</ref>

Medusa Computer Systems<ref name="medusa_web">{{ cite web | url=http://www.ee.ethz.ch/~caschwan/medusa.html | archive-url=https://web.archive.org/web/19970502232809/http://www.ee.ethz.ch/~caschwan/medusa.html | title=Medusa Computer Systems | website=Medusa Computer Systems | date=21 April 1997 | archive-date=2 May 1997 }}</ref> of Switzerland introduced the Hades 060 computer in 1996,<ref name="stmagazine109">{{ cite magazine | url=https://archive.org/details/st-magazine-109/page/n9/mode/2up | title=HADES '60: le choc!!! | magazine=ST Magazine | issue=109 | last1=Abramson | first1=Marc | date=October 1996 | access-date=16 October 2025 | pages=10–14,16 | language=fr }}</ref> aiming for compatibility with the [[Atari ST]] family of systems, featuring a 68060 core at 120&nbsp;MHz, a 30MHz bus, 4 MB (EDO or SIM) RAM upgradeable to 1&nbsp;GB, 2 ISA slots, 4 PCI slots, 1 VME slot, and 1 E-IDE slot. In graphical terms, the computer could manage ATI 64, ET 4000 and ET 6000 graphic cards at 135&nbsp;MHz (with 2 or 4&nbsp;MB). A modified TOS 3.06 was used, with MultiTOS possible and NVDI.<ref name="stmagazine120">{{ cite magazine | url=https://archive.org/details/st-magazine-120/page/14/mode/2up | title=megaHertz & Co | magazine=ST Magazine | issue=120 | last1=Pear | first1=Jean Thierry | date=October 1997 | access-date=16 October 2025 | pages=16–17 | language=fr }}</ref><ref name="stformat199609_hades">{{ cite magazine | url=https://archive.org/details/stformat18jan91/STFormat86-Sep96/page/n13/mode/1up | title=Medusa Hades | magazine=ST Format | issue=86 | date=September 1996 | access-date=16 October 2025 | pages=14 }}</ref><ref>{{cite web | title=Les ordinateurs de la gamme Atari ST | url=http://www.albatos.free.fr/ordinateurs.php#hades }}</ref><ref>{{cite web | title=RF Generation: Hades 060 (Atari ST / TT) | url=https://www.rfgeneration.com/PHP/gethwinfo.php?ID=U-029-H-00040-E }}</ref> The Hades 060 followed on from the earlier Medusa T60 system.<ref name="stformat199609_medusa">{{ cite magazine | url=https://archive.org/details/stformat18jan91/STFormat86-Sep96/page/n14/mode/1up | title=Medusa T40 and T60 | magazine=ST Format | issue=86 | date=September 1996 | access-date=16 October 2025 | pages=15 }}</ref>

The [[Q40 (motherboard)|Q60]] extended the [[Sinclair QL]] design similarly from the slowest start to the ultimate pace of the 68K architecture's capabilities; these 68060-based motherboards<ref name="Q60">{{Cite web|url=http://www.q40.de/|title=q40.de: The Home of Q40 and Q60 users|website=www.q40.de}}</ref>—at 66&nbsp;MHz for the full 68060 or a non-FPU 68LC060 option overclocked to 80&nbsp;MHz—are more than 100 times faster than the Sinclair QL while running the same operating systems.<ref name="Qdos Classic">{{Cite web|url=http://www.mswift.unisonplus.net/ql/|title=Progs & utils for QL-like computers|website=www.mswift.unisonplus.net}}</ref><ref name="Q60 Linux port">{{Cite web|url=https://linux-q40.sourceforge.net/|title=Linux-Q40|website=linux-q40.sourceforge.net}}</ref><ref name="Qdos for Amiga">{{Cite web|url=https://aminet.net/misc/emu/QDOS4amiga1.readme|title=Qdos for Amiga 68000..68060}}</ref>

The 68060 was used in [[Nortel Meridian]] 1 Option 51, 61 and 81 large office [[Business telephone system|PBX]] systems, powering the CP3 and CP4 core processor boards. A pair of these boards each sporting a 68060 could be used to make the PBX fault tolerant. This was a logical application as previous Meridian 1 cores used other Motorola chips. Nortel later changed the architecture to use Intel processors.<ref>{{cite press release | url=https://newsroom.intel.com/news-releases/intel-and-nortel-networks-to-enable-next-generation-networks/#gs.9ai6rx | title=Intel And Nortel Networks To Enable Next Generation Networks | publisher=Intel Corporation | archive-url=https://web.archive.org/web/20180817160710/https://newsroom.intel.com/news-releases/intel-and-nortel-networks-to-enable-next-generation-networks/#gs.9ai6rx | archive-date=17 August 2018 | date=9 November 1999 }}</ref>

A 68060 processor upgrade to [[Wellfleet Communications]]' Backbone Concentrator Node (BCN) router was announced in 1995.<ref name="computerworld19950109_cisco">{{ cite magazine | url=https://archive.org/details/computerworld292unse/page/4/mode/1up | title=Cisco plans to boost router muscle | magazine=Computerworld | last1=Klett Jr. | first1=Stephen P. | date=9 January 1995 | access-date=14 August 2025 | pages=4 }}</ref>

The Motorola [[Vanguard Managed Solutions|Vanguard]] 6560 multiprotocol router uses a 50&nbsp;MHz 68EC060 processor.

Motorola [[Motorola Single Board Computers|MVME]]-17x and Force Computer SYS68K [[VMEbus]] systems use a 68060 CPU.

[[Alpha Microsystems]] AM-6000, AM-6060, and AM-7000 use a 68060.<ref>{{cite web |title=AM-7000 |url=http://www.alphamicro.com/amphtm/am7000.htm |publisher=Alpha Microsystems |access-date=12 June 2023}}</ref> After Motorola stopped developing newer processors, Alpha Microsystems migrated to [[x86]].

== Variants ==

===68EC060===
The 68EC060 is a version of the Motorola 68060 microprocessor, intended for embedded controllers (EC). It differs from the 68060 in that it has neither an FPU nor an MMU. This makes it less expensive and it draws less power.

===68LC060===
The 68LC060 is a low cost version of the Motorola 68060 microprocessor with no FPU. This makes it less expensive and it draws less power.

===Feature table===
{| class="wikitable"
|-
! Variant !! [[Memory management unit|MMU]] !! [[Floating-point unit|FPU]] !! Max Frequency
|-
| 68060 || {{Yes}} || {{Yes}} || 75 MHz or 133 MHz overclocked
|-
| 68'''LC'''060 || {{Yes}} || {{No}} || 75 MHz or 133 MHz overclocked
|-
| 68'''EC'''060 || {{No}} || {{No}} || 75 MHz or 133 MHz overclocked
|}

== Technical data ==
{| class="wikitable"
|-
| CPU [[clock rate]]
| Officially: 50, 60, 66, 75 MHz
Overclocked: 66 (rev1-2), 80 (rev3-4), 110, 120, 133 and 150 MHz (rev5-6)
|-
| Voltage supply ||
* Vcore 3.3 V
* I/O 5 V
|-
| Temperature
| {{nowrap|−40 °C .. 70 °C}} ({{nowrap|85 °C}} with the current mask)
|-
| Logic family
| Static CMOS<!--Full or partial?-->
|-
| Production process
| [[CMOS]] {{nowrap|0.6 μm}} and later {{nowrap|0.42 μm}}
|-
| [[Chip carrier]]
| [[Pin grid array|PGA 206]] (compatible with [[Motorola 68040|68040]]), TBGA 304 31*31*1.7P1.27
|-
| Address bus
| 32 bit
|-
| Data bus
| 32 bit
|-
| [[Instruction set]]
| [[Complex instruction set computing|CISC]]
|-
| Cache ||
* {{nowrap|8 KB}} DCache ({{nowrap|4-way [[CPU cache#Associativity|associative]]}})
* {{nowrap|8 KB}} ICache ({{nowrap|4-way associative}})
* {{nowrap|96 byte}} FIFO Instruction Buffer
* 256 Entry Branch Cache
* 64 Entry ATC* MMU Buffer (4-way associative)
|-
| Register ||
* 10 for Address operations (7 gen., 2 stack, 1 pc)
* 8 for Data operations
* 1 for CPU flags (status register)
|-
| Transistors
| {{nowrap|~2,500,000}}
|-
| Performance ||
* ~67 MIPS @ 50 MHz
* ~88 MIPS @ 66 MHz
* ~110 MIPS @ 75 MHz
* ~36 MFlops @ 66 MHz
* ~160 MIPS @ 120 MHz<ref name="natami">{{Cite web |url=http://www.natami.net/knowledge.php?b=1&note=39600 |title=Welcome to the Natami / Amiga Forum|access-date=2011-06-13 |archive-url=https://web.archive.org/web/20110613173724/http://www.natami.net/knowledge.php?b=1&note=39600 |archive-date=2011-06-13 |url-status=live }}</ref>{{unreliable source | date=March 2023 | reason=This is an informal discussion of someone's benchmarking session where 160 MIPS is conjured up as what "the real value should be" without any actual demonstration. Never mind that it isn't clear what kind of MIPS this is.}}
* ~177 MIPS @ 133 MHz (estimate)
* ~200 MIPS @ 150 MHz (estimate)<ref name="auto1"/>
|}
ATC = Address Translation Cache

== References ==
<references/>

==External links==
*{{cite book |title=M68060 User's Manual |url=https://www.nxp.com/docs/en/data-sheet/MC68060UM.pdf |year=1994 |id=M68060UM/AD |publisher=Motorola}}
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{{Motorola processors}}

[[Category:68k microprocessors]]
[[Category:Computer-related introductions in 1994]]
[[Category:Superscalar microprocessors]]
[[Category:32-bit microprocessors]]