View source for List of Intel Core processors

{{Short description|None}}
{{for|a shorter list of the latest processors by Intel|List of Intel processors#Latest}}
{{Split|List of Intel Core i3/i5/i7/i9 processors|List of Intel Core and Core Ultra 3/5/7/9 processors|date=May 2024|discuss=Talk:List of Intel Core processors#Splitting proposal}}
{{Use mdy dates|date=October 2018}}
[[File:Intel Core 2023 logo.png|thumb|The latest badge promoting the Intel Core branding]]

The following is a list of '''Intel Core''' [[List of Intel processors|processors]]. This includes [[Intel]]'s original Core (Solo/Duo) mobile series based on the Enhanced Pentium M [[List of Intel CPU microarchitectures|microarchitecture]], as well as its Core 2- (Solo/Duo/Quad/Extreme), Core i3-, Core i5-, Core i7-, Core i9-, Core M- (m3/m5/m7/m9), Core 3-, Core 5-, and Core 7- Core 9-, branded processors.

== Desktop processors ==
{{Timeline of release years
| subtitle = '''Desktop processors'''
| range1 = 2008lol –
| range1_color = #0BDA51 #228B22
| 2008 = [[#Core i (1st gen)|Nehalem microarchitecture (1st generation)]]
| 2009 = 
| 2010 = [[#Core i (1st gen)|Westmere microarchitecture (1st generation)]]
| 2011 = [[#Core i (2nd gen)|Sandy Bridge microarchitecture (2nd generation)]]
| 2012 = [[#Core i (3rd gen)|Ivy Bridge microarchitecture (3rd generation)]]
| 2013 = [[#Core i (4th gen)|Haswell microarchitecture (4th generation)]]
| 2014 =
| 2015a = [[#Core i (5th gen)|Broadwell microarchitecture (5th generation)]]
| 2015b = [[#Core i (6th gen)|Skylake microarchitecture (6th generation)]]
| 2016 = 
| 2017a = [[#Core i (7th gen)|Kaby Lake microarchitecture (7th generation)]]
| 2017b = [[#Core i (8th gen)|Coffee Lake microarchitecture (8th generation)]]
| 2020 = [[#Core i (10th gen)|Comet Lake microarchitecture (10th generation)]]
| 2021 = [[#Core i (11th gen)|Rocket Lake (11th generation)]]
| 2022 = [[#Core i (12th gen)|Alder Lake (12th generation)]]
| 2023a = [[#Core i (13th gen)|Raptor Lake (13th generation)]]
| 2023b = [[#Core i (14th gen)|Raptor Lake (14th generation)]]
| 2024a = [[#Core i (15th gen)|Lunar Lake (15th generation)]]
| 2024b = [[#Core i (15th gen)|Arrow Lake (15th generation)]]

}}

=== Core 2 ===
{{Main|Intel Core 2}}
[[File:2 Duo T7500 Processor.jpg|thumb|Front side of an Intel Core 2 Duo T7500 Processor]]

==== "Allendale" (65 nm, 800 [[Front-side_bus#Transfer_rates|MT/s]]) <span class="anchor" id="&quot;Allendale&quot; (65 nm)"></span> ====
{{For|versions of the Allendale core with half the L2 cache disabled under the [[Pentium Dual-Core]] brand|List of Intel Pentium Dual-Core microprocessors#"Allendale" (65 nm)}}
*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2)''{{ref|NoTXT|a}}
* [[Die (integrated circuit)|Die]] size: 111&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 65nm process|L2]]{{ref|MoreAgressiveHaltStateL2|b}}, [[Intel Core (microarchitecture)#Steppings using 65nm process|M0]]{{ref|MoreAgressiveHaltStateM0|c}}, [[Intel Core (microarchitecture)#Steppings using 65nm process|G0]]{{ref|MoreAgressiveHaltStateG0|d}}

{{cpulist|core|head}}<!-- edit Template:cpulist to modify the style of this table -->
{{cpulist|core|conroe|model=Core 2 Duo E4300|ark=28024
|mult=9|l2=2|fsb=800 |vmin=0.85 |vmax=1.5|date=January 2007|price=$163|links=1
 |sspec1=SL9TB|step1=L2|part1=HH80557PG0332M
 |sspec2=SLA99|step2=M0|part2=BX80557E4300
 |sspec3=SLA5G|step3=}}
{{cpulist|core|conroe|model=Core 2 Duo E4400|ark=29753
|mult=10|l2=2|fsb=800 |vmin=0.85 |vmax=1.5|date=April 2007|price=$133
 |sspec1=SLA3F|step1=L2|part1=HH80557PG0412M
 |sspec2=SLA98|step2=M0|part2=BX80557E4400
 |sspec3=SLA5F|step3=}}
{{cpulist|core|conroe|model=Core 2 Duo E4500|ark=30781
|mult=11|l2=2|fsb=800 |vmin=0.85 |vmax=1.5|date=July 2007|price=$133
 |sspec1=SLA95|step1=M0|part1=HH80557PG0492M
 |part2=BX80557E4500}}
{{cpulist|core|conroe|model=Core 2 Duo E4600|ark=32242
|mult=12|l2=2|fsb=800 |vmin=1.162 |vmax=1.312|date=October 2007|price=$133
 |sspec1=SLA94|step1=M0|part1=HH80557PG0562M
 |part2=BX80557E4600}}
{{cpulist|core|conroe|model=Core 2 Duo E4700|ark=34441
|mult=13|l2=2|fsb=800 |vmin=1.162 |vmax=1.312|date=March 2008|price=$133
 |sspec1=SLALT|step1=G0|part1=HH80557PG0642M
 |part2=BX80557E4700}}
{{end}}

{{note|MoreAgressiveHaltStateM0|c}}
Note: The [[Intel Core (microarchitecture)#Steppings using 65nm process|M0 and G0 Steppings]] have better optimizations to lower idle power consumption from 12W to 8W.

{{note|MoreAgressiveHaltStateG0|d}}
Note: The E4700 uses [[Intel Core (microarchitecture)#Steppings using 65nm process|G0 Stepping]] which makes it a Conroe CPU.

==== "Conroe" (65 nm, 1066 MT/s) <span class="anchor" id="&quot;Conroe&quot; (65 nm)"></span> ====
*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2)''{{ref|NoTXT|a}}
* All models support: [[Intel VT-x]]
* [[Die (integrated circuit)|Die]] size: 143&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 65nm process|B2]], [[Intel Core (microarchitecture)#Steppings using 65nm process|G0]]
{{cpulist|core|head}}<!-- edit Template:cpulist to modify the style of this table -->
{{cpulist|core|conroe|model=Core 2 Duo E6300|ark=27248
|l2=2|fsb=1066|mult=7 |vmin=0.85 |vmax=1.5|date=July 2006|price=$183
 |sspec1=SL9SA|step1=B2|part1=HH80557PH0362M
 |sspec2=SL9TA|step2=L2|part2=BX80557E6300
 |sspec3=SLA2L|step3=?|part3=BX80557E6300T2
 |sspec4=SLA5E|step4=?}}
{{cpulist|core|conroe|model=Core 2 Duo E6320|ark=29754
|l2=4|fsb=1066|mult=7 |vmin=0.85 |vmax=1.5|date=April 2007|price=$163
 |sspec1=SLA4U|step1=B2|part1=HH80557PH0364M
 |part2=BX80557E6320}}
{{cpulist|core|conroe|model=Core 2 Duo E6400|ark=27249
|l2=2|fsb=1066|mult=8 |vmin=0.85 |vmax=1.5|date=July 2006|price=$224
 |sspec1=SL9S9|step1=B2|part1=HH80557PH0462M
 |sspec2=SLA5D|step2=?|part2=BX80557E6400
 |sspec3=SL9T9|step3=L2
 |sspec4=SLA97|step4=M0}}
{{cpulist|core|conroe|model=Core 2 Duo E6420|ark=29755
|l2=4|fsb=1066|mult=8 |vmin=0.85 |vmax=1.5|date=April 2007|price=$183
 |sspec1=SLA4T|step1=B2|part1=HH80557PH0464M
 |part2=BX80557E6420}}
{{cpulist|core|conroe|model=Core 2 Duo E6600|ark=27250
|l2=4|fsb=1066|mult=9 |vmin=0.85 |vmax=1.5|date=July 2006|price=$316
 |sspec1=SL9S8|step1=B2|part1=HH80557PH0564M
 |sspec2=SL9ZL|step2=B2|part2=BX80557E6600}}
{{cpulist|core|conroe|model=Core 2 Duo E6700|ark=27251
|l2=4|fsb=1066|mult=10 |vmin=0.85 |vmax=1.5|date=July 2006|price=$530
 |sspec1=SL9S7|step1=B2|part1=HH80557PH0674M
 |sspec2=SL9ZF|step2=B2|part2=BX80557E6700}}
{{end}}

{{note|NoTXT|a}}Note: of the E6000 series processors, only models E6550, E6750, and E6850 support Intel's [[Trusted Execution Technology]] (TXT).<ref name="E6xxxCompare">{{cite web |url=http://ark.intel.com/Compare.aspx?ids=30785,27251,30784,27248,29754,27249,29755,30782,30783,27250 |publisher=Intel Corporation |access-date=February 12, 2010 |title=Advanced Technologies}}</ref>

{{note|MoreAgressiveHaltStateL2|b}}
Note: The [[Intel Core (microarchitecture)#Steppings using 65nm process|L2 Stepping]], and models with sSpec SL9ZL, SL9ZF, SLA4U, SLA4T, have better optimizations to lower idle power consumption from 22W to 12W.<ref name="moreagressivehaltstate">{{cite web |url=http://www.behardware.com/news/8499/less-power-greedy-core-2-duo.html |title=Less power greedy Core 2 Duo |archive-url=https://web.archive.org/web/20120216124605/http://www.behardware.com/news/8499/less-power-greedy-core-2-duo.html |archive-date=February 16, 2012 |publisher=BeHardware |date=November 15, 2006}}</ref>

{{note|MoreAgressiveHaltStateM0|c}}
Note: The [[Intel Core (microarchitecture)#Steppings using 65nm process|M0 and G0 Steppings]] have better optimizations to lower idle power consumption from 12W to 8W.

==== "Conroe" (65 nm, 1333 MT/s) ====
*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2)''{{ref|NoTXT|a}}
* All models support: [[Intel VT-x]]
* All E6x50 models support: [[Intel VT-x]], [[Trusted Execution Technology]] (TXT)
* [[Die (integrated circuit)|Die]] size: 143&nbsp;mm<sup>2</sup>
* [[Transistor count]]: 291 million
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 65nm process|B2]], [[Intel Core (microarchitecture)#Steppings using 65nm process|G0]]
{{cpulist|core|head}}<!-- edit Template:cpulist to modify the style of this table -->
{{cpulist|core|conroe|model=Core 2 Duo E6540|ark=30782
|l2=4|fsb=1333|mult=7 |vmin=0.85 |vmax=1.5|date=July 2007|price=$163
 |sspec1=SLAA5|step1=G0|part1=HH80557PJ0534M}}
{{cpulist|core|conroe|model=Core 2 Duo E6550|ark=30783
|l2=4|fsb=1333|mult=7 |vmin=0.85 |vmax=1.5|date=July 2007|price=$163
 |sspec1=SLA9X|step1=G0|part1=HH80557PJ0534MG
 |sspec2=SLAAT|step2=?|part2=BX80557E6550
 |part3=BX80557E6550R}}
{{cpulist|core|conroe|model=Core 2 Duo E6750|ark=30784
|l2=4|fsb=1333|mult=8 |vmin=0.85 |vmax=1.5|date=July 2007|price=$183
 |sspec1=SLA9V|step1=G0|part1=HH80557PJ0674MG
 |step2=?|part2=BX80557E6750
 |part3=BX80557E6750R|sspec2=SLAAR}}
{{cpulist|core|conroe|model=Core 2 Duo E6850|ark=30785
|l2=4|fsb=1333|mult=9 |vmin=0.85 |vmax=1.5|date=July 2007|price=$266
 |sspec1=SLA9U|step1=G0|part1=HH80557PJ0804MG
 |part2=BX80557E6850}}
{{end}}

{{note|NoTXT|a}}Note: of the E6000 series processors, only models E6550, E6750, and E6850 support Intel's [[Trusted Execution Technology]] (TXT).<ref name="E6xxxCompare" />

{{note|MoreAgressiveHaltStateL2|b}}
Note: The [[Intel Core (microarchitecture)#Steppings using 65nm process|L2 Stepping]], and models with sSpec SL9ZL, SL9ZF, SLA4U, SLA4T, have better optimizations to lower idle power consumption from 22W to 12W.<ref name="moreagressivehaltstate" />

{{note|MoreAgressiveHaltStateM0|c}}
Note: The [[Intel Core (microarchitecture)#Steppings using 65nm process|M0 and G0 Steppings]] have better optimizations to lower idle power consumption from 12W to 8W.

==== "Conroe-CL" (65 nm, 1066 MT/s) ====
*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]], [[Trusted Execution Technology]] (TXT)''
* [[Die (integrated circuit)|Die]] size: 111&nbsp;mm<sup>2</sup> (Conroe)
* [[Stepping level|Steppings]]: ?
{{cpulist|core|head}}
{{cpulist|core|conroe|model=Core 2 Duo E6305|ark=35276
|l2=2|fsb=1066|mult=7|sock=[[LGA 771]]|links=1
 |sspec1=SLAGF|part1=HH80557KH036F}}
{{cpulist|core|conroe|model=Core 2 Duo E6405|ark=35056
|l2=2|fsb=1066|mult=8|sock=[[LGA 771]]
 |sspec1=SLAGG|part1=HH80557KH046F}}
{{end}}

==== "Conroe XE" (65 nm) ====
<ref name="conroespeculation">{{cite web |url=http://www.theinquirer.net/default.aspx?article=29504 |title=Details regarding Conroe models |date=February 6, 2006 |work=[[The Inquirer]] |url-status=usurped |archive-url=https://web.archive.org/web/20061231025917/http://www.theinquirer.net/default.aspx?article=29504 |archive-date=2006-12-31}}</ref><ref name="x6900">{{cite magazine |url=http://www.dailytech.com/article.aspx?newsid=2625 |title=Intel Confirms Two Upcoming Core 2 Extreme CPUs |magazine=DailyTech |archive-url=https://web.archive.org/web/20060615031921/http://www.dailytech.com/article.aspx?newsid=2625 |archive-date=2006-06-15 |date=May 31, 2006}}</ref>

''These models feature an [[CPU locking|unlocked]] [[clock multiplier]]''
*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]], [[Trusted Execution Technology]] (TXT)''
* [[Die (integrated circuit)|Die]] size: 143&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 65nm process|B1, B2]]
* The X6900 was never publicly released.
{{cpulist|core|head}}
{{cpulist|core|conroe|model=Core 2 Extreme X6800|ark=27258
|l2=4|fsb=1066|mult=11 |vmin=0.85 |vmax=1.5|tdp=75|date=July 2006|price=$999|links=1
 |sspec1=SL9S5|step1=B2|part1=HH80557PH0677M
 |sspec2=QPHV|step2=B1|part2=BX80557X6800}}
{{cpulist|core|conroe|model=Core 2 Extreme X6900<ref>{{cite web |url=http://www.cpu-world.com/sspec/QT/QTOM.html |title=QTOM (Intel Core 2 Duo 3.2 GHZ) |access-date=May 1, 2023 |archive-date=May 5, 2023 |archive-url=https://web.archive.org/web/20230505013727/https://www.cpu-world.com/sspec/QT/QTOM.html |url-status=live }}</ref><ref>{{cite web |url=http://www.cpu-world.com/forum/viewtopic.php?t=13930 |title=forums :: View topic – Need help with identifying a Core 2 (TM) CPU (ES) processor |publisher=Cpu-world.com |date= |accessdate=2022-04-04 |archive-date=May 7, 2023 |archive-url=https://web.archive.org/web/20230507102100/https://www.cpu-world.com/forum/viewtopic.php?t=13930 |url-status=live }}</ref>
|l2=4|fsb=1066|mult=12 |vmin=0.85 |vmax=1.5|tdp=75|date=N/A|price=N/A|links=1
 |sspec1=QTOM|step1=B2|part1=HH80557PH0884M
 |sspec2=SL9S4|step2=B2}}
{{end}}

==== "Kentsfield" (65 nm) ====
<ref name="q6600">{{cite magazine |url=http://www.dailytech.com/article.aspx?newsid=4217 |title=Intel Core 2 Quad Announced Internally |archive-url=https://web.archive.org/web/20060921090718/http://www.dailytech.com/article.aspx?newsid=4217 |archive-date=2006-09-21 |magazine=DailyTech |date=September 19, 2006}}</ref><ref name="q6600rel">{{cite magazine |url=http://www.dailytech.com/article.aspx?newsid=5595 |title=Intel Hard-Launches Three New Quad-core Processors |archive-url=https://web.archive.org/web/20160405061432/http://www.dailytech.com/article.aspx?newsid=5595 |archive-date=2016-04-05 |magazine=DailyTech |date=January 7, 2007}}</ref>

*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]]''
* [[Die (integrated circuit)|Die]] size: 2 ×143&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 65nm process|B3, G0]]
{{cpulist|core|head}}
{{cpulist|core|kentsfield|model=Core 2 Quad Q6400<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL9UN.html|access-date=2018-10-27|title=SL9UN (Intel Core 2 Quad Q6400)|work=CPU-World|archive-date=May 4, 2023|archive-url=https://web.archive.org/web/20230504070929/https://www.cpu-world.com/sspec/SL/SL9UN.html|url-status=live}}</ref>
|l2=8|fsb=1066|mult=8|tdp=105 |vmin=0.8500 |vmax=1.500|price=OEM|links=1
 |sspec1=SL9UN|step1=B3|part1=HH80562PH0468M}}
{{cpulist|core|kentsfield|model=Core 2 Quad Q6600|ark=29765
|l2=8|fsb=1066|mult=9 |vmin=0.8500 |vmax=1.500|date=January 2007|price=$851
 |sspec1=SL9UM|step1=B3|tdp1=105|part1=HH80562PH0568M
 |sspec2=SLACR|step2=G0|tdp2=95|part2=BX80562Q6600
 |part3=BXC80562Q6600}}
{{cpulist|core|kentsfield|model=Core 2 Quad Q6700|ark=30790
|l2=8|fsb=1066|mult=10|tdp=95 |vmin=0.8500 |vmax=1.500|date=July 2007|price=$530
 |sspec1=SLACQ|step1=G0|part1=HH80562PH0678M
 |part2=BX80562Q6700
 |part3=BXC80562Q6700}}
{{end}}

==== "Kentsfield XE" (65 nm) ====
<ref name="qx6700">{{cite magazine |url=http://www.dailytech.com/article.aspx?newsid=3829 |title="Kentsfield" to Debut at 2.66 GHz |archive-url=https://web.archive.org/web/20061021081154/http://www.dailytech.com/article.aspx?newsid=3829 |archive-date=2006-10-21 |magazine=DailyTech |date=August 16, 2006}}</ref>

''These models feature an [[CPU locking|unlocked]] [[clock multiplier]]''
*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]]''
* [[Die (integrated circuit)|Die]] size: 2 ×143&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 65nm process|B3, G0]]
{{cpulist|core|head}}
{{cpulist|core|kentsfield|model=Core 2 Extreme QX6700|ark=28028
|l2=8|fsb=1066|mult=10 |vmin=0.8500 |vmax=1.500|tdp=130|date=November 2006|price=$999|links=1
 |sspec1=SL9UL|step1=B3|part1=HH80562PH0678M}}
{{cpulist|core|kentsfield|model=Core 2 Extreme QX6800|ark=30720
|l2=8|fsb=1066|mult=11 |vmin=0.8500 |vmax=1.500|tdp=130|date=April 2007|price=$1199
 |sspec1=SL9UK|step1=B3|part1=HH80562PH0778M
 |sspec2=SLACP|step2=G0|part2=HH80562XH0778M}}
{{cpulist|core|kentsfield|model=Core 2 Extreme QX6850|ark=30789
|l2=8|fsb=1333|mult=9 |vmin=0.8500 |vmax=1.500|tdp=130|date=July 2007|price=$999
 |sspec1=SLAFN|step1=G0|part1=HH80562XJ0808M}}
{{end}}

==== "Wolfdale-3M" (45 nm, 1066 MT/s) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2)''
* [[Die (integrated circuit)|Die]] size: 82&nbsp;mm<sup>2</sup>
* Transistor Count: 230 million
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|M0, R0]]
* Models with a part number ending in "ML" instead of "M" support [[Intel VT-x]]
{{cpulist|core|head}}
{{cpulist|core|wolfdale|model=Core 2 Duo E7200|ark=35348
|l2=3|fsb=1066|mult=9.5 |vmin=0.85 |vmax=1.3625|date=April 2008|price=$133|links=1
 |sspec1=SLAPC|step1=M0|part1=EU80571PH0613M
 |sspec2=SLAVN|step2=M0|part2=BX80571E7200
 |sspec3=SLB9W|step3=?}}
{{cpulist|core|wolfdale|model=Core 2 Duo E7300|ark=36463
|l2=3|fsb=1066|mult=10 |vmin=0.85 |vmax=1.3625|date=August 2008|price=$133
 |sspec1=SLAPB|step1=M0|part1=EU80571PH0673M
 |sspec2=SLB9X|step2=R0|part2=AT80571PH0673M
 |sspec3=SLGA9|step3=R0<!-- also AT80571PH0673M, no VT version --> |part3=BX80571E7300}}
{{cpulist|core|wolfdale|model=Core 2 Duo E7400|ark=36500
|l2=3|fsb=1066|mult=10.5 |vmin=0.85 |vmax=1.3625|date=October 2008|price=$133
 |sspec1=SLB9Y|step1=R0|part1=AT80571PH0723M
 |sspec2=SLGQ8|step2=R0<!-- also AT80571PH0723M -->
 |sspec3=SLGW3|step3=R0, with VT|part2=AT80571PH0723ML|part3=BX80571E7400}}
{{cpulist|core|wolfdale|model=Core 2 Duo E7500|ark=36503
|l2=3|fsb=1066|mult=11 |vmin=0.85 |vmax=1.3625|date=January 2009|price=$133
 |sspec1=SLB9Z|step1=R0|part1=AT80571PH0773M
 |sspec2=SLGTE|step2=R0, with VT|part2=AT80571PH0773ML|part3=BX80571E7500}}
{{cpulist|core|wolfdale|model=Core 2 Duo E7600|ark=41495
|l2=3|fsb=1066|mult=11.5 |vmin=0.85 |vmax=1.3625|date=May 2009|price=$133
 |sspec1=SLGTD|step1=R0, with VT|part1=AT80571PH0833ML|part2=BX80571E7600}}
{{end}}

==== "Wolfdale" (45 nm, 1333 MT/s) ====
*All models(except E8190) support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), iAMT2 ([[Intel Active Management Technology]]), [[Intel VT-x]] {{ref label|NoVT-x|a|a}}, [[Intel VT-d]] {{ref label|NoVT-d|b|b}}, [[Trusted Execution Technology]] (TXT)''
* [[Die (integrated circuit)|Die]] size: 107&nbsp;mm<sup>2</sup>
* Transistor Count: 410 million
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|C0, E0]]
{{cpulist|core|head}}
{{cpulist|core|wolfdale|model=Core 2 Duo E8190|ark=34442
|l2=6|fsb=1333|mult=8 |vmin=0.85 |vmax=1.3625|date=January 2008|price=$163|links=1
 |sspec1=SLAQR|step1=C0|part1=EU80570PJ0676MN}}
{{cpulist|core|wolfdale|model=Core 2 Duo E8200|ark=33909
|l2=6|fsb=1333|mult=8 |vmin=0.85 |vmax=1.3625|date=January 2008|price=$163
 |sspec1=SLAPP|step1=C0|part1=EU80570PJ0676M
 |part2=BX80570E8200}}
{{cpulist|core|wolfdale|model=Core 2 Duo E8290<ref>{{Cite web|url=http://www.cpu-world.com/CPUs/Core_2/Intel-Core%202%20Duo%20E8290%20EU80570PJ0736MN.html|title=Intel Core 2 Duo E8290 – EU80570PJ0736MN|access-date=May 1, 2023|archive-date=June 5, 2022|archive-url=https://web.archive.org/web/20220605200100/https://www.cpu-world.com/CPUs/Core_2/Intel-Core%202%20Duo%20E8290%20EU80570PJ0736MN.html|url-status=live}}</ref>|ark=
|l2=6|fsb=1333|mult=8.5 |vmin=0.85 |vmax=1.3625|date=?|price=?
 |sspec1=SLAQQ|step1=?|part1=EU80570PJ0736MN}}
{{cpulist|core|wolfdale|model=Core 2 Duo E8300|ark=35070
|l2=6|fsb=1333|mult=8.5 |vmin=0.85 |vmax=1.3625|date=April 2008|price=$163
 |sspec1=SLAPJ|step1=C0|part1=EU80570AJ0736M
 |sspec2=SLAPN|step2=C0|part2=EU80570PJ0736M}}
{{cpulist|core|wolfdale|model=Core 2 Duo E8400|ark=33910
|l2=6|fsb=1333|mult=9 |vmin=0.85 |vmax=1.3625|date=January 2008|price=$183
 |sspec1=SLAPL|step1=C0|part1=EU80570PJ0806M
 |sspec2=SLB9J|step2=E0|part2=AT80570PJ0806M
 |part3=BX80570E8400}}
{{cpulist|core|wolfdale|model=Core 2 Duo E8500|ark=33911
|l2=6|fsb=1333|mult=9.5 |vmin=0.85 |vmax=1.3625|date=January 2008|price=$266
 |sspec1=SLAPK|step1=C0|part1=EU80570PJ0876M
 |sspec2=SLB9K|step2=E0|part2=AT80570PJ0876M
 |part3=BX80570E8500}}
{{cpulist|core|wolfdale|model=Core 2 Duo E8600|ark=35605
|l2=6|fsb=1333|mult=10 |vmin=0.85 |vmax=1.3625|date=August 2008|price=$266
 |sspec1=SLB9L|step1=E0|part1=AT80570PJ0876M
 |part2=BX80570E8600}}
{{cpulist|core|wolfdale|model=Core 2 Duo E8700|ark=
|l2=6|fsb=1333|mult=10.5 |vmin=0.85 |vmax=1.3625|date=January 2009*|price=NA
 |sspec1=SLB9E|step1=E0|part1=AT80570PJ1006M(OEM)
 |part2=}}

{{end}}

{{note label|NoVT-d|a|a}}Note: The E8190 and E8290 do not support Intel VT-d.

Note 2: E8700 is a very rare example in Intel's history where a model was yanked from Intel ARK without a recall notice and after a SSPEC was assigned. Working examples were seen, believed to have been released to OEM,<ref>{{cite web | url=https://www.techpowerup.com/83135/intel-launches-core-2-duo-e8700 | title=Intel Launches Core 2 Duo E8700 | work=TechPowerUp | date=January 26, 2009 }}</ref> but none was offered in retail PCs. 

See also: Versions of the same Wolfdale core in an LGA 771 are available under the [[List of Intel Xeon microprocessors#"Wolfdale-DP" (standard-voltage, 45 nm)|Dual-Core Xeon]] brand.

==== "Yorkfield-6M" (45 nm) ====
*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]] {{ref label|NoVT-x|a|a}}, [[Intel VT-d]] {{ref label|NoVT-d|b|b}}, [[Trusted Execution Technology]] (TXT) {{ref label|NoTXT|c|c}}''
* [[Die (integrated circuit)|Die]] size: 2 × 82&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|M0, M1, R0]]
* All Q8xxx models are Yorkfield-6M MCMs with only 2 × 2&nbsp;MB L2 cache enabled.
{{cpulist|core|head}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q8200|ark=36547
|l2=4|fsb=1333|mult=7 |vmin=0.85 |vmax=1.3625|tdp=95|date=August 2008|price=$224|links=1
 |sspec1=SLB5M|step1=M1|part1=EU80580PJ0534MN
 |sspec2=SLG9S|step2=R0|part2=AT80580PJ0534MN}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q8200S|ark=40816
|l2=4|fsb=1333|mult=7 |vmin=0.85 |vmax=1.3625|tdp=65|date=January 2009|price=$245
 |sspec1=SLG9T|step1=R0|part1=AT80580AJ0534MN
 |sspec2=SLGSS|step2=R0, with Intel VT-x|part2=AT80580AJ0534ML}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q8300|ark=39107
|l2=4|fsb=1333|mult=7.5 |vmin=0.85 |vmax=1.3625|tdp=95|date=November 2008|price=$224
 |sspec1=SLB5W|step1=R0|part1=AT80580PJ0604MN
 |sspec2=SLGUR|step2=R0, with Intel VT-x|part2=AT80580PJ0604ML}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q8400|ark=38512
|l2=4|fsb=1333|mult=8 |vmin=0.85 |vmax=1.3625|tdp=95|date=April 2009|price=$183
 |sspec1=SLGT6|step1=R0, with Intel VT-x|part1=AT80580PJ0674ML}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q8400S|ark=42112
|l2=4|fsb=1333|mult=8 |vmin=0.85 |vmax=1.3625|tdp=65|date=April 2009|price=$245
 |sspec1=SLGT7|step1=R0, with Intel VT-x|part1=AT80580AJ0674ML}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q9300|ark=33922
|l2=6|fsb=1333|mult=7.5 |vmin=0.85 |vmax=1.3625|tdp=95|date=March 2008|price=$266
 |sspec1=SLAMX|step1=M0|part1=EU80580PJ0606M
 |sspec2=SLAWE|step2=M1}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q9400|ark=35365
|l2=6|fsb=1333|mult=8 |vmin=0.85 |vmax=1.3625|tdp=95|date=August 2008|price=$266
 |sspec1=SLB6B|step1=R0|part1=AT80580PJ0676M}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q9400S|ark=40814
|l2=6|fsb=1333|mult=8 |vmin=0.85 |vmax=1.3625|tdp=65|date=January 2009|price=$320
 |sspec1=SLG9U|step1=R0|part1=AT80580AJ0676M}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q9500|ark=37159
|l2=6|fsb=1333|mult=8.5 |vmin=0.85 |vmax=1.3625|tdp=95|date=January 2010|price=$183
 |sspec1=SLGZ4|step1=R0|part1=AT80580PJ0736ML}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q9505|ark=42920
|l2=6|fsb=1333|mult=8.5 |vmin=0.85 |vmax=1.3625|tdp=95|date=August 2009|price=$213
 |sspec1=SLGYY|step1=R0|part1=AT80580PJ0736MG}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q9505S|ark=42921
|l2=6|fsb=1333|mult=8.5 |vmin=0.85 |vmax=1.3625|tdp=65|date=August 2009|price=$277
 |sspec1=SLGYZ|step1=R0|part1=AT80580AJ0736MG}}
{{end}}

{{note label|NoVT-x|a|a}}Note: Q8200, Q8200S, Q8300 SLB5W does not support Intel VT-x.

{{note label|NoVT-d|b|b}}Note: Q8200, Q8200S, Q8300, Q8400, Q8400S, Q9500 does not support Intel VT-d.

{{note label|NoTXT|c|c}}Note: Q8200, Q8200S, Q8300, Q8400, Q8400S does not support TXT.

==== Yorkfield (45 nm) ====
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]], [[Intel VT-d]], [[Trusted Execution Technology]] (TXT)''
* [[Die (integrated circuit)|Die]] size: 2 × 107&nbsp;mm<sup>2</sup>
* The "S" suffix denotes to low power consumption specs with 65W TDP, equivalent to that of a standard Core 2 Duo. Supplied to OEM channels only and mostly seen as options for SFF platforms. The first batch of Q9550S has no "S" marking on lid, thus only differentiated by SSPEC.
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|C0, C1, E0]]
{{cpulist|core|head}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q9450|ark=33923
|l2=12|fsb=1333|mult=8 |vmin=0.85 |vmax=1.3625|tdp=95|date=March 2008|price=$316|links=1
 |sspec1=SLAN6|step1=C0|part1=EU80569PJ067N
 |sspec2=SLAWR|step2=C1}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q9550|ark=33924
|l2=12|fsb=1333|mult=8.5 |vmin=0.85 |vmax=1.3625|tdp=95|date=March 2008|price=$530
 |sspec1=SLAN4|step1=C0|part1=EU80569PJ073N
 |sspec2=SLAWQ|step2=C1|part2=AT80569PJ073N
 |sspec3=SLB8V|step3=E0}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q9550S*|ark=40815
|l2=12|fsb=1333|mult=8.5 |vmin=0.85 |vmax=1.3625|tdp=65|date=January 2009|price=$369
 |sspec1=SLGAE|step1=E0|part1=AT80569AJ073N}}
{{cpulist|core|yorkfield|model=Core 2 Quad Q9650|ark=35428
|l2=12|fsb=1333|mult=9 |vmin=0.85 |vmax=1.3625|tdp=95|date=August 2008|price=$530
 |sspec1=SLB8W|step1=E0|part1=AT80569PJ080N
 |part2=BX80569Q9650}}
{{end}}

==== "Yorkfield XE" (45 nm) ====

*These models feature an [[CPU locking|unlocked]] [[clock multiplier]]
*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]]''
* I/O Acceleration Technology (Intel I/OAT) supported by: QX9775
* Intel VT-d supported by: QX9650<ref>{{cite web|url=https://ark.intel.com/content/www/us/en/ark/products/35428/intel-core-2-quad-processor-q9650-12m-cache-3-00-ghz-1333-mhz-fsb.html|title=Intel Core2 Quad Processor Q9650 (12M Cache, 3.00 GHz, 1333&nbsp;MHz FSB) Product Specifications|website=ark.intel.com|access-date=June 26, 2019|archive-date=June 26, 2019|archive-url=https://web.archive.org/web/20190626213609/https://ark.intel.com/content/www/us/en/ark/products/35428/intel-core-2-quad-processor-q9650-12m-cache-3-00-ghz-1333-mhz-fsb.html|url-status=live}}</ref>
* [[Die (integrated circuit)|Die]] size: 2 × 107&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|C0, C1, E0]]
* The QX9750 was never publicly released. Engineering samples have surfaced along with claims that Intel gave them away to employees sometime in 2009.<ref>{{Cite web|url=https://forums.guru3d.com/threads/qx9750.299053/|title=Qx9750!!! :)|website=guru3D Forums|access-date=May 1, 2023|archive-date=May 1, 2023|archive-url=https://web.archive.org/web/20230501101237/https://forums.guru3d.com/threads/qx9750.299053/|url-status=live}}</ref><ref>{{Cite web|url=https://forums.anandtech.com/threads/building-around-my-new-qx-9750.295480/|title=Building around my new QX-9750.|date=May 27, 2009|website=AnandTech Forums: Technology, Hardware, Software, and Deals|access-date=May 1, 2023|archive-date=May 1, 2023|archive-url=https://web.archive.org/web/20230501101236/https://forums.anandtech.com/threads/building-around-my-new-qx-9750.295480/|url-status=live}}</ref><ref>{{cite web |url=https://hardforum.com/threads/my-new-chip-woo-hoo.1411896/ |title = My new chip WOO HOO!!!| date=April 18, 2009 }}</ref>
{{cpulist|core|head}}
{{cpulist|core|yorkfield|model=Core 2 Extreme QX9650|ark=33921
|l2=12|fsb=1333|mult=9 |vmin=0.85 |vmax=1.3625|tdp=130|date=November 2007<ref name="channelregister-071116">{{cite web |url=http://www.intel.com/pressroom/archive/releases/2007/20071111comp.htm |title=Intel's Fundamental Advance in Transistor Design Extends Moore's Law, Computing Performance |date=November 11, 2007 |author=Intel Corporation |access-date=May 1, 2023 |archive-date=May 7, 2023 |archive-url=https://web.archive.org/web/20230507102100/https://www.intel.com/pressroom/archive/releases/2007/20071111comp.htm |url-status=live }}</ref>|price=$999|links=1
 |sspec1=SLAN3|step1=C0|part1=EU80569XJ080NL
 |sspec2=SLAWN|step2=C1|part2=BX80569QX9650}}
{{cpulist|core|yorkfield|model=Core 2 Extreme QX9750<ref>{{Cite web|url=http://www.cpu-world.com/CPUs/Core_2/Intel-Core%202%20Extreme%20QX9750.html|title=Intel Core 2 Extreme QX9750 AT80569XJ087NL|access-date=May 1, 2023|archive-date=March 16, 2021|archive-url=https://web.archive.org/web/20210316235344/https://www.cpu-world.com/CPUs/Core_2/Intel-Core%202%20Extreme%20QX9750.html|url-status=live}}</ref>
|l2=12|fsb=1333|mult=9.5 |vmin=0.85 |vmax=1.3625|tdp=130|date=N/A|price=N/A
 |sspec1=QJEE|step1=E0|part1=AT80569XL087NL
 |sspec2=SLBBU|step2=E0}}
{{cpulist|core|yorkfield|model=Core 2 Extreme QX9770|ark=34444
|l2=12|fsb=1600|mult=8 |vmin=0.85 |vmax=1.3625|tdp=136|date=March 2008|price=$1399
 |sspec1=SLAN2|step1=C0|part1=EU80569XL088NL
 |sspec2=SLAWM|step2=C1|part2=BX80569QX9770}}
{{cpulist|core|yorkfield|model=Core 2 Extreme QX9775|ark=34692
|l2=12|fsb=1600|mult=8 |vmin=0.85 |vmax=1.35|tdp=150|sock=LGA 771|date=March 2008|price=$1499
 |sspec1=SLANY|step1=C0|part1=EU80574XL088N|part2=BX80574QX9775}}
{{end}}

=== Core i (1st gen) ===

==== Lynnfield<span class="anchor" id="&quot;Lynnfield&quot; (45 nm)"></span> ====

Common features:
* Socket: [[LGA 1156]].
* All the CPUs support dual-channel [[DDR3]] RAM at up to 1333&nbsp;[[MT/s]] speed.
* All CPU models provide 16 lanes of [[PCIe 2.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 1.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[45 nm process|45&nbsp;nm]].
* K-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="6" | Core i7
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/48500.html 880]
| rowspan="6" | 4 (8)
| 3.06
| 3.73
| rowspan="9" | 8&nbsp;MB
| rowspan="3" | 95&nbsp;W
| rowspan="2" | {{dts|2010|May|format=mdy|abbr=off}}
| US $583
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/48499.html 875K]
| rowspan="2" |2.93
| rowspan="3" |3.60
|US $342
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/41315.html 870]
|{{dts|2009|September|format=mdy|abbr=off}}
|US $562
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/48498.html 870S]
|2.67
|82&nbsp;W
|{{dts|2010|July|format=mdy|abbr=off}}
|US $351
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/41316.html 860]
|2.80
| rowspan="2" |3.46
|95&nbsp;W
|{{dts|2009|September|format=mdy|abbr=off}}
|US $284
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/41318.html 860S]
|2.53
|82&nbsp;W
|{{dts|2010|January|format=mdy|abbr=off}}
|US $337
|-
! rowspan="3" |Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/48496.html 760]
| rowspan="3" |4 (4)
|2.80
|3.33
| rowspan="2" |95&nbsp;W
|{{dts|2010|July|format=mdy|abbr=off}}
|US $205
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/42915.html 750]
|2.66
| rowspan="2" |3.20
|{{dts|2009|September|format=mdy|abbr=off}}
|US $196
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/42917.html 750S]
|2.40
|82&nbsp;W
|{{dts|2010|January|format=mdy|abbr=off}}
|US $259
|}

==== Bloomfield<span class="anchor" id="&quot;Bloomfield&quot; (45 nm)"></span> ====

Common features:
* Socket: [[LGA 1366]].
* All the CPUs support triple-channel [[DDR3]] RAM, at up to 1066&nbsp;[[MT/s]] speed.
* PCIe lanes are provided by the northbridge on the motherboard rather than by the CPU.
* All CPUs feature a [[QuickPath Interconnect|QPI]] bus to the chipset ([[Northbridge (computing)|northbridge]]).
** Bus speed is 4.8&nbsp;[[GT/s]] on all the processors except for the Extreme Edition models, which run at 6.4&nbsp;GT/s.
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[45 nm process|45&nbsp;nm]].
* Extreme Edition processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="7" | Core i7
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/37153.html 975 Extreme Edition]
| rowspan="7" | 4 (8)
| 3.33
| 3.60
| rowspan="7" | 8&nbsp;MB
| rowspan="7" | 130&nbsp;W
| {{dts|2009|June|format=mdy|abbr=off}}
| rowspan=2 | US $999
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/37149.html 965 Extreme Edition]
| rowspan=2 | 3.20
| rowspan=2 | 3.46
| {{dts|2008|November|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/37151.html 960]
| {{dts|2009|October|format=mdy|abbr=off}}
| rowspan=3 | US $562
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/37150.html 950]
| 3.06
| 3.33
| {{dts|2009|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/37148.html 940]
| 2.93
| 3.20
| {{dts|2008|November|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/41447.html 930]
| 2.80
| 3.06
| {{dts|2010|February|format=mdy|abbr=off}}
| US $294
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/37147.html 920]
| 2.66
| 2.93
| {{dts|2008|November|format=mdy|abbr=off}}
| US $284
|}

==== Clarkdale<span class="anchor" id="&quot;Clarkdale&quot; (MCP, 32 nm)"></span><span class="anchor" id="&quot;Clarkdale&quot; (MCP, 32 nm dual-core)"></span> ====
[[File:Intel i3 540 (Westmere) (PNG).png|thumb|Intel i3 540 CPU die shot (Westmere)]]
[[File:Intel i3 540 CPU and IGPU Dies (50212178048).jpg|thumb|Intel i3 540 CPU and IGPU Dies]]
Common features:
* Socket: [[LGA 1156]].
* All the CPUs support dual-channel [[DDR3]] RAM, at up to 1333&nbsp;[[MT/s]] speed.
* All CPU models provide 16 lanes of [[PCIe 2.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 1.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[32 nm process|32&nbsp;nm]].
* K-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=6 | Core i5
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/48504.html 680]
| rowspan=10 | 2 (4)
| 3.60
| 3.86
| rowspan=10 | [[Intel Graphics Technology#Westmere|HD Graphics]]
| rowspan=2 | 733
| rowspan=10 | 4&nbsp;MB
| rowspan=2 | 73&nbsp;W
| {{dts|2010|April|format=mdy|abbr=off}}
| US $294
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/43556.html 670]
| 3.46
| 3.73
| rowspan=3 | {{dts|2010|January|format=mdy|abbr=off}}
| US $284
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/43553.html 661]
| rowspan=2 | 3.33
| rowspan=2 | 3.60
| 900
| 87&nbsp;W
| rowspan=2 | US $196
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/43550.html 660]
| rowspan=7 | 733
| rowspan=7 | 73&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/48750.html 655K]
| rowspan=2 | 3.20
| rowspan=2 | 3.46
| {{dts|2010|May|format=mdy|abbr=off}}
| US $216
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/43546.html 650]
| {{dts|2010|January|format=mdy|abbr=off}}
| US $176
|-
! rowspan=4 | Core i3
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/50177.html 560]
| 3.33
| rowspan=4 {{n/a}}
| {{dts|2010|August|format=mdy|abbr=off}}
| rowspan=2 | US $138
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/48505.html 550]
| 3.20
| {{dts|2010|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/46473.html 540]
| 3.06
| rowspan=2 | {{dts|2010|January|format=mdy|abbr=off}}
| US $133
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/46472.html 530]
| 2.93
| US $113
|}

==== Gulftown<span class="anchor" id="&quot;Gulftown&quot; (32 nm)"></span> ====

Common features:
* Socket: [[LGA 1366]].
* All the CPUs support triple-channel [[DDR3]] RAM, at up to 1066&nbsp;[[MT/s]] speed.
* PCIe lanes are provided by the northbridge on the motherboard rather than by the CPU.
* All CPUs feature a [[QuickPath Interconnect|QPI]] bus to the chipset ([[Northbridge (computing)|northbridge]]).
** Bus speed is 4.8&nbsp;[[GT/s]] on all the processors except for the X-suffix models, which run at 6.4&nbsp;GT/s.
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[32 nm process|32&nbsp;nm]].
* X-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan=4 | Core i7
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/52585.html 990X]
| rowspan=4 | 6 (12)
| 3.46
| 3.73
| rowspan=4 | 12&nbsp;MB
| rowspan=4 | 130&nbsp;W
| {{dts|2011|February|format=mdy|abbr=off}}
| rowspan=2 | US $999
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/47932.html 980X]
| rowspan=2 | 3.33
| rowspan=2 | 3.60
| {{dts|2010|March|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/58664.html 980]
| {{dts|2011|June|format=mdy|abbr=off}}
| US $583
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/47933.html 970]
| 3.20
| 3.46
| {{dts|2010|July|format=mdy|abbr=off}}
| US $885
|}

=== Core i (2nd gen) ===

==== Sandy Bridge-DT<span class="anchor" id="&quot;Sandy Bridge&quot; (32 nm)"></span><span class="anchor" id="&quot;Sandy Bridge&quot; (dual-core, 32 nm)"></span><span class="anchor" id="&quot;Sandy Bridge&quot; (quad-core, 32 nm)"></span><span class="anchor" id="&quot;Sandy Bridge-DT&quot; (32 nm)"></span> ====

Common features:
[[File:Intel i5 2500 - ring light (98% quality JPG).jpg|thumb|Intel i5 2500 die shot]]
* Socket: [[LGA 1155]].
* All the CPUs support dual-channel [[DDR3]] RAM, at up to 1333&nbsp;[[MT/s]] speed.
* All CPU models provide 16 lanes of [[PCIe 2.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[32 nm process|32&nbsp;nm]].
* K-suffix processors have an unlocked multiplier and can be overclocked.
* i3-2120, i5-2400, and i7-2600 are available as embedded processors.
* The Core i3-2102, once upgraded via Intel Upgrade Service,  operates at 3.6 GHz, has 3 MB L3 cache and is recognized as Core i3-2153.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=4 | Core i7
! style="text-align:left;" data-sort-value="sku26" | [https://ark.intel.com/content/www/us/en/ark/products/61275.html 2700K]
| rowspan=4 | 4 (8)
| 3.5
| 3.9
| rowspan=2 | [[Intel Graphics Technology#Sandy Bridge|HD 3000]]
| rowspan=4 | 850–1350
| rowspan=4 | 8&nbsp;MB
| rowspan=3 | 95&nbsp;W
| {{dts|2011|October|format=mdy|abbr=off}}
| US $332
|-
! style="text-align:left;" data-sort-value="sku25" | [https://ark.intel.com/content/www/us/en/ark/products/52214.html 2600K]
| rowspan=2 | 3.4
| rowspan="4" | 3.8
| rowspan=3 | {{dts|2011|January|format=mdy|abbr=off}}
| US $317
|-
! style="text-align:left;" data-sort-value="sku24" | [https://ark.intel.com/content/www/us/en/ark/products/52213.html 2600]
| rowspan=2 | [[Intel Graphics Technology#Sandy Bridge|HD 2000]]
| US $294
|-
! style="text-align:left;" data-sort-value="sku23" | [https://ark.intel.com/content/www/us/en/ark/products/52215.html 2600S]
| 2.8
| 65&nbsp;W
| US $306
|-
! rowspan="14" |Core i5
! style="text-align:left;" data-sort-value="sku22" |[https://ark.intel.com/content/www/us/en/ark/products/65647.html 2550K]
| rowspan="9" |4 (4)
|3.4
| colspan="2" {{N/a}}
| rowspan="9" |6&nbsp;MB
| rowspan="3" |95&nbsp;W
|{{dts|2012|January|format=mdy|abbr=off}}
|US $225
|-
! style="text-align:left;" data-sort-value="sku21" |[https://ark.intel.com/content/www/us/en/ark/products/52210.html 2500K]
| rowspan="2" |3.3
| rowspan="3" |3.7
| HD 3000
| rowspan="3" |850–1100
| rowspan="4" |{{dts|2011|January|format=mdy|abbr=off}}
|US $216
|-
! style="text-align:left;" data-sort-value="sku20" |[https://ark.intel.com/content/www/us/en/ark/products/52209.html 2500]
| rowspan="3" | HD 2000
|US $205
|-
! style="text-align:left;" data-sort-value="sku19" |[https://ark.intel.com/content/www/us/en/ark/products/52211.html 2500S]
|2.7
|65&nbsp;W
| rowspan="2" |US $216
|-
! style="text-align:left;" data-sort-value="sku18" |[https://ark.intel.com/content/www/us/en/ark/products/52212.html 2500T]
|2.3
|3.3
|650–1250
|45&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku17" |[https://ark.intel.com/content/www/us/en/ark/products/64843.html 2450P]
|3.2
|3.5
| colspan="2" {{N/a}}
| rowspan="2" |95&nbsp;W
|{{dts|2012|January|format=mdy|abbr=off}}
|US $195
|-
! style="text-align:left;" data-sort-value="sku16" |[https://ark.intel.com/content/www/us/en/ark/products/52207.html 2400]
|3.1
|3.4
| HD 2000
| rowspan="3" |850–1100
|{{dts|2011|January|format=mdy|abbr=off}}
|US $184
|-
! style="text-align:left;" data-sort-value="sku15" |[https://ark.intel.com/content/www/us/en/ark/products/55446.html 2405S]
| rowspan="2" |2.5
| rowspan="2" |3.3
| HD 3000
| rowspan="2" |65&nbsp;W
|{{dts|2011|May|format=mdy|abbr=off}}
|US $205
|-
! style="text-align:left;" data-sort-value="sku14" |[https://ark.intel.com/content/www/us/en/ark/products/52208.html 2400S]
| rowspan=2 | HD 2000
|{{dts|2011|January|format=mdy|abbr=off}}
| rowspan=2 | US $195
|-
! style="text-align:left;" data-sort-value="sku13" |[https://ark.intel.com/content/www/us/en/ark/products/53448.html 2390T]
| 2 (4)
| 2.7
| 3.5
| 650–1100
| 3&nbsp;MB
| 35&nbsp;W
| {{dts|2011|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku12" |[https://ark.intel.com/content/www/us/en/ark/products/64844.html 2380P]
| rowspan=4 | 4 (4)
|3.1
|3.4
| colspan="2" {{N/a}}
| rowspan=4 | 6&nbsp;MB
| rowspan="4" |95&nbsp;W
|{{dts|2012|January|format=mdy|abbr=off}}
| rowspan="4" |US $177
|-
! style="text-align:left;" data-sort-value="sku11" |[https://ark.intel.com/content/www/us/en/ark/products/53446.html 2320]
|3.0
|3.3
| rowspan="4" | HD 2000
| rowspan="3" |850–1100
|{{dts|2011|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku10" |[https://ark.intel.com/content/www/us/en/ark/products/53445.html 2310]
|2.9
|3.2
|{{dts|2011|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku9" |[https://ark.intel.com/content/www/us/en/ark/products/52206.html 2300]
|2.8
|3.1
|{{dts|2011|January|format=mdy|abbr=off}}
|-
! rowspan="8" |Core i3
! style="text-align:left;" data-sort-value="sku8" |[https://ark.intel.com/content/www/us/en/ark/products/53428.html 2130]
| rowspan=8 |2 (4)
|3.4
| rowspan="8" {{N/a}}
| rowspan="3" |850–1100
| rowspan="8" | 3&nbsp;MB
| rowspan="3" |65&nbsp;W
| rowspan="2" |{{dts|2011|September|format=mdy|abbr=off}}
|US $138
|-
! style="text-align:left;" data-sort-value="sku7" |[https://ark.intel.com/content/www/us/en/ark/products/59080.html 2125]
| rowspan="2" |3.3
| HD 3000
|US $134
|-
! style="text-align:left;" data-sort-value="sku6" |[https://ark.intel.com/content/www/us/en/ark/products/53426.html 2120]
| rowspan="2" | HD 2000
| rowspan="2" |{{dts|2011|February|format=mdy|abbr=off}}
|US $138
|-
! style="text-align:left;" data-sort-value="sku5" |[https://ark.intel.com/content/www/us/en/ark/products/53427.html 2120T]
|2.6
|650–1100
|35&nbsp;W
|US $127
|-
! style="text-align:left;" data-sort-value="sku4" |[https://ark.intel.com/content/www/us/en/ark/products/55448.html 2105]
| rowspan="3" |3.1
| HD 3000
| rowspan="3" |850–1100
| rowspan="3" |65&nbsp;W
|{{dts|2011|May|format=mdy|abbr=off}}
|US $134
|-
! style="text-align:left;" data-sort-value="sku3" |[https://ark.intel.com/content/www/us/en/ark/products/53424.html 2102]
| rowspan="3" | HD 2000
|Q2 2011
|US $127
|-
! style="text-align:left;" data-sort-value="sku2" |[https://ark.intel.com/content/www/us/en/ark/products/53422.html 2100]
| rowspan="2" |{{dts|2011|February|format=mdy|abbr=off}}
|US $117
|-
! style="text-align:left;" data-sort-value="sku1" |[https://ark.intel.com/content/www/us/en/ark/products/53423.html 2100T]
|2.5
|650–1100
|35&nbsp;W
|US $127
|-
|}

=== Core i (3rd gen) ===

==== Ivy Bridge-DT<span class="anchor" id="&quot;Ivy Bridge&quot; (22 nm)"></span><span class="anchor" id="&quot;Ivy Bridge&quot; (dual-core, 22 nm)"></span><span class="anchor" id="&quot;Ivy Bridge&quot; (quad-core, 22 nm)"></span><span class="anchor" id="&quot;Ivy Bridge-DT&quot; (22 nm)"></span> ====
{{Main|Ivy Bridge (microarchitecture)#Desktop processors}}
Common features:
* Socket: [[LGA 1155]].
* All the CPUs support dual-channel [[DDR3]] RAM, at up to 1600&nbsp;[[MT/s]] speed.
* All CPU models provide 16 lanes of PCIe. i5 and up models support it at [[PCIe 3.0]] speeds while i3 models support it at PCIe 2.0 speeds.
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[22 nm process|22&nbsp;nm]].
* K-suffix processors have an unlocked multiplier and can be overclocked.
* i3-3220, i5-3550S and i7-3770 are available as embedded processors.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="4" | Core i7
! style="text-align:left;" data-sort-value="sku31" | [https://ark.intel.com/content/www/us/en/ark/products/65523.html 3770K]
| rowspan="4" | 4 (8)
| 3.5
| rowspan="3" | 3.9
| rowspan="5" | [[Intel Graphics Technology#Ivy_Bridge|HD 4000]]
| rowspan="10" | 650–1150
| rowspan="4" | 8&nbsp;MB
| rowspan="2" | 77&nbsp;W
| rowspan="5" | {{dts|2012|April|format=mdy|abbr=off}}
| US $342
|-
! style="text-align:left;" data-sort-value="sku30" | [https://ark.intel.com/content/www/us/en/ark/products/65719.html 3770]
|3.4
|US $305
|-
! style="text-align:left;" data-sort-value="sku29" | [https://ark.intel.com/content/www/us/en/ark/products/65524.html 3770S]
|3.1
|65&nbsp;W
|US $305
|-
! style="text-align:left;" data-sort-value="sku28" | [https://ark.intel.com/content/www/us/en/ark/products/65525.html 3770T]
|2.5
|3.7
|45&nbsp;W
|US $294
|-
! rowspan="18" |Core i5
! style="text-align:left;" data-sort-value="sku27" | [https://ark.intel.com/content/www/us/en/ark/products/65520.html 3570K]
| rowspan="9" |4 (4)
| rowspan="2" |3.4
| rowspan="3" |3.8
| rowspan="9" | 6&nbsp;MB
| rowspan="2" |77&nbsp;W
|US $225
|-
! style="text-align:left;" data-sort-value="sku26" | [https://ark.intel.com/content/www/us/en/ark/products/65702.html 3570]
| rowspan="6" | [[Intel Graphics Technology#Ivy_Bridge|HD 2500]]
| rowspan="2" | {{dts|2012|June|format=mdy|abbr=off}}
| rowspan="5" |US $205
|-
! style="text-align:left;" data-sort-value="sku25" | [https://ark.intel.com/content/www/us/en/ark/products/65701.html 3570S]
|3.1
|65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku24" | [https://ark.intel.com/content/www/us/en/ark/products/65521.html 3570T]
|2.3
|3.3
|45&nbsp;W
| rowspan="3" | {{dts|2012|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku23" | [https://ark.intel.com/content/www/us/en/ark/products/65516.html 3550]
|3.3
| rowspan="2" |3.7
|77&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku22" | [https://ark.intel.com/content/www/us/en/ark/products/65518.html 3550S]
|3.0
|65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku21" | [https://ark.intel.com/content/www/us/en/ark/products/68316.html 3470]
|3.2
| rowspan="4" |3.6
| rowspan="6" |650–1100
|77&nbsp;W
| rowspan="4" | {{dts|2012|June|format=mdy|abbr=off}}
|US $184
|-
! style="text-align:left;" data-sort-value="sku20" | [https://ark.intel.com/content/www/us/en/ark/products/65515.html 3475S]
| rowspan="3" |2.9
|HD 4000
| rowspan="2" |65&nbsp;W
|US $201
|-
! style="text-align:left;" data-sort-value="sku19" | [https://ark.intel.com/content/www/us/en/ark/products/68315.html 3470S]
| rowspan="4" |HD 2500
| rowspan="4" |US $184
|-
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/65703.html 3470T]
|2 (4)
| 3&nbsp;MB
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/65511.html 3450]
| rowspan="8" |4 (4)
|3.1
| rowspan="2" |3.5
| rowspan="8" | 6&nbsp;MB
|77&nbsp;W
| rowspan="2" | {{dts|2012|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/65512.html 3450S]
|2.8
|65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/69114.html 3350P]
| rowspan="2" |3.1
| rowspan="3" |3.3
| colspan="2" {{n/a}}
|69&nbsp;W
| {{dts|2012|September|format=mdy|abbr=off}}
|US $177
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/76342.html 3340]
| rowspan="3" |HD 2500
| rowspan="14" |650–1050
|77&nbsp;W
| rowspan="2" | {{dts|2013|September|format=mdy|abbr=off}}
| rowspan="3" |US $182
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/76343.html 3340S]
|2.8
|65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/65509.html 3330]
|3.0
| rowspan="3" |3.2
|77&nbsp;W
| rowspan="3" | {{dts|2012|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku11" | 3335S
| rowspan="2" |2.7
|HD 4000
| rowspan="2" |65&nbsp;W
|US $194
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/65510.html 3330S]
| rowspan="3" |HD 2500
|US $177
|-
! rowspan="9" |Core i3
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/74744.html 3250]
| rowspan="9" |2 (4)
|3.5
| rowspan="9" {{n/a}}
| rowspan="9" |3&nbsp;MB
|55&nbsp;W
| rowspan="3" | {{dts|2013|June|format=mdy|abbr=off}}
| rowspan="2" |US $138
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/74745.html 3250T]
|3.0
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku7" | [https://web.archive.org/web/20230629210739/https://ark.intel.com/content/www/us/en/ark/products/74746/intel-core-i33245-processor-3m-cache-3-40-ghz.html 3245]
| rowspan="2" |3.4
|HD 4000
| rowspan="2" |55&nbsp;W
|US $134
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/65690.html 3240]
| rowspan="2" |HD 2500
| rowspan="5" | {{dts|2012|September|format=mdy|abbr=off}}
| rowspan="2" |US $138
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/66168.html 3240T]
|2.9
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/65692.html 3225]
| rowspan="2" |3.3
|HD 4000
| rowspan="2" |55&nbsp;W
|US $134
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/65693.html 3220]
| rowspan="3" |HD 2500
| rowspan="3" |US $117
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/65694.html 3220T]
|2.8
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/71053.html 3210]
|3.2
|55&nbsp;W
| {{dts|2013|January|format=mdy|abbr=off}}
|}

==== Sandy Bridge-E<span class="anchor" id="&quot;Sandy Bridge-E&quot; (32 nm)"></span> ====

Common features:
* Socket: [[LGA 2011]].
* All the CPUs support quad-channel [[DDR3]]-1600 RAM.
* All CPU models provide 40 lanes of [[PCIe 2.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[32 nm process|32&nbsp;nm]].
* K-suffix and X-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan=4 | Core i7
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/70845.html 3970X]
| rowspan=3 | 6 (12)
| 3.5
| 4.0
| rowspan=2 | 15&nbsp;MB
| 150&nbsp;W
| {{dts|2012|November|format=mdy|abbr=off}}
| rowspan=2 | US $999
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/63696.html 3960X]
| 3.3
| 3.9
| rowspan=3 | 130&nbsp;W
| rowspan=2 | {{dts|2011|November|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/63697.html 3930K]
| 3.2
| 3.8
| 12&nbsp;MB
| US $583
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/63698.html 3820]
| 4 (8)
| 3.6
| 3.8
| 10&nbsp;MB
| {{dts|2012|February|format=mdy|abbr=off}}
| US $294
|}

=== Core i (4th gen) ===

==== Haswell-DT<span class="anchor" id="&quot;Haswell-DT&quot; (22 nm)"></span><span class="anchor" id="&quot;Haswell-DT&quot; (dual-core, 22 nm)"></span><span class="anchor" id="&quot;Haswell-DT&quot; (quad-core, 22 nm, 4th generation)"></span><span class="anchor" id="Haswell-DT (quad-core, 22 nm)"></span><span class="anchor" id="&quot;Haswell-DT&quot; (quad-core, 22 nm)"></span> ====
[[File:Intel i3 4130, Haswell 22nm (PNG).png|thumb|Intel i3 4130, Haswell 22nm die shot]]
Common features:
* Socket: [[LGA 1150]].
* All the CPUs support dual-channel [[DDR3]] RAM at up to 1600&nbsp;[[MT/s]] speed.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[22 nm process|22&nbsp;nm]].
* K-suffix processors have an unlocked multiplier and can be overclocked.
* The following models are available as embedded processors: i3- 4330, 4350T, 4360, i5- 4570S, 4590T, 4590S, i7- 4770S, 4790S.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="11" | Core i7
! style="text-align:left;" data-sort-value="sku50" | [https://ark.intel.com/content/www/us/en/ark/products/80807.html 4790K]
| rowspan="11" | 4 (8)
| 4.0
| 4.4
| rowspan="42" | [[Intel Graphics Technology#Haswell|HD 4600]]
| 350–1250
| rowspan="11" | 8&nbsp;MB
| 88&nbsp;W
| {{dts|2014|June|format=mdy|abbr=off}}
| US $350
|-
! style="text-align:left;" data-sort-value="sku49" | [https://ark.intel.com/content/www/us/en/ark/products/80806.html 4790]
|3.6
| rowspan="2" |4.0
| rowspan="4" |350–1200
|84&nbsp;W
| rowspan="4" | {{dts|2014|May|format=mdy|abbr=off}}
| rowspan="2" |US $312
|-
! style="text-align:left;" data-sort-value="sku48" | [https://ark.intel.com/content/www/us/en/ark/products/80808.html 4790S]
|3.2
|65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku47" | [https://ark.intel.com/content/www/us/en/ark/products/80809.html 4790T]
|2.7
|3.9
|45&nbsp;W
| rowspan="2" |US $303
|-
! style="text-align:left;" data-sort-value="sku46" | [https://ark.intel.com/content/www/us/en/ark/products/80814.html 4785T]
|2.2
|3.2
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku45" | [https://ark.intel.com/content/www/us/en/ark/products/75123.html 4770K]
| rowspan="2" |3.5
| rowspan="4" |3.9
|350–1250
| rowspan="3" |84&nbsp;W
| {{dts|2013|June|format=mdy|abbr=off}}
|US $350
|-
! style="text-align:left;" data-sort-value="sku44" | [https://ark.intel.com/content/www/us/en/ark/products/77656.html 4771]
| rowspan="13" |350–1200
| {{dts|2013|September|format=mdy|abbr=off}}
|US $320
|-
! style="text-align:left;" data-sort-value="sku43" | [https://ark.intel.com/content/www/us/en/ark/products/75122.html 4770]
|3.4
| rowspan="4" | {{dts|2013|June|format=mdy|abbr=off}}
|US $312
|-
! style="text-align:left;" data-sort-value="sku42" | [https://ark.intel.com/content/www/us/en/ark/products/75124.html 4770S]
|3.1
|65&nbsp;W
|US $305
|-
! style="text-align:left;" data-sort-value="sku41" | [https://ark.intel.com/content/www/us/en/ark/products/75125.html 4770T]
|2.5
|3.7
|45&nbsp;W
| rowspan="2" |US $303
|-
! style="text-align:left;" data-sort-value="sku40" | [https://ark.intel.com/content/www/us/en/ark/products/75121.html 4765T]
|2.0
|3.0
|35&nbsp;W
|-
! rowspan="22" |Core i5
! style="text-align:left;" data-sort-value="sku39" | [https://ark.intel.com/content/www/us/en/ark/products/80811.html 4690K]
| rowspan="13" |4 (4)
| rowspan="2" |3.5
| rowspan="3" |3.9
| rowspan="13" |6&nbsp;MB
|88&nbsp;W
| {{dts|2014|June|format=mdy|abbr=off}}
|US $242
|-
! style="text-align:left;" data-sort-value="sku38" | [https://ark.intel.com/content/www/us/en/ark/products/80810.html 4690]
|84&nbsp;W
| rowspan="3" | {{dts|2014|May|format=mdy|abbr=off}}
| rowspan="3" |US $213
|-
! style="text-align:left;" data-sort-value="sku37" | [https://ark.intel.com/content/www/us/en/ark/products/80812.html 4690S]
|3.2
|65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku36" | [https://ark.intel.com/content/www/us/en/ark/products/80813.html 4690T]
|2.5
|3.5
|45&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku35" | [https://ark.intel.com/content/www/us/en/ark/products/75048.html 4670K]
| rowspan="2" |3.4
| rowspan="3" |3.8
| rowspan="2" |84&nbsp;W
| rowspan="4" | {{dts|2013|June|format=mdy|abbr=off}}
|US $242
|-
! style="text-align:left;" data-sort-value="sku34" | [https://ark.intel.com/content/www/us/en/ark/products/75047.html 4670]
| rowspan="3" |US $213
|-
! style="text-align:left;" data-sort-value="sku33" | [https://ark.intel.com/content/www/us/en/ark/products/75049.html 4670S]
|3.1
|65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku32" | [https://ark.intel.com/content/www/us/en/ark/products/75050.html 4670T]
|2.3
|3.3
|45&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku31" | [https://ark.intel.com/content/www/us/en/ark/products/80815.html 4590]
|3.3
| rowspan="2" |3.7
| rowspan="5" |350–1150
|84&nbsp;W
| rowspan="3" | {{dts|2014|May|format=mdy|abbr=off}}
| rowspan="6" |US $192
|-
! style="text-align:left;" data-sort-value="sku30" | [https://ark.intel.com/content/www/us/en/ark/products/80816.html 4590S]
|3.0
|65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku29" | [https://ark.intel.com/content/www/us/en/ark/products/78928.html 4590T]
|2.0
|3.0
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku28" | [https://ark.intel.com/content/www/us/en/ark/products/75043.html 4570]
|3.2
| rowspan="3" |3.6
|84&nbsp;W
| rowspan="3" | {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku27" | [https://ark.intel.com/content/www/us/en/ark/products/75044.html 4570S]
| rowspan="2" |2.9
|65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku26" | [https://ark.intel.com/content/www/us/en/ark/products/75045.html 4570T]
|2 (4)
|200–1150
|4&nbsp;MB
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku25" | 4470
| rowspan="8" |4 (4)
|3.3
|3.5
| rowspan="8" |350–1100
| rowspan="8" |6&nbsp;MB
| rowspan="2" |84&nbsp;W
| rowspan="3" | {{dts|2014|May|format=mdy|abbr=off}}
| {{n/a|OEM}}
|-
! style="text-align:left;" data-sort-value="sku24" | [https://ark.intel.com/content/www/us/en/ark/products/80817.html 4460]
|3.2
| rowspan="2" |3.4
| rowspan="7" |US $182
|-
! style="text-align:left;" data-sort-value="sku23" | [https://ark.intel.com/content/www/us/en/ark/products/80818.html 4460S]
|2.9
|65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku22" | [https://ark.intel.com/content/www/us/en/ark/products/78927.html 4460T]
|1.9
|2.7
|35&nbsp;W
| {{dts|2014|March|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku21" | [https://ark.intel.com/content/www/us/en/ark/products/75038.html 4440]
|3.1
| rowspan="2" |3.3
|84&nbsp;W
| rowspan="2" | {{dts|2013|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku20" | [https://ark.intel.com/content/www/us/en/ark/products/75040.html 4440S]
|2.8
|65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku19" | [https://ark.intel.com/content/www/us/en/ark/products/75036.html 4430]
|3.0
| rowspan="2" |3.2
|84&nbsp;W
| rowspan="2" | {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/75037.html 4430S]
|2.7
|65&nbsp;W
|-
! rowspan="17" |Core i3
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/77495.html 4370]
| rowspan="17" |2 (4)
|3.8
| rowspan="17" {{n/a}}
|350–1150
| rowspan="9" |4&nbsp;MB
|54&nbsp;W
| {{dts|2014|July|format=mdy|abbr=off}}
|US $149
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/81207.html 4370T]
|3.3
|200–1150
|35&nbsp;W
| {{dts|2015|March|format=mdy|abbr=off}}
|US $138
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/77493.html 4360]
|3.7
|350–1150
|54&nbsp;W
| {{dts|2014|May|format=mdy|abbr=off}}
|US $149
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/77494.html 4360T]
|3.2
|200–1150
|35&nbsp;W
| {{dts|2014|July|format=mdy|abbr=off}}
| rowspan="3" |US $138
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/77491.html 4350]
|3.6
|350–1150
|54&nbsp;W
| rowspan="2" | {{dts|2014|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/77492.html 4350T]
|3.1
|200–1150
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/77771.html 4340]
|3.6
| rowspan="2" |350–1150
| rowspan="2" |54&nbsp;W
| rowspan="3" | {{dts|2013|September|format=mdy|abbr=off}}
|US $149
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/77769.html 4330]
|3.5
| rowspan="2" |US $138
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/77770.html 4330T]
|3.0
|200–1150
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/77490.html 4170]
|3.7
| rowspan="8" | [[Intel Graphics Technology#Haswell|HD 4400]]
|350–1150
| rowspan="8" |3&nbsp;MB
|54&nbsp;W
| rowspan="2" | {{dts|2015|March|format=mdy|abbr=off}}
| rowspan="6" |US $117
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/81209.html 4170T]
|3.2
|200–1150
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/77488.html 4160]
|3.6
|350–1150
|54&nbsp;W
| rowspan="2" | {{dts|2014|July|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/77489.html 4160T]
|3.1
|200–1150
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/77486.html 4150]
|3.5
|350–1150
|54&nbsp;W
| rowspan="2" | {{dts|2014|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/77487.html 4150T]
|3.0
|200–1150
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/77480.html 4130]
|3.4
|350–1150
|54&nbsp;W
| rowspan="2" | {{dts|2013|September|format=mdy|abbr=off}}
| rowspan="2" |US $122
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/77481.html 4130T]
|2.9
|200–1150
|35&nbsp;W
|}

==== Haswell-H<span class="anchor" id="&quot;Haswell-H&quot; (MCP, quad-core, 22 nm)"></span><span class="anchor" id="Haswell-H (MCP, quad-core, 22 nm)"></span> ====

Common features:
* Socket: BGA 1364 (soldered).
* All the CPUs support dual-channel [[DDR3]] RAM, at up to 1600&nbsp;[[MT/s]] speed.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* In addition to the Smart Cache (L3 cache), Haswell-H CPUs also contain 128&nbsp;MB of [[eDRAM]] acting as L4 cache.
* Fabrication process: [[22 nm process|22&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/76642.html 4770R]
| 4 (8)
| 3.2
| 3.9
| rowspan=3 | [[Intel Graphics Technology#Haswell|Iris Pro 5200]]
| rowspan=2 | 200–1300
| 6&nbsp;MB
| rowspan=3 | 65&nbsp;W
| rowspan=3 | {{dts|2013|June|format=mdy|abbr=off}}
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/76641.html 4670R]
| rowspan=2 | 4 (4)
| 3.0
| 3.7
| rowspan=2 | 4&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/76640.html 4570R]
| 2.7
| 3.2
| 200–1150
|}

==== Ivy Bridge-E<span class="anchor" id="&quot;Ivy Bridge-E&quot; (22 nm)"></span> ====

Common features:
* Socket: [[LGA 2011]].
* All the CPUs support quad-channel [[DDR3]]-1866 RAM.
* All CPU models provide 40 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[22 nm process|22&nbsp;nm]].
* K-suffix and X-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan=3 | Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/77779.html 4960X]
| rowspan=2 | 6 (12)
| 3.6
| 4.0
| 15&nbsp;MB
| rowspan=3 | 130&nbsp;W
| rowspan=3 | {{dts|2013|September|format=mdy|abbr=off}}
| US $990
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/77780.html 4930K]
| 3.4
| rowspan=2 | 3.9
| 12&nbsp;MB
| US $555
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/77781.html 4820K]
| 4 (8)
| 3.7
| 10&nbsp;MB
| US $310
|}

=== Core i (5th gen) ===

==== Broadwell-H<span class="anchor" id="&quot;Broadwell-H&quot; (quad-core, 14 nm)"></span><span class="anchor" id="Broadwell-H (quad-core, 14 nm)"></span><span class="anchor" id="&quot;Broadwell-DT&quot; (quad-core, 14 nm)"></span> ====

Common features:
* Socket: [[LGA 1150]] for C-suffix processors, BGA 1364 soldered for R-suffix.
* All the CPUs support dual-channel [[DDR3]] RAM. C-suffix processors support it at speeds up to 1600&nbsp;[[MT/s]], while R-suffix support it at 1866&nbsp;MT/s.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* In addition to the Smart Cache (L3 cache), Broadwell-H CPUs also contain 128&nbsp;MB of [[eDRAM]] acting as L4 cache.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/87718.html 5775R]
| rowspan=2 | 4 (8)
| rowspan=2 | 3.3
| 3.8
| rowspan=5 | [[Intel Graphics Technology#Broadwell|Iris Pro 6200]]
| rowspan=2 | 300–1150
| rowspan=2 | 6&nbsp;MB
| rowspan=5 | 65&nbsp;W
| rowspan=5 | {{dts|2015|June|format=mdy|abbr=off}}
| {{n/a|OEM}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/88040.html 5775C]
| 3.7
| US $366
|-
! rowspan=3 | Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/87715.html 5675R]
| rowspan=3 | 4 (4)
| rowspan=2 | 3.1
| rowspan=2 | 3.6
| rowspan=2 | 300–1100
| rowspan=3 | 4&nbsp;MB
| {{n/a|OEM}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/88095.html 5675C]
| US $276
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/87714.html 5575R]
| 2.8
| 3.3
| 300–1050
| {{n/a|OEM}}
|}

==== Haswell-E<span class="anchor" id="&quot;Haswell-E&quot; (22 nm)"></span> ====

Common features:
* Socket: [[LGA 2011-3]].
* All the CPUs support quad-channel [[DDR4]]-2133 RAM.
* i7-5820K provides 28 lanes of [[PCIe 3.0]]; i7-5930K and 5960X provide 40 lanes of PCIe 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[22 nm process|22&nbsp;nm]].
* K-suffix and X-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan=3 | Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/82930.html 5960X]
| 8 (16)
| 3.0
| 3.5
| 20&nbsp;MB
| rowspan=3 | 140&nbsp;W
| rowspan=3 | {{dts|2014|August|format=mdy|abbr=off}}
| US $999
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/82931.html 5930K]
| rowspan=2 | 6 (12)
| 3.5
| 3.7
| rowspan=2 | 15&nbsp;MB
| US $583
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/82932.html 5820K]
| 3.3
| 3.6
| US $389
|}

=== Core i (6th gen) ===

==== Skylake-S<span class="anchor" id="&quot;Skylake-S&quot; (14 nm)"></span><span class="anchor" id="&quot;Skylake-S&quot; (quad-core, 14 nm)"></span><span class="anchor" id="Skylake-S (quad-core, 14 nm)"></span> ====

Common features:
* Socket: [[LGA 1151]].
* All the CPUs support dual-channel [[DDR4]]-2133 or [[DDR3L]]-1600 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* K-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="3" | Core i7
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/88195.html 6700K]
| rowspan="3" | 4 (8)
| 4.0
| 4.2
| rowspan="8" | [[Intel Graphics Technology#Skylake|HD 530]]
| rowspan="2" | 350–1150
| rowspan="3" | 8&nbsp;MB
| 91&nbsp;W
| {{dts|2015|August|format=mdy|abbr=off}}
| US $339
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/88196.html 6700]
|3.4
|4.0
|65&nbsp;W
| rowspan="2" | {{dts|2015|September|format=mdy|abbr=off}}
| rowspan="2" |US $303
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/88200.html 6700T]
|2.8
|3.6
|350–1100
|35&nbsp;W
|-
! rowspan="8" |Core i5
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/88191.html 6600K]
| rowspan="8" |4 (4)
|3.5
| rowspan="2" |3.9
| rowspan="2" |350–1150
| rowspan="8" |6&nbsp;MB
|91&nbsp;W
| {{dts|2015|August|format=mdy|abbr=off}}
|US $243
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/88188.html 6600]
|3.3
|65&nbsp;W
| rowspan="4" | {{dts|2015|September|format=mdy|abbr=off}}
| rowspan="2" |US $213
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/88189.html 6600T]
|2.7
|3.5
|350–1100
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/88184.html 6500]
|3.2
|3.6
|350–1050
|65&nbsp;W
| rowspan="2" |US $192
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/88183.html 6500T]
|2.5
|3.1
|350–1100
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/93277.html 6402P]
|2.8
|3.4
|[[Intel Graphics Technology#Skylake|HD 510]]
| rowspan="3" |350–950
| rowspan="2" |65&nbsp;W
| {{dts|2015|December|format=mdy|abbr=off}}
| rowspan="3" |US $182
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/88185.html 6400]
|2.7
|3.3
| rowspan="7" |HD 530
| rowspan="7" | {{dts|2015|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/88187.html 6400T]
|2.2
|2.8
|35&nbsp;W
|-
! rowspan="6" |Core i3
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/90733.html 6320]
| rowspan="6" |2 (4)
|3.9
| rowspan="6" {{n/a}}
| rowspan="2" |350–1150
| rowspan="3" |4&nbsp;MB
| rowspan="2" |51&nbsp;W
|US $148
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/90731.html 6300]
|3.8
|US $139
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/90728.html 6300T]
|3.3
|350–950
|35&nbsp;W
|US $138
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/90729.html 6100]
|3.7
|350–1050
| rowspan="3" |3&nbsp;MB
|51&nbsp;W
| rowspan="3" |US $117
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/90734.html 6100T]
|3.2
|350–950
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/93366.html 6098P]
|3.6
|HD 510
|350–1050
|54&nbsp;W
| {{dts|2015|December|format=mdy|abbr=off}}
|}

==== Skylake-H<span class="anchor" id="&quot;Skylake-H&quot; (quad-core, 14 nm)"></span><span class="anchor" id="Skylake-H (quad-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 1440 (soldered).
* All the CPUs support dual-channel [[DDR4]]-2133 or [[DDR3L]]-1600 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* In addition to the Smart Cache (L3 cache), Skylake-H CPUs also contain 128&nbsp;MB of [[eDRAM]] acting as L4 cache.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/93339.html 6785R]
| 4 (8)
| 3.3
| 3.9
| rowspan=3 | [[Intel Graphics Technology#Skylake|Iris Pro 580]]
| rowspan=2 | 350–1150
| 8&nbsp;MB
| rowspan=3 | 65&nbsp;W
| rowspan=3 | {{dts|2016|May|format=mdy|abbr=off}}
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/93338.html 6685R]
| rowspan=2 | 4 (4)
| 3.2
| 3.8
| rowspan=2 | 6&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/93337.html 6585R]
| 2.8
| 3.6
| 350–1100
|}

==== Broadwell-E<span class="anchor" id="&quot;Broadwell-E&quot; (14 nm)"></span> ====

Common features:
* Socket: [[LGA 2011-3]].
* All the CPUs support quad-channel [[DDR4]]-2400 RAM.
* i7-6800K provides 28 lanes of [[PCIe 3.0]]; all other models provide 40 lanes of PCIe 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* K-suffix and X-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan=4 | Core i7
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/94456.html 6950X]
| 10 (20)
| 3.0
| 3.5
| 25&nbsp;MB
| rowspan=4 | 140&nbsp;W
| rowspan=4 | {{dts|2016|May|format=mdy|abbr=off}}
| US $1723
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/94196.html 6900K]
| 8 (16)
| 3.2
| 3.7
| 20&nbsp;MB
| US $1089
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/94188.html 6850K]
| rowspan=2 | 6 (12)
| 3.6
| rowspan=2 | 3.8
| rowspan=2 | 15&nbsp;MB
| US $617
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/94189.html 6800K]
| 3.4
| US $434
|}

=== Core i (7th gen) ===

==== Kaby Lake-S<span class="anchor" id="&quot;Kaby Lake-S&quot; (14 nm)"></span><span class="anchor" id="Kaby Lake-S"></span> ====

Common features:
* Socket: [[LGA 1151]].
* All the CPUs support dual-channel [[DDR4]]-2400 or [[DDR3L]]-1600 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* K-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="3" | Core i7
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/97129.html 7700K]
| rowspan="3" | 4 (8)
| 4.2
| 4.5
| rowspan="16" | [[Intel Graphics Technology#Kaby Lake|HD 630]]
| rowspan="5" | 350–1150
| rowspan="3" | 8&nbsp;MB
| 91&nbsp;W
| rowspan="16" | {{dts|2017|January|format=mdy|abbr=off}}
| US $339
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/97128.html 7700]
|3.6
|4.2
|65&nbsp;W
| rowspan="2" |US $303
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/97122.html 7700T]
|2.9
|3.8
|35&nbsp;W
|-
! rowspan="7" |Core i5
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/97144.html 7600K]
| rowspan="7" |4 (4)
|3.8
|4.2
| rowspan="7" |6&nbsp;MB
|91&nbsp;W
|US $242
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/97150.html 7600]
|3.5
|4.1
|65&nbsp;W
| rowspan="2" |US $213
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/97183.html 7600T]
|2.8
|3.7
| rowspan="3" |350–1100
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/97123.html 7500]
|3.4
|3.8
|65&nbsp;W
| rowspan="2" |US $192
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/97121.html 7500T]
|2.7
|3.3
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/97147.html 7400]
|3.0
|3.5
| rowspan="2" |350–1000
|65&nbsp;W
| rowspan="2" |US $182
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/97184.html 7400T]
|2.4
|3.0
|35&nbsp;W
|-
! rowspan="6" |Core i3
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/97527.html 7350K]
| rowspan="6" |2 (4)
|4.2
| rowspan="6" {{n/a}}
| rowspan="3" |350–1150
| rowspan="4" |4&nbsp;MB
|60&nbsp;W
|US $168
|-
! style="text-align:left;" data-sort-value="sku5" | [https://web.archive.org/web/20240804215151/https://www.intel.com/content/www/us/en/products/sku/97484/intel-core-i37320-processor-4m-cache-4-10-ghz/specifications.html 7320]
|4.1
| rowspan="2" |51&nbsp;W
|US $157
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/97458.html 7300]
|4.0
| rowspan="2" |US $147
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/97457.html 7300T]
|3.5
| rowspan="3" |350–1100
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/97455.html 7100]
|3.9
| rowspan="2" |3&nbsp;MB
|51&nbsp;W
| rowspan="2" |US $117
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/97485.html 7100T]
|3.4
|35&nbsp;W
|}

==== Skylake-X<span class="anchor" id="&quot;Skylake-X&quot; (14 nm)"></span><span class="anchor" id="Skylake-X (14 nm, 7th generation)"></span> ====
{{For-text|the 9th generation refresh|section [[#Skylake-X (9xxx)|§ Skylake-X (9xxx)]] below}}

Common features:
* Socket: [[LGA 2066]].
* All the CPUs support quad-channel [[DDR4]]-2400 RAM. Models i7-7820X and above support it up to 2666&nbsp;[[MT/s]] speeds.
* i7 models provide 28 lanes of [[PCIe 3.0]]; i9 models provide 44 lanes of PCIe 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* X-suffix, and XE-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="3" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo<br />2.0
! class="unsortable" | Turbo<br />3.0
|-
! rowspan=5 | Core i9
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/126699.html 7980XE]
| 18 (36)
| 2.6
| rowspan=2 | 4.2
| rowspan=4 | 4.4
| 24.75&nbsp;MB
| rowspan=3 | 165&nbsp;W
| rowspan=3 | {{dts|2017|September|format=mdy|abbr=off}}
| US $1999
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/126697.html 7960X]
| 16 (32)
| 2.8
| 22&nbsp;MB
| US $1699
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/126695.html 7940X]
| 14 (28)
| 3.1
| rowspan=4 | 4.3
| 19.25&nbsp;MB
| US $1399
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/126240.html 7920X]
| 12 (24)
| 2.9
| 16.5&nbsp;MB
| rowspan=4 | 140&nbsp;W
| {{dts|2017|August|format=mdy|abbr=off}}
| US $1199
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/123613.html 7900X]
| 10 (20)
| 3.3
| rowspan=2 | 4.5
| 13.75&nbsp;MB
| rowspan=4 | {{dts|2017|June|format=mdy|abbr=off}}
| US $989
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/123767.html 7820X]
| 8 (16)
| 3.6
| 11&nbsp;MB
| US $599
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/123589.html 7800X]
| 6 (12)
| 3.5
| 4.0
| {{n/a}}
| 8.25&nbsp;MB
| US $389
|}

==== Kaby Lake-X<span class="anchor" id="&quot;Kaby Lake-X&quot; (14 nm)"></span> ====

Common features:
* Socket: [[LGA 2066]].
* All the CPUs support dual-channel [[DDR4]]-2666 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* X-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core i7
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/121499.html 7740X]
| 4 (8)
| 4.3
| 4.5
| 8&nbsp;MB
| rowspan=2 | 112&nbsp;W
| rowspan=2 | {{dts|2017|June|format=mdy|abbr=off}}
| US $339
|-
! Core i5
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/121500.html 7640X]
| 4 (4)
| 4.0
| 4.2
| 6&nbsp;MB
| US $242
|}

=== Core i (8th gen) ===

==== Coffee Lake-S<span class="anchor" id="&quot;Coffee Lake-S&quot; (14 nm) (9th gen is Coffee Lake-R)"></span><span class="anchor" id="&quot;Coffee Lake-S&quot; (14 nm)"></span><span class="anchor" id="Coffee Lake-S"></span> ====
{{For-text|the 9th generation refresh|section [[#Coffee Lake-R|§ Coffee Lake-R]] below}}

Common features:
* Socket: [[LGA 1151-2]].
* All the CPUs support dual-channel [[DDR4]] RAM at up to 2400&nbsp;[[MT/s]] speed. Models i5 and up support it at up to 2666&nbsp;MT/s speed.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* K-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="4" | Core i7
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/148263.html 8086K]
| rowspan="4" | 6 (12)
| 4.0
| 5.0
| rowspan="15" | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 630]]
| rowspan="4" | 350–1200
| rowspan="4" | 12&nbsp;MB
| rowspan="2" | 95&nbsp;W
| {{dts|2018|June|format=mdy|abbr=off}}
| US $425
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/126684.html 8700K]
|3.7
|4.7
| rowspan="2" | {{dts|2017|October|format=mdy|abbr=off}}
|US $359
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/126686.html 8700]
|3.2
|4.6
|65&nbsp;W
| rowspan="2" |US $303
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/129948.html 8700T]
|2.4
|4.0
|35&nbsp;W
| {{dts|2018|April|format=mdy|abbr=off}}
|-
! rowspan="7" |Core i5
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/126685.html 8600K]
| rowspan="7" |6 (6)
|3.6
| rowspan="2" |4.3
| rowspan="3" |350–1150
| rowspan="7" |9&nbsp;MB
|95&nbsp;W
| {{dts|2017|October|format=mdy|abbr=off}}
|US $257
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/129937.html 8600]
|3.1
|65&nbsp;W
| rowspan="4" | {{dts|2018|April|format=mdy|abbr=off}}
| rowspan="2" |US $213
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/129938.html 8600T]
|2.3
|3.7
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/129939.html 8500]
|3.0
|4.1
| rowspan="2" |350–1100
|65&nbsp;W
| rowspan="2" |US $192
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/129941.html 8500T]
|2.1
|3.5
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/126687.html 8400]
|2.8
|4.0
| rowspan="2" |350–1050
|65&nbsp;W
| {{dts|2017|October|format=mdy|abbr=off}}
| rowspan="2" |US $182
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/129940.html 8400T]
|1.7
|3.3
|35&nbsp;W
| {{dts|2018|April|format=mdy|abbr=off}}
|-
! rowspan="6" |Core i3
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/126689.html 8350K]
| rowspan="6" |4 (4)
|4.0
| rowspan="6" {{n/a}}
| rowspan="2" |350–1150
| rowspan="3" |8&nbsp;MB
|91&nbsp;W
| {{dts|2017|October|format=mdy|abbr=off}}
|US $168
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/129942.html 8300]
|3.7
|62&nbsp;W
| rowspan="2" | {{dts|2018|April|format=mdy|abbr=off}}
| rowspan="2" |US $138
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/129943.html 8300T]
|3.2
| rowspan="2" |350–1100
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/126688.html 8100]
| rowspan="2" |3.6
| rowspan="3" |6&nbsp;MB
| rowspan="2" |65&nbsp;W
| {{dts|2017|October|format=mdy|abbr=off}}
| rowspan="3" |US $117
|-
! style="text-align:left;" data-sort-value="sku2" | 8100F
| colspan="2" {{n/a}}
| {{dts|2019|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/129944.html 8100T]
|3.1
|UHD 630
|350–1100
|35&nbsp;W
| {{dts|2018|April|format=mdy|abbr=off}}
|}

=== Core i (9th gen) ===

==== Coffee Lake-R<span class="anchor" id="Coffee Lake-S Refresh (14 nm, 9th generation)"></span> ====

Common features:
* Socket: [[LGA 1151-2]].
* All the CPUs support dual-channel [[DDR4]] RAM at up to 2400&nbsp;[[MT/s]] speed. Models i5 and up support it at up to 2666&nbsp;MT/s speed.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* K-suffix processors have an unlocked multiplier and can be overclocked.
* i9-9900KS has all-core boost clock of 5.0&nbsp;GHz.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="5" | Core i9
! style="text-align:left;" data-sort-value="sku28" | [https://ark.intel.com/content/www/us/en/ark/products/192943.html 9900KS]
| rowspan="5" | 8 (16)
| 4.0
| rowspan="4" | 5.0
| rowspan="2" | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 630]]
| rowspan="2" | 350–1200
| rowspan="5" | 16&nbsp;MB
| 127&nbsp;W
| {{dts|2019|October|format=mdy|abbr=off}}
| US $524
|-
! style="text-align:left;" data-sort-value="sku27" | [https://ark.intel.com/content/www/us/en/ark/products/186605.html 9900K]
| rowspan="2" |3.6
| rowspan="2" |95&nbsp;W
| {{dts|2018|October|format=mdy|abbr=off}}
|US $488
|-
! style="text-align:left;" data-sort-value="sku26" | [https://ark.intel.com/content/www/us/en/ark/products/190887.html 9900KF]
| colspan="2" {{n/a}}
| {{dts|2019|January|format=mdy|abbr=off}}
|US $463
|-
! style="text-align:left;" data-sort-value="sku25" | [https://ark.intel.com/content/www/us/en/ark/products/191789.html 9900]
|3.1
| rowspan="3" |UHD 630
| rowspan="3" |350–1200
|65&nbsp;W
| rowspan="2" | {{dts|2019|April|format=mdy|abbr=off}}
| rowspan=2 | US $439
|-
! style="text-align:left;" data-sort-value="sku24" | [https://ark.intel.com/content/www/us/en/ark/products/191044.html 9900T]
|2.1
|4.4
|35&nbsp;W
|-
! rowspan="5" |Core i7
! style="text-align:left;" data-sort-value="sku23" | [https://ark.intel.com/content/www/us/en/ark/products/186604.html 9700K]
| rowspan="5" |8 (8)
| rowspan="2" |3.6
| rowspan="2" |4.9
| rowspan="5" |12&nbsp;MB
| rowspan="2" |95&nbsp;W
| {{dts|2018|October|format=mdy|abbr=off}}
| rowspan="2" |US $374
|-
! style="text-align:left;" data-sort-value="sku22" | [https://ark.intel.com/content/www/us/en/ark/products/190885.html 9700KF]
| colspan="2" {{n/a}}
| {{dts|2019|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku21" | [https://ark.intel.com/content/www/us/en/ark/products/191792.html 9700]
| rowspan="2" |3.0
| rowspan="2" |4.7
|UHD 630
|350–1200
| rowspan="2" |65&nbsp;W
| rowspan="3" | {{dts|2019|April|format=mdy|abbr=off}}
| rowspan="3" |US $323
|-
! style="text-align:left;" data-sort-value="sku20" | [https://ark.intel.com/content/www/us/en/ark/products/193738.html 9700F]
| colspan="2" {{n/a}}
|-
! style="text-align:left;" data-sort-value="sku19" | [https://ark.intel.com/content/www/us/en/ark/products/191048.html 9700T]
|2.0
|4.3
| rowspan="2" |UHD 630
|350–1200
|35&nbsp;W
|-
! rowspan="10" |Core i5
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/134896.html 9600K]
| rowspan="10" |6 (6)
| rowspan="2" |3.7
| rowspan="3" |4.6
|350–1150
| rowspan="10" |9&nbsp;MB
| rowspan="2" |95&nbsp;W
| {{dts|2018|October|format=mdy|abbr=off}}
|US $262
|-
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/190884.html 9600KF]
| colspan="2" {{n/a}}
| {{dts|2019|January|format=mdy|abbr=off}}
|US $263
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/134900.html 9600]
|3.1
| rowspan="3" |UHD 630
| rowspan="2" |350–1150
|65&nbsp;W
| rowspan="5" | {{dts|2019|April|format=mdy|abbr=off}}
| rowspan="2" |US $213
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/191051.html 9600T]
|2.3
|3.9
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/134895.html 9500]
| rowspan="2" |3.0
| rowspan="2" |4.2
|350–1100
| rowspan="2" |65&nbsp;W
| rowspan="3" |US $192
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/190890.html 9500F]
| colspan="2" {{n/a}}
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/191052.html 9500T]
|2.2
|3.7
| rowspan="2" |UHD 630
|350–1100
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/134898.html 9400]
| rowspan="2" |2.9
| rowspan="2" |4.1
|350–1050
| rowspan="2" |65&nbsp;W
| rowspan="2" | {{dts|2019|January|format=mdy|abbr=off}}
| rowspan="3" |US $182
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/190883.html 9400F]
| colspan="2" {{n/a}}
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/134893.html 9400T]
|1.8
|3.4
| rowspan="2" |UHD 630
|350–1050
|35&nbsp;W
| rowspan="2" | {{dts|2019|April|format=mdy|abbr=off}}
|-
! rowspan="8" |Core i3
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/186606.html 9350K]
| rowspan="8" |4 (4)
| rowspan="2" |4.0
| rowspan="2" |4.6
|350–1150
| rowspan="5" |8&nbsp;MB
| rowspan="2" |91&nbsp;W
| rowspan="2" |US $173
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/191126.html 9350KF]
| colspan="2" {{n/a}}
| {{dts|2019|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/191793.html 9320]
| rowspan="2" |3.7
|4.4
| rowspan="4" |UHD 630
| rowspan="2" |350–1150
| rowspan="2" |62&nbsp;W
| rowspan="6" | {{dts|2019|April|format=mdy|abbr=off}}
|US $154
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/134886.html 9300]
|4.3
| rowspan="2" |US $143
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/134875.html 9300T]
|3.2
|3.8
| rowspan="2" |350–1100
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/134870.html 9100]
| rowspan="2" |3.6
| rowspan="2" |4.2
| rowspan="3" |6&nbsp;MB
| rowspan="2" |65&nbsp;W
| rowspan="3" |US $122
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/190886.html 9100F]
| colspan="2" {{n/a}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/134871.html 9100T]
|3.1
|3.7
|UHD 630
|350–1100
|35&nbsp;W
|}

==== Skylake-X (9xxx) ====

Common features:
* Socket: [[LGA 2066]].
* All the CPUs support quad-channel [[DDR4]]-2666 RAM.
* All CPU models provide 44 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* X-suffix, and XE-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="3" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo<br />2.0
! class="unsortable" | Turbo<br />3.0
|-
! rowspan=7 | Core i9
! style="text-align:left;" data-sort-value="sku8" | 9990XE<ref>{{cite web |last1=Cutress |first1=Ian |title=The Intel Core i9-9990XE Review: All 14 Cores at 5.0 GHz |url=https://www.anandtech.com/show/14980/the-intel-core-i9-9990xe-review |website=www.anandtech.com |access-date=20 May 2023 |date=28 October 2019 |archive-date=February 8, 2023 |archive-url=https://web.archive.org/web/20230208104454/http://www5.anandtech.com/show/14980/the-intel-core-i9-9990xe-review |url-status=live }}</ref>
| 14 (28)
| 4.0
| 5.0
| 5.0
| 19.25&nbsp;MB
| 255&nbsp;W
| {{dts|2019|January|format=mdy|abbr=off}}
| {{n/a|OEM}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/189126.html 9980XE]
| 18 (36)
| 3.0
| rowspan=5 | 4.4
| rowspan=5 | 4.5
| 24.75&nbsp;MB
| rowspan=7 | 165&nbsp;W
| rowspan=6 | Q4 2018
| US $1979
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/189123.html 9960X]
| 16 (32)
| 3.1
| 22&nbsp;MB
| US $1684
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/189125.html 9940X]
| 14 (28)
| 3.3
| rowspan=3 | 19.25&nbsp;MB
| US $1387
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/189127.html 9920X]
| 12 (24)
| rowspan=2 | 3.5
| US $1189
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/189124.html 9900X]
| rowspan=2 | 10 (20)
| US $989
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/189121.html 9820X]
| 3.3
| 4.1
| 4.2
| rowspan=2 | 16.5&nbsp;MB
| US $889
|-
! Core i7
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/189122.html 9800X]
| 8 (16)
| 3.8
| 4.4
| 4.5
| {{dts|2018|November|format=mdy|abbr=off}}
| US $589
|}

=== Core i (10th gen) ===

==== Comet Lake-S<span class="anchor" id="&quot;Comet Lake-S&quot; (14 nm)"></span><span class="anchor" id="Comet Lake-S"></span><span class="anchor" id="Comet Lake-S (14 nm, 10th generation)"></span> ====
{{For-text|the i3- and i5-10xx5 refresh|section [[#Comet Lake-S (refresh)|§ Comet Lake-S (refresh)]] below}}

Common features:
* Socket: [[LGA 1200]].
* All the CPUs support dual-channel [[DDR4]] RAM at up to 2666&nbsp;[[MT/s]] speed. Models i7 and up support it at up to 2933&nbsp;MT/s speed.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 4-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* K-suffix processors have an unlocked multiplier and can be overclocked.
* i9 and i7 models support Turbo Boost 3.0, while i5 and i3 only support Turbo Boost 2.0. The turbo clock speeds shown are of the highest turbo boost version supported by the processor.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="3" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | {{abbr|TVB|Thermal Velocity Boost}}
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="7" | Core i9
! style="text-align:left;" data-sort-value="sku27" | [https://ark.intel.com/content/www/us/en/ark/products/199332.html 10900K]
| rowspan="7" | 10 (20)
| rowspan="2" | 3.7
| rowspan="2" | 5.2
| rowspan="2" | 5.3
| [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 630]]
| 350–1200
| rowspan="7" | 20&nbsp;MB
| rowspan="3" | 125&nbsp;W
| rowspan="2" | {{dts|2020|April|format=mdy|abbr=off}}
| US $488
|-
! style="text-align:left;" data-sort-value="sku26" | [https://ark.intel.com/content/www/us/en/ark/products/199331.html 10900KF]
| colspan="2" {{n/a}}
|US $472
|-
! style="text-align:left;" data-sort-value="sku25" | [https://ark.intel.com/content/www/us/en/ark/products/204448.html 10910]
|3.6
|5.0
| {{n/a}}
| rowspan="2" |UHD 630
| rowspan="2" |350–1200
|Q3 2020
| {{n/a|OEM}}
|-
! style="text-align:left;" data-sort-value="sku24" | [https://ark.intel.com/content/www/us/en/ark/products/199328.html 10900]
| rowspan="2" |2.8
| rowspan="2" |5.1
| rowspan="2" |5.2
| rowspan="2" |65&nbsp;W
| rowspan="3" | {{dts|2020|April|format=mdy|abbr=off}}
|US $439
|-
! style="text-align:left;" data-sort-value="sku23" | [https://ark.intel.com/content/www/us/en/ark/products/199329.html 10900F]
| colspan="2" {{n/a}}
|US $422
|-
! style="text-align:left;" data-sort-value="sku22" | [https://ark.intel.com/content/www/us/en/ark/products/199324.html 10900T]
|1.9
|4.6
| {{n/a}}
| rowspan="3" |UHD 630
| rowspan="3" |350–1200
|35&nbsp;W
|US $439
|-
! style="text-align:left;" data-sort-value="sku21" | [https://ark.intel.com/content/www/us/en/ark/products/205904.html 10850K]
|3.6
|5.1
|5.2
| rowspan="3" |125&nbsp;W
| {{dts|2020|July|format=mdy|abbr=off}}
|US $453
|-
! rowspan="5" |Core i7
! style="text-align:left;" data-sort-value="sku20" | [https://ark.intel.com/content/www/us/en/ark/products/199335.html 10700K]
| rowspan="5" |8 (16)
| rowspan="2" |3.8
| rowspan="2" |5.1
| rowspan="20" {{n/a}}
| rowspan="5" |16&nbsp;MB
| rowspan="5" | {{dts|2020|May|format=mdy|abbr=off}}
|US $374
|-
! style="text-align:left;" data-sort-value="sku19" | [https://ark.intel.com/content/www/us/en/ark/products/199325.html 10700KF]
| colspan="2" {{n/a}}
|US $349
|-
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/199316.html 10700]
| rowspan="2" |2.9
| rowspan="2" |4.8
|UHD 630
|350–1200
| rowspan="2" |65&nbsp;W
|US $323
|-
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/199318.html 10700F]
| colspan="2" {{n/a}}
|US $298
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/199314.html 10700T]
|2.0
|4.5
| rowspan="2" |UHD 630
| rowspan="2" |350–1200
|35&nbsp;W
|US $325
|-
! rowspan="9" |Core i5
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/199311.html 10600K]
| rowspan="9" |6 (12)
| rowspan="2" |4.1
| rowspan="3" |4.8
| rowspan="9" |12&nbsp;MB
| rowspan="2" |125&nbsp;W
| rowspan="13" | {{dts|2020|April|format=mdy|abbr=off}}
|US $262
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/199315.html 10600KF]
| colspan="2" {{n/a}}
|US $237
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/199273.html 10600]
|3.3
| rowspan="5" |UHD 630
| rowspan="2" |350–1200
|65&nbsp;W
| rowspan="2" |US $213
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/199279.html 10600T]
|2.4
|4.0
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/199277.html 10500]
|3.1
|4.5
| rowspan="2" |350–1150
|65&nbsp;W
| rowspan="2" |US $192
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/199275.html 10500T]
|2.3
|3.8
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/199271.html 10400]
| rowspan="2" |2.9
| rowspan="2" |4.3
|350–1100
| rowspan="2" |65&nbsp;W
|US $182
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/199278.html 10400F]
| colspan="2" {{n/a}}
|US $157
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/199276.html 10400T]
|2.0
|3.6
| rowspan="5" |UHD 630
|350–1100
|35&nbsp;W
|US $182
|-
! rowspan="6" |Core i3
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/199280.html 10320]
| rowspan="6" |4 (8)
|3.8
|4.6
| rowspan="2" |350–1150
| rowspan="3" |8&nbsp;MB
| rowspan="2" |65&nbsp;W
|US $154
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/199281.html 10300]
|3.7
|4.4
| rowspan="2" |US $143
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/199282.html 10300T]
|3.0
|3.9
| rowspan="2" |350–1100
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/199283.html 10100]
| rowspan="2" |3.6
| rowspan="2" |4.3
| rowspan="3" |6&nbsp;MB
| rowspan="2" |65&nbsp;W
|US $122
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/203473.html 10100F]
| colspan="2" {{n/a}}
| {{dts|2020|October|format=mdy|abbr=off}}
|US $97
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/199284.html 10100T]
|3.0
|3.8
|UHD 630
|350–1100
|35&nbsp;W
| {{dts|2020|April|format=mdy|abbr=off}}
|US $122
|}

==== Comet Lake-S (refresh) ====

Released on the same day as the 11th gen Rocket Lake-S desktop processors.

Common features:
* Socket: [[LGA 1200]].
* All the CPUs support dual-channel [[DDR4]]-2666 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 4-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* All models support Turbo Boost 2.0.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! Core i5
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/201891.html 10505]
| 6 (12)
| 3.2
| 4.6
| rowspan="5" | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 630]]
| 350–1200
| 12&nbsp;MB
| rowspan="3" | 65&nbsp;W
| rowspan="7" | {{dts|2021|March|format=mdy|abbr=off}}
| US $192
|-
! rowspan="6" |Core i3
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/201889.html 10325]
| rowspan="6" |4 (8)
|3.9
|4.7
| rowspan="2" |350–1150
| rowspan="3" |8&nbsp;MB
|US $154
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/199281.html 10305]
|3.8
|4.5
| rowspan="2" |US $143
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/201898.html 10305T]
|3.0
|4.0
| rowspan="2" |350–1100
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/201894.html 10105]
| rowspan="2" |3.7
| rowspan="2" |4.4
| rowspan="3" |6&nbsp;MB
| rowspan="2" |65&nbsp;W
|US $122
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/203474.html 10105F]
| colspan="2" {{n/a}}
|US $97
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/201890.html 10105T]
|3.0
|3.9
|UHD 630
|350–1100
|35&nbsp;W
|US $122
|}

==== Cascade Lake-X (10xxx)<span class="anchor" id="Cascade Lake-X (14 nm, enthusiast)"></span> ====

Common features:
* Socket: [[LGA 2066]].
* All the CPUs support quad-channel [[DDR4]]-2933 RAM.
* All CPU models provide 48 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* X-suffix, and XE-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="3" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo<br />2.0
! class="unsortable" | Turbo<br />3.0
|-
! rowspan=4 | Core i9
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/198017.html 10980XE]
| 18 (36)
| 3.0
| rowspan=3 | 4.6
| rowspan=3 | 4.8
| 24.75&nbsp;MB
| rowspan=4 | 165&nbsp;W
| rowspan=4 | {{dts|2019|October|format=mdy|abbr=off}}
| US $979
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/198014.html 10940X]
| 14 (28)
| 3.3
| rowspan=3 | 19.25&nbsp;MB
| US $784
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/198012.html 10920X]
| 12 (24)
| 3.5
| US $689
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/198019.html 10900X]
| 10 (20)
| 3.7
| 4.5
| 4.7
| US $590
|}

=== Core i (11th gen) ===

==== Rocket Lake-S<span class="anchor" id="&quot;Rocket Lake-S&quot; (14 nm)"></span><span class="anchor" id="Rocket Lake-S (14 nm, 11th generation)"></span> ====

Common features:
* Socket: [[LGA 1200]].
* All the CPUs support dual-channel [[DDR4]]-3200 RAM. The Core i9 K/KF processors enable a 1:1 ratio of DRAM to memory controller by default at DDR4-3200, whereas the Core i9 non K/KF and all other CPUs listed below enable a 2:1 ratio of DRAM to memory controller by default at DDR4-3200 and a 1:1 ratio by default at DDR4-2933.<ref>{{Cite web |last=Cutress |first=Ian |date=March 16, 2021 |title=Intel Launches Rocket Lake 11th Gen Core i9, Core i7, and Core i5 |url=https://www.anandtech.com/show/16523/intel-core-11th-gen-rocket-lake-core-i9-core-i7-core-i5 |website=AnandTech |language=en-US |access-date=March 17, 2021 |archive-date=December 19, 2021 |archive-url=https://web.archive.org/web/20211219163601/https://www.anandtech.com/show/16523/intel-core-11th-gen-rocket-lake-core-i9-core-i7-core-i5 |url-status=live }}</ref><!-- copied from [[Rocket Lake]], see that page's history for attribution. -->
* All CPU models provide 20 lanes of [[PCIe 4.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 512&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* K-suffix processors have an unlocked multiplier and can be overclocked.
* i9 and i7 models support Turbo Boost 3.0, while i5 only support Turbo Boost 2.0. The turbo clock speeds shown are of the highest turbo boost version supported by the processor.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="3" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
! class="unsortable" rowspan="2" | [[MSRP]]
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | {{abbr|TVB|Thermal Velocity Boost}}
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="5" | Core i9
! style="text-align:left;" data-sort-value="sku19" | [https://ark.intel.com/content/www/us/en/ark/products/212325.html 11900K]
| rowspan="10" | 8 (16)
| rowspan="2" | 3.5
| rowspan="2" | 5.2
| rowspan="2" | 5.3
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD 750]]
| 350–1300
| rowspan="10" | 16&nbsp;MB
| rowspan="2" | 125&nbsp;W
| rowspan="19" | {{dts|2021|March|format=mdy|abbr=off}}
| US $539
|-
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/212321.html 11900KF]
| colspan="2" {{n/a}}
|US $513
|-
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/212252.html 11900]
| rowspan="2" |2.5
| rowspan="2" |5.1
| rowspan="2" |5.2
|UHD 750
|350–1300
| rowspan="2" |65&nbsp;W
|US $439
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/212254.html 11900F]
| colspan="2" {{n/a}}
|US $422
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/212256.html 11900T]
|1.5
|4.9
| rowspan="15" {{n/a}}
| rowspan="2" |UHD 750
| rowspan="2" |350–1300
|35&nbsp;W
|US $439
|-
! rowspan="5" |Core i7
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/212047.html 11700K]
| rowspan="2" |3.6
| rowspan="2" |5.0
| rowspan="2" |125&nbsp;W
|US $399
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/212048.html 11700KF]
| colspan="2" {{n/a}}
|US $374
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/212279.html 11700]
| rowspan="2" |2.5
| rowspan="2" |4.9
|UHD 750
|350–1300
| rowspan="2" |65&nbsp;W
|US $323
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/212280.html 11700F]
| colspan="2" {{n/a}}
|US $298
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/212251.html 11700T]
|1.4
|4.6
| rowspan="2" |UHD 750
| rowspan="2" |350–1300
|35&nbsp;W
|US $323
|-
! rowspan="9" |Core i5
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/212275.html 11600K]
| rowspan="9" |6 (12)
| rowspan="2" |3.9
| rowspan="2" |4.9
| rowspan="9" |12&nbsp;MB
| rowspan="2" |125&nbsp;W
|US $262
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/212276.html 11600KF]
| colspan="2" {{n/a}}
|US $237
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/212274.html 11600]
|2.8
|4.8
| rowspan="4" |UHD 750
| rowspan="3" |350–1300
|65&nbsp;W
| rowspan="2" |US $213
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/212278.html 11600T]
|1.7
|4.1
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/212277.html 11500]
|2.7
|4.6
|65&nbsp;W
| rowspan="2" |US $192
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/212272.html 11500T]
|1.5
|3.9
|350–1200
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/212270.html 11400]
| rowspan="2" |2.6
| rowspan="2" |4.4
|[[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD 730]]
|350–1300
| rowspan="2" |65&nbsp;W
|US $182
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/212271.html 11400F]
| colspan="2" {{n/a}}
|US $157
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/212273.html 11400T]
|1.3
|3.7
|UHD 730
|350–1200
|35&nbsp;W
|US $182
|}

==== Tiger Lake-B<span class="anchor" id="&quot;Tiger Lake-B&quot; (10 nm SuperFin)"></span> ====

Common features:
* Socket: BGA 1787 (soldered).
* All the CPUs support dual-channel [[DDR4]]-3200 RAM.
* All CPU models provide 20 lanes of [[PCIe 4.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 1.25&nbsp;MB per core.
* Fabrication process: [[10 nm process|10&nbsp;nm]].
* K-suffix processors have an unlocked multiplier and can be overclocked.
* [https://ark.intel.com/content/www/us/en/ark/compare.html?productIds=215570,128915,128916,215569 These CPUs] were sold to OEMs only.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! Core i9
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/215570.html 11900KB]
| rowspan=2 | 8 (16)
| 3.3
| 4.9
| rowspan=3 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(32 EU)
| rowspan=3 | 350–1450
| rowspan=2 | 24&nbsp;MB
| rowspan=2 | 55–65&nbsp;W
| rowspan=4 | {{dts|2021|May|format=mdy|abbr=off}}
|-
! Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/128915.html 11700B]
| 3.2
| 4.8
|-
! Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/128916.html 11500B]
| 6 (12)
| 3.3
| 4.6
| rowspan=2 | 12&nbsp;MB
| rowspan=2 | 65&nbsp;W
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/215569.html 11100B]
| 4 (8)
| 3.6
| 4.4
| UHD Graphics<br />(16 EU)
| 350–1400
|}

=== Core i (12th gen) ===

==== Alder Lake-S<span class="anchor" id="&quot;Alder Lake&quot; (Intel 7)"></span><span class="anchor" id="&quot;Alder Lake-S&quot; (Intel 7)"></span><span class="anchor" id="Alder Lake (Intel 7, 12th generation)"></span> ====

Common features:
* Socket: [[LGA 1700]].
* All the CPUs support dual-channel [[DDR4]]-3200 or [[DDR5]]-4800 RAM.
* All the CPUs provide 16 lanes of [[PCIe 5.0]] and 4 lanes of [[PCIe 4.0]], but support may vary depending on motherboard and chipsets.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 1.25&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores)
* Fabrication process: [[7 nm process|Intel&nbsp;7]].
* K-suffix processors have an unlocked multiplier and can be overclocked.
* i9 and i7 models support Turbo Boost 3.0 on the [[Heterogeneous_computing#Heterogeneous_CPU_topology|P-cores]], while i5 only support Turbo Boost 2.0. The turbo clock speeds shown are of the highest turbo boost version supported by the processor.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="4" | P-core (performance)
! colspan="3" | [[Heterogeneous_computing#Heterogeneous_CPU_topology|E-core]] (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
! class="unsortable" rowspan="3" | [[MSRP]]
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="3" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | {{abbr|TVB|Thermal Velocity Boost}}
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="6" | Core i9
! style="text-align:left;" data-sort-value="sku26" | [https://ark.intel.com/content/www/us/en/ark/products/225916.html 12900KS]
| rowspan="11" | 8 (16)
| 3.4
| 5.3
| 5.5
| rowspan="6" | 8 (8)
| 2.5
| 4.0
| rowspan="2" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD 770]]
| rowspan="2" | 300–1550
| rowspan="6" | 30&nbsp;MB
| 150&nbsp;W
| rowspan="3" | 241&nbsp;W
| {{dts|2022|April|format=mdy|abbr=off}}
| US $739
|-
! style="text-align:left;" data-sort-value="sku25" | [https://ark.intel.com/content/www/us/en/ark/products/134599.html 12900K]
| rowspan="2" |3.2
| rowspan="2" |5.2
| rowspan="25" {{n/a}}
| rowspan="2" |2.4
| rowspan="2" |3.9
| rowspan="2" |125&nbsp;W
| rowspan="2" | {{dts|2021|November|format=mdy|abbr=off}}
|US $589
|-
! style="text-align:left;" data-sort-value="sku24" | [https://ark.intel.com/content/www/us/en/ark/products/134600.html 12900KF]
| colspan="2" {{n/a}}
|US $564
|-
! style="text-align:left;" data-sort-value="sku23" | [https://ark.intel.com/content/www/us/en/ark/products/134597.html 12900]
| rowspan="2" |2.4
| rowspan="2" |5.1
| rowspan="2" |1.8
| rowspan="2" |3.8
|UHD 770
|300–1550
| rowspan="2" |65&nbsp;W
| rowspan="2" |202&nbsp;W
| rowspan="3" | {{dts|2022|January|format=mdy|abbr=off}}
|US $489
|-
! style="text-align:left;" data-sort-value="sku22" | [https://ark.intel.com/content/www/us/en/ark/products/134598.html 12900F]
| colspan="2" {{n/a}}
|US $464
|-
! style="text-align:left;" data-sort-value="sku21" | [https://ark.intel.com/content/www/us/en/ark/products/134601.html 12900T]
|1.4
|4.9
|1.0
|3.6
| rowspan="2" |UHD 770
|300–1550
|35&nbsp;W
|106&nbsp;W
|US $489
|-
! rowspan="5" |Core i7
! style="text-align:left;" data-sort-value="sku20" | [https://ark.intel.com/content/www/us/en/ark/products/134594.html 12700K]
| rowspan="2" |3.6
| rowspan="2" |5.0
| rowspan="7" |4 (4)
| rowspan="2" |2.7
| rowspan="2" |3.8
|300–1500
| rowspan="5" |25&nbsp;MB
| rowspan="2" |125&nbsp;W
| rowspan="2" |190&nbsp;W
| rowspan="2" | {{dts|2021|November|format=mdy|abbr=off}}
|US $409
|-
! style="text-align:left;" data-sort-value="sku19" | [https://ark.intel.com/content/www/us/en/ark/products/134595.html 12700KF]
| colspan="2" {{n/a}}
|US $384
|-
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/134591.html 12700]
| rowspan="2" |2.1
| rowspan="2" |4.9
| rowspan="2" |1.6
| rowspan="2" |3.6
|UHD 770
|300–1500
| rowspan="2" |65&nbsp;W
| rowspan="2" |180&nbsp;W
| rowspan="3" | {{dts|2022|January|format=mdy|abbr=off}}
|US $339
|-
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/134592.html 12700F]
| colspan="2" {{n/a}}
|US $314
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/134596.html 12700T]
|1.4
|4.7
|1.0
|3.4
| rowspan="2" |UHD 770
|300–1500
|35&nbsp;W
|106&nbsp;W
|US $339
|-
! rowspan="10" |Core i5
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/134589.html 12600K]
| rowspan="10" |6 (12)
| rowspan="2" |3.7
| rowspan="2" |4.9
| rowspan="2" |2.8
| rowspan="2" |3.6
|300–1450
| rowspan="2" |20&nbsp;MB
| rowspan="2" |125&nbsp;W
| rowspan="2" |150&nbsp;W
| rowspan="2" | {{dts|2021|November|format=mdy|abbr=off}}
|US $289
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/134590.html 12600KF]
| colspan="2" {{n/a}}
|US $264
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/96149.html 12600]
|3.3
|4.8
| colspan="3" rowspan="13" {{n/a}}
| rowspan="4" |UHD 770
| rowspan="4" |300–1450
| rowspan="4" |18&nbsp;MB
|65&nbsp;W
|117&nbsp;W
| rowspan="4" | {{dts|2022|January|format=mdy|abbr=off}}
| rowspan="2" |US $223
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/96150.html 12600T]
|2.1
| rowspan="2" |4.6
|35&nbsp;W
|74&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/96144.html 12500]
|3.0
|65&nbsp;W
|117&nbsp;W
| rowspan="2" |US $202
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/96140.html 12500T]
|2.0
|4.4
|35&nbsp;W
|74&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku9" | 12490F<ref>{{cite web |title=Intel Core i5-12490F is China exclusive 6-core Alder Lake desktop CPU with 20MB L3 cache |url=https://videocardz.com/newz/intel-core-i5-12490f-is-china-exclusive-6-core-alder-lake-desktop-cpu-with-20mb-l3-cache |website=VideoCardz.com |access-date=23 July 2023 |date=5 January 2022 |archive-date=February 28, 2022 |archive-url=https://web.archive.org/web/20220228060444/https://videocardz.com/newz/intel-core-i5-12490f-is-china-exclusive-6-core-alder-lake-desktop-cpu-with-20mb-l3-cache |url-status=live }}</ref>
|3.0
|4.6
| colspan="2" {{n/a}}
|20&nbsp;MB
| rowspan="3" |65&nbsp;W
| rowspan="3" |117&nbsp;W
| {{dts|2022|February|format=mdy|abbr=off}}
| CN ¥1599
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/134586.html 12400]
| rowspan="2" |2.5
| rowspan="2" |4.4
|UHD 730
|300–1450
| rowspan="3" |18&nbsp;MB
| rowspan="8" | {{dts|2022|January|format=mdy|abbr=off}}
|US $202
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/134587.html 12400F]
| colspan="2" {{n/a}}
|US $192
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/223094.html 12400T]
|1.8
|4.2
| rowspan="4" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD 730]]
| rowspan="3" |350–1450
|35&nbsp;W
|74&nbsp;W
|US $202
|-
! rowspan="5" |Core i3
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/223095.html 12300]
| rowspan="5" |4 (8)
|3.5
|4.4
| rowspan="5" |12&nbsp;MB
|60&nbsp;W
|89&nbsp;W
| rowspan="2" |US $143
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/223096.html 12300T]
|2.3
|4.2
|35&nbsp;W
|69&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/134584.html 12100]
| rowspan="2" |3.3
| rowspan="2" |4.3
|300–1400
|60&nbsp;W
| rowspan="2" |89&nbsp;W
|US $122
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/132223.html 12100F]
| colspan="2" {{n/a}}
|58&nbsp;W
|US $97
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/223097.html 12100T]
|2.2
|4.1
|UHD 730
|300–1400
|35&nbsp;W
|69&nbsp;W
|US $122
|}

=== Core i (13th gen) ===

==== Raptor Lake-S<span class="anchor" id="&quot;Raptor Lake&quot; (Intel 7)"></span><span class="anchor" id="&quot;Raptor Lake-S&quot; (Intel 7)"></span><span class="anchor" id="Raptor Lake (Intel 7, 13th/14th generation)"></span> ====
{{For-text|the 14th generation refresh|section [[#Raptor Lake-S Refresh|§ Raptor Lake-S Refresh]] below}}

Common features:
* Socket: [[LGA 1700]].
* All the CPUs support dual-channel [[DDR4]]-3200 or [[DDR5]]-5600 RAM.
* All the CPUs provide 16 lanes of [[PCIe 5.0]] and 4 lanes of [[PCIe 4.0]], but support may vary depending on motherboard and chipsets.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core on i5-13600K/KF and above models, 1.25&nbsp;MB per core on 13600 and below models.
** E-cores: 4&nbsp;MB per E-core cluster on i5-13600K/KF and above models, 2&nbsp;MB per cluster on 13600 and below models (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].
* K-suffix processors have an unlocked multiplier and can be overclocked.
* i9 and i7 models support Turbo Boost 3.0 on the P-cores, while i5 only support Turbo Boost 2.0. The turbo clock speeds shown are of the highest turbo boost version supported by the processor.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="4" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
! class="unsortable" rowspan="3" | [[MSRP]]
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="3" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | {{abbr|TVB|Thermal Velocity Boost}}
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="6" | Core i9
! style="text-align:left;" data-sort-value="sku25" | [https://ark.intel.com/content/www/us/en/ark/products/232167.html 13900KS]
| rowspan="12" | 8 (16)
| 3.2
| 5.8
| 6.0
| rowspan="6" | 16 (16)
| 2.4
| rowspan="3" | 4.3
| rowspan="2" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD 770]]
| rowspan="2" | 300–1650
| rowspan="6" | 36&nbsp;MB
| 150&nbsp;W
| rowspan="3" | 253&nbsp;W
| {{dts|2023|January|format=mdy|abbr=off}}
| US $689
|-
! style="text-align:left;" data-sort-value="sku24" | [https://ark.intel.com/content/www/us/en/ark/products/230496.html 13900K]
| rowspan="2" |3.0
| rowspan="2" |5.7
| rowspan="2" |5.8
| rowspan="2" |2.2
| rowspan="2" |125&nbsp;W
| rowspan="2" | {{dts|2022|October|format=mdy|abbr=off}}
|US $589
|-
! style="text-align:left;" data-sort-value="sku23" | [https://ark.intel.com/content/www/us/en/ark/products/230497.html 13900KF]
| colspan="2" {{n/a}}
|US $564
|-
! style="text-align:left;" data-sort-value="sku22" | [https://www.intel.com/content/www/us/en/products/sku/230499.html 13900]
| rowspan="2" |2.0
| rowspan="2" |5.5
| rowspan="2" |5.6
| rowspan="2" |1.5
| rowspan="2" |4.2
|UHD 770
|300–1650
| rowspan="2" |65&nbsp;W
| rowspan="2" |219&nbsp;W
| rowspan="3" | {{dts|2023|January|format=mdy|abbr=off}}
|US $549
|-
! style="text-align:left;" data-sort-value="sku21" | [https://www.intel.com/content/www/us/en/products/sku/230502.html 13900F]
| colspan="2" {{n/a}}
|US $524
|-
! style="text-align:left;" data-sort-value="sku20" | [https://www.intel.com/content/www/us/en/products/sku/230498.html 13900T]
|1.1
|5.3
| rowspan="20" {{n/a}}
|0.8
|3.9
| UHD 770
|300–1650
|35&nbsp;W
|106&nbsp;W
|US $549
|-
! rowspan="6" |Core i7
! style="text-align:left;" data-sort-value="sku19" | [https://ark.intel.com/content/www/us/en/ark/products/232174.html 13790F]
| 2.1
| 5.2
| rowspan="12" |8 (8)
| 1.5
| 4.1
| colspan="2" {{n/a}}
| 33&nbsp;MB
| 65&nbsp;W
| 219&nbsp;W
| {{dts|2023|February|format=mdy|abbr=off}}
| CN ¥2999
|-
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/230500.html 13700K]
| rowspan="2" |3.4
| rowspan="2" |5.4
| rowspan="2" |2.5
| rowspan="2" |4.2
| UHD 770
|300–1600
| rowspan="5" |30&nbsp;MB
| rowspan="2" |125&nbsp;W
| rowspan="2" |253&nbsp;W
| rowspan="2" | {{dts|2022|October|format=mdy|abbr=off}}
|US $409
|-
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/230489.html 13700KF]
| colspan="2" {{n/a}}
| rowspan="2" |US $384
|-
! style="text-align:left;" data-sort-value="sku16" | [https://www.intel.com/content/www/us/en/products/sku/230490.html 13700]
| rowspan="2" |2.1
| rowspan="2" |5.2
| rowspan="2" |1.5
| rowspan="2" |4.1
|UHD 770
|300–1600
| rowspan="2" |65&nbsp;W
| rowspan="2" |219&nbsp;W
| rowspan="3" | {{dts|2023|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku15" | [https://www.intel.com/content/www/us/en/products/sku/230491.html 13700F]
| colspan="2" {{n/a}}
|US $359
|-
! style="text-align:left;" data-sort-value="sku14" | [https://www.intel.com/content/www/us/en/products/sku/230492.html 13700T]
|1.4
|4.9
|1.0
|3.6
| rowspan="2" |UHD 770
|300–1600
|35&nbsp;W
|106&nbsp;W
|US $384
|-
! rowspan="10" |Core i5
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/230493.html 13600K]
| rowspan="10" |6 (12)
| rowspan="2" |3.5
| rowspan="2" |5.1
| rowspan="2" |2.6
| rowspan="2" |3.9
|300–1500
| rowspan="7" |24&nbsp;MB
| rowspan="2" |125&nbsp;W
| rowspan="2" |181&nbsp;W
| rowspan="2" | {{dts|2022|October|format=mdy|abbr=off}}
|US $319
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/230494.html 13600KF]
| colspan="2" {{n/a}}
|US $294
|-
! style="text-align:left;" data-sort-value="sku11" | [https://www.intel.com/content/www/us/en/products/sku/230574.html 13600]
|2.7
|5.0
|2.0
|3.7
| rowspan="4" |UHD 770
| rowspan="4" |300–1550
|65&nbsp;W
|154&nbsp;W
| rowspan="4" | {{dts|2023|January|format=mdy|abbr=off}}
| rowspan="2" |US $255
|-
! style="text-align:left;" data-sort-value="sku10" | [https://www.intel.com/content/www/us/en/products/sku/230573.html 13600T]
|1.8
| rowspan="2" |4.8
|1.3
|3.4
|35&nbsp;W
|92&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku9" | [https://www.intel.com/content/www/us/en/products/sku/230580.html 13500]
|2.5
|1.8
|3.5
|65&nbsp;W
|154&nbsp;W
| rowspan=2 | US $232
|-
! style="text-align:left;" data-sort-value="sku8" | [https://www.intel.com/content/www/us/en/products/sku/230578.html 13500T]
|1.6
|4.6
|1.2
|3.2
|35&nbsp;W
|92&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku7" | [https://www.intel.com/content/www/us/en/products/sku/232140.html 13490F]
| rowspan="3" |2.5
|4.8
| rowspan="4" |4 (4)
| rowspan="3" |1.8
|3.5
| colspan="2" {{n/a}}
|65&nbsp;W
|148&nbsp;W
| {{dts|2023|February|format=mdy|abbr=off}}
| CN ¥1599
|-
! style="text-align:left;" data-sort-value="sku6" | [https://www.intel.com/content/www/us/en/products/sku/230495.html 13400]
| rowspan="2" |4.6
| rowspan="2" |3.3
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD 730]]
|300–1550
| rowspan="3" |20&nbsp;MB
| rowspan="2" |65&nbsp;W
|154&nbsp;W
| rowspan="6" | {{dts|2023|January|format=mdy|abbr=off}}
|US $221
|-
! style="text-align:left;" data-sort-value="sku5" | [https://www.intel.com/content/www/us/en/products/sku/230501.html 13400F]
| colspan="2" {{n/a}}
|148&nbsp;W
|US $196
|-
! style="text-align:left;" data-sort-value="sku4" | [https://www.intel.com/content/www/us/en/products/sku/230577.html 13400T]
|1.3
|4.4
|1.0
|3.0
| rowspan="2" |UHD 730
|300–1550
|35&nbsp;W
|82&nbsp;W
|US $221
|-
! rowspan="3" |Core i3
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/230575.html 13100]
| rowspan="3" |4 (8)
| rowspan="2" |3.4
| rowspan="2" |4.5
| colspan="3" rowspan="3" {{n/a}}
|300–1500
| rowspan="3" |12&nbsp;MB
| rowspan="2" |60&nbsp;W
| rowspan="2" |89&nbsp;W
|US $134
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/230576.html 13100F]
| colspan="2" {{n/a}}
|US $109
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/230579.html 13100T]
|2.5
|4.2
|UHD 730
|300–1500
|35&nbsp;W
|69&nbsp;W
|US $134
|}

=== Core i (14th gen) ===

==== Raptor Lake-S Refresh ====

Common features:
* Socket: [[LGA 1700]].
* All the CPUs support dual-channel [[DDR4]]-3200 or [[DDR5]]-5600 RAM.
* All the CPUs provide 16 lanes of [[PCIe 5.0]] and 4 lanes of [[PCIe 4.0]], but support may vary depending on motherboard and chipsets.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core on i5-14600/T/K/KF and above models, 1.25&nbsp;MB per core on 14500 and below models.
** E-cores: 4&nbsp;MB per E-core cluster on i5-14600/T/K/KF and above models, 2&nbsp;MB per cluster on 14500 and below models (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].
* K-suffix processors have an unlocked multiplier and can be overclocked.
* i9 and i7 models support Turbo Boost 3.0 on the P-cores, while i5 only support Turbo Boost 2.0. The turbo clock speeds shown are of the highest turbo boost version supported by the processor.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="4" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
! class="unsortable" rowspan="3" | [[MSRP]]
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="3" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | {{abbr|TVB|Thermal Velocity Boost}}
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="6" |Core i9
! style="text-align:left;" data-sort-value="sku25" | [https://ark.intel.com/content/www/us/en/ark/products/237504.html 14900KS]
| rowspan="12" |8 (16)
| rowspan="3" |3.2
|5.9
|6.2
| rowspan="6" |16 (16)
| rowspan="3" |2.4
|4.5
| rowspan="2" |[[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD 770]]
| rowspan="2" |300–1650
| rowspan="7" |36&nbsp;MB
|150&nbsp;W
| rowspan="3" |253&nbsp;W
| {{dts|2024|March|format=mdy|abbr=off}}
|US $689
|-
! style="text-align:left;" data-sort-value="sku24" | [https://ark.intel.com/content/www/us/en/ark/products/236773.html 14900K]
| rowspan="2" | 5.8
| rowspan="2" | 6.0
| rowspan="2" | 4.4
| rowspan="2" | 125&nbsp;W
| rowspan="2" | {{dts|2023|October|format=mdy|abbr=off}}
| US $589
|-
! style="text-align:left;" data-sort-value="sku23" | [https://ark.intel.com/content/www/us/en/ark/products/236787.html 14900KF]
| colspan=2 {{n/a}}
| US $564
|-
! style="text-align:left;" data-sort-value="sku22" | [https://ark.intel.com/content/www/us/en/ark/products/236793.html 14900]
| rowspan="2" |2.0
| rowspan="2" |5.6
| rowspan="2" |5.8
| rowspan="2" |1.5
| rowspan="2" |4.3
|UHD 770
|300–1650
| rowspan="2" |65&nbsp;W
| rowspan="2" |219&nbsp;W
| rowspan="4" | {{dts|2024|January|format=mdy|abbr=off}}
|US $549
|-
! style="text-align:left;" data-sort-value="sku21" | [https://ark.intel.com/content/www/us/en/ark/products/236853.html 14900F]
| colspan="2" {{n/a}}
|US $524
|-
! style="text-align:left;" data-sort-value="sku20" | [https://ark.intel.com/content/www/us/en/ark/products/236791.html 14900T]
|1.1
|5.5
| rowspan="20" {{n/a}}
|0.9
|3.7
|UHD 770
|300–1650
|35&nbsp;W
|106&nbsp;W
|US $549
|-
! rowspan="6" |Core i7
! style="text-align:left;" data-sort-value="sku19" | [https://ark.intel.com/content/www/us/en/ark/products/236779.html 14790F]
|2.1
|5.4
|8 (8)
|1.5
|4.2
| colspan="2" {{n/a}}
|65&nbsp;W
|219&nbsp;W
|China only
|-
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/236783.html 14700K]
| rowspan="2" | 3.4
| rowspan="2" | 5.6
| rowspan="5" | 12 (12)
| rowspan="2" | 2.5
| rowspan="2" | 4.3
| UHD 770
| 300–1600
| rowspan="5" | 33&nbsp;MB
| rowspan="2" |125&nbsp;W
| rowspan="2" |253&nbsp;W
| rowspan="2" | {{dts|2023|October|format=mdy|abbr=off}}
| US $409
|-
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/236789.html 14700KF]
| colspan=2 {{n/a}}
| rowspan="2" | US $384
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/236781.html 14700]
| rowspan="2" |2.1
| rowspan="2" |5.4
| rowspan="2" |1.5
| rowspan="2" |4.2
|UHD 770
|300–1600
| rowspan="2" |65&nbsp;W
| rowspan="2" |219&nbsp;W
| rowspan="3" | {{dts|2024|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/236854.html 14700F]
| colspan="2" {{n/a}}
|US $359
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/236794.html 14700T]
|1.3
|5.2
|0.9
|3.7
| rowspan="2" |UHD 770
|300–1600
|35&nbsp;W
|106&nbsp;W
|US $384
|-
! rowspan="10" | Core i5
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/236799.html 14600K]
| rowspan="10" | 6 (12)
| rowspan="2" | 3.5
| rowspan="2" | 5.3
| rowspan="6" | 8 (8)
| rowspan="2" | 2.6
| rowspan="2" | 4.0
| 300–1550
| rowspan="7" | 24&nbsp;MB
| rowspan="2" |125&nbsp;W
| rowspan="2" | 181&nbsp;W
| rowspan="2" | {{dts|2023|October|format=mdy|abbr=off}}
| US $319
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/236778.html 14600KF]
| colspan=2 {{n/a}}
| US $294
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/236845.html 14600]
|2.7
|5.2
|2.0
|3.9
| rowspan="4" |UHD 770
| rowspan="4" |300–1550
|65&nbsp;W
|154&nbsp;W
| rowspan="11" | {{dts|2024|January|format=mdy|abbr=off}}
| rowspan="2" |US $255
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/236782.html 14600T]
|1.8
|5.1
|1.3
|3.6
|35&nbsp;W
|92&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/236784.html 14500]
|2.6
|5.0
|1.9
|3.7
|65&nbsp;W
|154&nbsp;W
| rowspan=2 | US $232
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/236780.html 14500T]
|1.7
|4.8
|1.2
|3.4
|35&nbsp;W
|92&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/236792.html 14490F]
|2.8
|4.9
| rowspan="4" |4 (4)
|2.1
|3.7
| colspan="2" {{n/a}}
| rowspan="3" |65&nbsp;W
| rowspan="3" |148&nbsp;W
|China only
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/236788.html 14400]
| rowspan="2" |2.5
| rowspan="2" |4.7
| rowspan="2" |1.8
| rowspan="2" |3.5
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD 730]]
|300–1550
| rowspan="3" |20&nbsp;MB
|US $221
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/236777.html 14400F]
| colspan="2" {{n/a}}
|US $196
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/236790.html 14400T]
|1.5
|4.5
|1.1
|3.2
| rowspan="2" |UHD 730
|300–1550
|35&nbsp;W
|82&nbsp;W
|US $221
|-
! rowspan="3" |Core i3
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/236774.html 14100]
| rowspan="3" |4 (8)
| rowspan="2" |3.5
| rowspan="2" |4.7
| colspan="3" rowspan="3" {{n/a}}
|300–1500
| rowspan="3" |12&nbsp;MB
| rowspan="2" |60&nbsp;W
| rowspan="2" |110&nbsp;W
|US $134
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/236786.html 14100F]
| colspan="2" {{n/a}}
|US $109
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/236775.html 14100T]
|2.7
|4.4
|UHD 730
|300–500
|35&nbsp;W
|69&nbsp;W
|US $134
|}

=== Core Ultra (Series 2) ===

==== Arrow Lake-S ====

Common features:
* Socket: [[LGA 1851]].
* All the CPUs support up to dual-channel [[DDR5]]-5600 (UDIMM) or DDR5-6400 ([[CUDIMM]]) RAM.<ref name="tomshardware-cudimm-memory-needed-for-faster-base-spec">{{Cite news |last1=Morales |first1=Jowi |title=Intel's Arrow Lake official memory speeds are unchanged with standard memory sticks — pricier CUDIMM memory needed for faster base spec |url=https://www.tomshardware.com/pc-components/ram/intels-arrow-lake-official-memory-speeds-are-unchanged-with-standard-memory-sticks-pricier-cudimm-memory-needed-for-faster-base-spec |date=15 October 2024 |work=Tom's Hardware |access-date=21 October 2024}}</ref>
* All the CPUs provide 20 lanes of [[PCIe 5.0]] and 4 lanes of [[PCIe 4.0]], but support may vary depending on motherboard and chipsets.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 112&nbsp;KB (48&nbsp;KB (12-Way) data + 64&nbsp;KB (16-Way) instructions) per core.
** E-cores: 96&nbsp;KB (32&nbsp;KB (8-Way) data + 64&nbsp;KB (16-Way) instructions) per core.
* L2 cache:
** P-cores: 3&nbsp;MB (12-Way) per core.
** E-cores: 4&nbsp;MB (16-Way) per E-core cluster (each "cluster" contains four cores).
* Fabrication process: Compute Tile (Contains the CPU cores) [[TSMC]]'s [[3 nm process|N3B]] node.
* K-suffix processors have an unlocked multiplier and can be overclocked.
* Core Ultra 9 and Core Ultra 7 models support Turbo Boost 3.0 on the P-cores, while Core Ultra 5 models only support Turbo Boost 2.0. The turbo clock speeds shown are of the highest turbo boost version supported by the processor.

{| class="wikitable sortable nowrap" style="text-align: center"
|-
! class="unsortable" rowspan="3" |Processor<br />branding
! rowspan="3" |Model
! colspan="4" |P-core (performance)
! colspan="3" |E-core (efficiency)
! colspan="2" |Integrated [[GPU]]
! class="unsortable" rowspan="3" |[[Smart Cache|Smart<br />Cache]]
! class="unsortable" rowspan="3" |[[AI_accelerator|NPU]]<br />(TOPS)
! colspan="2" |[[Thermal design power|TDP]]
! rowspan="3" |Release<br />date
! class="unsortable" rowspan="3" |[[MSRP]]
|-
! class="unsortable" rowspan="2" |[[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="3" |[[Clock rate]] (GHz)
! class="unsortable" rowspan="2" |Cores<br />(Threads)
! colspan="2" |Clock rate (GHz)
! class="unsortable" rowspan="2" |Model
! class="unsortable" rowspan="2" |Clock (MHz)
! rowspan="2" |Base
! class="unsortable" rowspan="2" |Max.<br />Turbo
|-
! class="unsortable" |Base
! class="unsortable" |Turbo
! class="unsortable" |{{abbr|TVB|Thermal Velocity Boost}}
! class="unsortable" |Base
! class="unsortable" |Turbo
|-
! rowspan="3" |Core Ultra 9
! style="text-align:left" data-sort-value="sku17" |[https://www.intel.com/content/www/us/en/products/sku/241060/intel-core-ultra-9-processor-285k-36m-cache-up-to-5-70-ghz/specifications.html 285K]
| rowspan="8" |8 (8)
| 3.7
| 5.6
| 5.7
| rowspan="3" |16 (16)
| 3.2
| rowspan="10" |4.6
| rowspan="4" |[[Intel Arc|Intel Graphics]]<br />(4 Xe-cores)
| rowspan="4" |300–2000
| rowspan="3" |36&nbsp;MB
| rowspan="17" |13
| 125&nbsp;W
| 250&nbsp;W
| {{dts|2024|October|format=mdy|abbr=off}}
| US $589
|-
! style="text-align:left" data-sort-value="sku16" |[https://www.intel.com/content/www/us/en/products/sku/241061/intel-core-ultra-9-processor-285-36m-cache-up-to-5-60-ghz/specifications.html 285]
| 2.5
| 5.5
| 5.6
| 1.9
| 65&nbsp;W
| 182&nbsp;W
| rowspan="2" |{{dts|2025|January|format=mdy|abbr=off}}
| rowspan="2" |US $549
|-
! style="text-align:left" data-sort-value="sku15" |[https://www.intel.com/content/www/us/en/products/sku/241059/intel-core-ultra-9-processor-285t-36m-cache-up-to-5-40-ghz/specifications.html 285T]
| 1.4
| 5.4
| rowspan="15" {{n/a}}
| 1.2
| 35&nbsp;W
| 112&nbsp;W
|-
! rowspan="5" |Core Ultra 7
! style="text-align:left" data-sort-value="sku14" |[https://www.intel.com/content/www/us/en/products/sku/241063/intel-core-ultra-7-processor-265k-30m-cache-up-to-5-50-ghz/specifications.html 265K]
| rowspan="2" |3.9
| rowspan="2" |5.5
| rowspan="5" |12 (12)
| rowspan="2" |3.3
| rowspan="5" |30&nbsp;MB
| rowspan="2" |125&nbsp;W
| rowspan="2" |250&nbsp;W
| rowspan="2" |{{dts|2024|October|format=mdy|abbr=off}}
| US $394
|-
! style="text-align:left" data-sort-value="sku13" |[https://www.intel.com/content/www/us/en/products/sku/241062/intel-core-ultra-7-processor-265kf-30m-cache-up-to-5-50-ghz/specifications.html 265KF]
| colspan=2 {{n/a}}
| US $379
|-
! style="text-align:left" data-sort-value="sku12" |[https://www.intel.com/content/www/us/en/products/sku/241068/intel-core-ultra-7-processor-265-30m-cache-up-to-5-30-ghz/specifications.html 265]
| rowspan="2" |2.4
| rowspan="3" |5.3
| rowspan="2" |1.8
| Intel Graphics<br />(4 Xe-cores)
| 300-1950
| rowspan="2"|65&nbsp;W
| rowspan="2"|182&nbsp;W
| rowspan="3" |{{dts|2025|January|format=mdy|abbr=off}}
| US $384
|-
! style="text-align:left" data-sort-value="sku11" |[https://www.intel.com/content/www/us/en/products/sku/241064/intel-core-ultra-7-processor-265f-30m-cache-up-to-5-30-ghz/specifications.html 265F]
| colspan=2 {{n/a}}
| US $369
|-
! style="text-align:left" data-sort-value="sku10" |[https://www.intel.com/content/www/us/en/products/sku/241065/intel-core-ultra-7-processor-265t-30m-cache-up-to-5-30-ghz/specifications.html 265T]
| 1.5
| 1.2
| rowspan="2" |Intel Graphics<br />(4 Xe-cores)
| 300-1950
| 35&nbsp;W
| 112&nbsp;W
| US $384
|-
! rowspan="9" |Core Ultra 5
! style="text-align:left" data-sort-value="sku9" |[https://www.intel.com/content/www/us/en/products/sku/241067/intel-core-ultra-5-processor-245k-24m-cache-up-to-5-20-ghz/specifications.html 245K]
| rowspan="9" |6 (6)
| rowspan="2" |4.2
| rowspan="2" |5.2
| rowspan="6" |8 (8)
| rowspan="2" |3.6
| 300–1900
| rowspan="6" |24&nbsp;MB
| rowspan="2" |125&nbsp;W
| rowspan="2" |159&nbsp;W
| rowspan="2" |{{dts|2024|October|format=mdy|abbr=off}}
| US $309
|-
! style="text-align:left" data-sort-value="sku8" |[https://www.intel.com/content/www/us/en/products/sku/241066/intel-core-ultra-5-processor-245kf-24m-cache-up-to-5-20-ghz/specifications.html 245KF]
| colspan=2 {{n/a}}
| US $294
|-
! style="text-align:left" data-sort-value="sku7" |[https://www.intel.com/content/www/us/en/products/sku/241876/intel-core-ultra-5-processor-245-24m-cache-up-to-5-10-ghz/specifications.html 245]
| 3.5
| rowspan="2" |5.1
| 3.0
| rowspan="2" |4.5
| rowspan="2" |Intel Graphics<br />(4 Xe-cores)
| rowspan="2" |300–1900
| 65&nbsp;W
| 121&nbsp;W
| rowspan="7" |{{dts|2025|January|format=mdy|abbr=off}}
| rowspan="2" |US $270
|-
! style="text-align:left" data-sort-value="sku6" |[https://www.intel.com/content/www/us/en/products/sku/241874/intel-core-ultra-5-processor-245t-24m-cache-up-to-5-10-ghz/specifications.html 245T]
| 2.2
| 1.7
| 35&nbsp;W
| 114&nbsp;W
|-
! style="text-align:left" data-sort-value="sku5" |[https://www.intel.com/content/www/us/en/products/sku/241674/intel-core-ultra-5-processor-235-24m-cache-up-to-5-00-ghz/specifications.html 235]
| 3.4
| rowspan="2" |5.0
| 2.9
| rowspan="5" |4.4
| rowspan="2" |Intel Graphics<br />(3 Xe-cores)
| rowspan="2" |300–2000
| 65&nbsp;W
| 121&nbsp;W
| rowspan="2" |US $247
|-
! style="text-align:left" data-sort-value="sku4" |[https://www.intel.com/content/www/us/en/products/sku/241872/intel-core-ultra-5-processor-235t-24m-cache-up-to-5-00-ghz/specifications.html 235T]
| 2.2
| 1.6
| 35&nbsp;W
| 114&nbsp;W
|-
! style="text-align:left" data-sort-value="sku3" |[https://www.intel.com/content/www/us/en/products/sku/241070/intel-core-ultra-5-processor-225-20m-cache-up-to-4-90-ghz/specifications.html 225]
| rowspan="2" |3.3
| rowspan="3" |4.9
| rowspan="3" |4 (4)
| rowspan="2" |2.7
| Intel Graphics<br />(2 Xe-cores)
| 300–1800
| rowspan="3" |20&nbsp;MB
| rowspan="2" |65&nbsp;W
| rowspan="2" |121&nbsp;W
| US $236
|-
! style="text-align:left" data-sort-value="sku2" |[https://www.intel.com/content/www/us/en/products/sku/241069/intel-core-ultra-5-processor-225f-20m-cache-up-to-4-90-ghz/specifications.html 225F]
| colspan=2 {{n/a}}
| US $221
|-
! style="text-align:left" data-sort-value="sku1" |[https://www.intel.com/content/www/us/en/products/sku/241870/intel-core-ultra-5-processor-225t-20m-cache-up-to-4-90-ghz/specifications.html 225T]
| 2.5
| 1.9
| Intel Graphics<br />(2 Xe-cores)
| 300–1800
| 35&nbsp;W
| 114&nbsp;W
| ?
|}

== Mobile processors ==

{{Timeline of release years
| subtitle = '''Mobile processors'''
| range1 = 2009 –
| range1_color = yellow gold
| 2009 = [[#Core i (1st gen) 2|Nehalem microarchitecture (1st generation)]]
| 2010 = [[#Arrandale|Westmere microarchitecture (1st generation)]]
| 2011 = [[#Core i (2nd gen) 2|Sandy Bridge microarchitecture (2nd generation)]]
| 2012 = [[#Core i (3rd gen) 2|Ivy Bridge microarchitecture (3rd generation)]]
| 2013 = [[#Core i (4th gen) 2|Haswell microarchitecture (4th generation)]]
| 2014 =
| 2015a = [[#Core i (5th gen) 2|Broadwell microarchitecture (5th generation)]]
| 2015b = [[#Core i (6th gen) 2|Skylake microarchitecture (6th generation)]]
| 2016 = 
| 2017 = [[#Core i (7th gen) 2|Kaby Lake microarchitecture (7th/8th generation)]]
| 2018 = [[#Core i (8th gen) 2|Coffee Lake microarchitecture (8th generation)]]
| 2019a = [[#Core i (10th gen) 2|Comet Lake microarchitecture (10th generation)]]
| 2019b = [[#Core i (10th gen) 2|Ice Lake (10th generation)]]
| 2020 = [[#Core i (11th gen) 2|Tiger Lake (11th generation)]]
| 2022 = [[#Core i (12th gen) 2|Alder Lake (12th generation)]]
| 2023a = [[#Core i (13th gen) 2|Raptor Lake (13th generation)]]
| 2023b = [[#Core i (14th gen) 2|Raptor Lake (14th generation)]]
}}

=== Core ===

==== Yonah<span class="anchor" id="&quot;Yonah&quot;"></span><span class="anchor" id="&quot;Yonah&quot; (65 nm)"></span><span class="anchor" id="&quot;Yonah&quot; (low-voltage, 65 nm)"></span><span class="anchor" id="&quot;Yonah&quot; (ultra-low-voltage, 65 nm)"></span> ====
{{Main|Yonah (microprocessor)}}

{{Cpulist|p6|head}}
<!-- U Series -->
{{Cpulist|p6|yonah
|model=Core Solo U1300
|ark=27246
|l2=2
|fsb=533
|mult=8
|vmin=0.95
|vmax=1.05
|tdp=5.5
|date=April 2006
|price=$241
|links=1
|sspec1=SL8W7|step1=C0|sock1=Socket 479/[[BGA2|FC-μBGA]]|part1=LE80539UE0042M
|sspec2=SL9LA|step2=D0
}}
{{Cpulist|p6|yonah
|model=Core Solo U1400
|ark=27247
|l2=2
|fsb=533
|mult=9
|vmin=0.95
|vmax=1.05
|tdp=5.5
|date=April 2006
|price=$262
|sspec1=SL8W6|step1=C0|sock=Socket 479/FC-μBGA|part1=LE80538UE0092M
|sspec2=SL9LB|step2=D0
}}
{{Cpulist|p6|yonah
|model=Core Solo U1500
|ark=28022
|l2=2
|fsb=533
|mult=10
|vmin=0.85
|vmax=1.1
|tdp=5.5
|date=January 2007
|price=$262
|sspec1=SL9LC|step1=D0|sock=Socket 479/FC-μBGA|part1=LE80538UE0142MX
}}
{{cpulist|p6|yonah
|model=Core Duo U2400
|ark=27239
|l2=2
|fsb=533
|mult=8
|vmin=0.8
|vmax=1.1
|tdp=9
|sock=Socket 479/[[BGA2|FC-μBGA]]
|date=June 2006
|price=$262
|links=1
|sspec1=SL99W|step1=C0|part1=LE80539UE0042M
|sspec2=SL9UR|step2=D0
}}
{{cpulist|p6|yonah
|model=Core Duo U2500
|ark=27240
|l2=2
|fsb=533
|mult=9
|vmin=0.8
|vmax=1.1
|tdp=9
|sock=Socket 479/FC-μBGA
|date=June 2006
|price=$289
|sspec1=SL99V|step1=C0|part1=LE80539UE0092M
|sspec2=SL9JQ|step2=D0
}}
<!-- L Series -->
{{cpulist|p6|yonah|model=Core Duo L2300|ark=27228
 |l2=2|fsb=667|mult=9|vmin=0.762|vmax=1.212|tdp=15|sock=Socket 479/[[BGA2|FC-μBGA]]|date=January 2006|price=$284|links=1
 |sspec1=SL8VX|step1=C0|part1=LE80539LF0212M
 |sspec2=SL9JS|step2=D0
}}
{{cpulist|p6|yonah|model=Core Duo L2400|ark=27229
 |l2=2|fsb=667|mult=10|vmin=0.762|vmax=1.212|tdp=15|sock=Socket 479/FC-μBGA|date=January 2006|price=$316
 |sspec1=SL8VW|step1=C0|part1=LE80539LF0282M
 |sspec2=SL9JT|step2=D0
}}
{{cpulist|p6|yonah|model=Core Duo L2500|ark=27230
 |l2=2|fsb=667|mult=11|vmin=0.762|vmax=1.212|tdp=15|sock=Socket 479/FC-μBGA|date=September 2006|price=$316
 |sspec1=SL9JU|step1=D0|part1=LE80539LF0342MX
}}
<!-- T Series -->
{{Cpulist|p6|yonah
|model=Core Solo T1200
|l2=2
|fsb=667
|mult=9
|vmin=0.7625
|vmax=1.3
|tdp=27
|date=July 2006
|price=
|links=1
|sspec1=SL92C|step1=C0|part1=LF80538GF0212M
}}
{{Cpulist|p6|yonah
|model=Core Solo T1250<!-- <ref>{{Cite web |title=Intel® Core™ Solo Processor T1250 |url=https://www.intel.com/content/www/us/en/products/sku/37246/intel-core-solo-processor-t1250-2m-cache-1-73-ghz-533-mhz-fsb.html |access-date=2023-01-21 |website=Intel |language=en}}</ref> -->
|ark=37246
|l2=2
|fsb=533
|mult=13
|vmin=0.7625
|vmax=1.3
|tdp=31
|date=
|price=
|links=
|sspec1=SL99U|step1=C0|part1=LF80538GE0302M
}}
{{Cpulist|p6|yonah
|model=Core Solo T1300<!-- <ref>{{Cite web |title=Intel® Core™ Solo Processor T1300 |url=https://ark.intel.com/content/www/us/en/ark/products/27242/intel-core-solo-processor-t1300-2m-cache-1-66-ghz-667-mhz-fsb.html |access-date=2023-01-21 |website=Intel |language=en}}</ref> -->
|ark=27242
|l2=2
|fsb=667
|mult=10
|vmin=0.7625
|vmax=1.3
|tdp=27
|date=January 2006
|price=$209
|links=
|sspec1=SL8W3|step1=C0|sock1=Socket 479/[[BGA2|FC-μBGA]]|part1=LE80538GF0282M
|sspec2=SL9LH|step2=D0|sock2=Socket 479/FC-μBGA|part2=LE80538GF0282M
|sspec3=SL8VY|step3=C0|sock3=Socket M|part3=LF80538GF0282M
|sspec4=SL9L4|step4=D0|sock=*Socket M|part4=BX80538T1300
}}
{{Cpulist|p6|yonah
|model=Core Solo T1350
|ark=27243
|l2=2
|fsb=533
|mult=14
|vmin=0.7625
|vmax=1.3
|tdp=31
|date=July 2006
|price=
|sspec1=SL99T|step1=C0|part1=LF80538GE0362M
}}
{{Cpulist|p6|yonah
|model=Core Solo T1400
|ark=27242
|l2=2
|fsb=667
|mult=11
|vmin=0.7625
|vmax=1.3
|tdp=27
|date=May 2006
|price=$209
|links=
|sspec1=SL92X|step1=C0|sock1=Socket 479/FC-μBGA|part1=LE80538GF0342M
|sspec2=SL9LJ|step2=D0|sock2=Socket 479/FC-μBGA|part2=LE80538GF0342M
|sspec3=SL92V|step3=C0|sock3=Socket M|part3=LF80538GF0342M
|sspec4=SL9L5|step4=D0|sock=*Socket M|part4=BX80538T1400
}}
{{Cpulist|p6|yonah
|model=Core Solo T1500
|l2=2
|fsb=667
|mult=12
|vmin=0.7625
|vmax=1.3
|tdp=27
|date=August 2006
|price=
|sspec1=SL92W|step1=C0|sock1=Socket 479/FC-μBGA|part1=LE80538GF0412M
|sspec2=SL92U|step2=C0|sock2=Socket M|part2=LF80538GF0412M
}}
{{cpulist|p6|yonah
|model=Core Duo T2050
|ark=27231
|l2=2
|fsb=533
|mult=12
|vmin=0.762
|vmax=1.3
|tdp=31
|date=May 2006
|price=$140
|links=1
|sspec1=SL9BN|step1=C0|part1=LF80539GE0252M
}}
{{cpulist|p6|yonah
|model=Core Duo T2250
|ark=27232
|l2=2
|fsb=533
|mult=13
|vmin=0.762
|vmax=1.3
|tdp=31
|date=May 2006
|price=OEM
|sspec1=SL9DV|step1=C0|part1=LF80539GE0302M
}}
{{cpulist|p6|yonah
|model=Core Duo T2300
|ark=27233
|l2=2
|fsb=667
|mult=10
|vmin=0.762
|vmax=1.3
|tdp=31
|date=January 2006
|price=$241
|sspec1=SL8VR |step1=C0 | sock1=Socket M | part1=LF80539GF0282M
|sspec2=SL9JL |step2=D0 | sock2=Socket M | part2=LF80539GF0282M
|sspec3=SL8VV | step3=C0 | sock3=Socket 479/[[BGA2|FC-μBGA]] | part3=LE80539GF0282M
|sspec4=SL9JY |step4=D0 | sock4=Socket 479/[[BGA2|FC-μBGA]] | part4=LE80539GF0282M
}}
{{cpulist|p6|yonah
|model=Core Duo T2300E
|ark=27234
|l2=2
|fsb=667
|mult=10
|vmin=0.762
|vmax=1.3
|tdp=31
|date=May 2006
|price=$209
|sspec1=SL9DM |step1=C0 | sock1=Socket M | part1=LF80539GF0282ME
|sspec2=SL9JE |step2=D0 | sock2=Socket M | part2=LF80539GF0282ME
|sspec3=SL9DN | step3=C0 | sock3=μFCBGA-479 | part3=LE80539GF0282ME
|sspec4=SL9JV |step4=D0 | sock4=μFCBGA-479 | part4=LE80539GF0282ME
}}
{{cpulist|p6|yonah|model=Core Duo T2350|ark=29751
|l2=2|fsb=533|mult=14|vmin=0.762|vmax=1.3|tdp=31|date=<!--January 2008-->|price=OEM
  |sspec1=SL9JK|step1=C0|part1=LF80539GE0362ME
}}
{{cpulist|p6|yonah|model=Core Duo T2400|ark=27235
 |l2=2|fsb=667|mult=11|vmin=0.762|vmax=1.3 |date=January 2006|price=$294
 |sspec1=SL8VQ |step1=C0 | sock1=Socket M | tdp1=31 | part1=LF80539GF0342M
 |sspec2=SL9JM |step2=D0 | sock2=Socket M | tdp2=31 | part2=LF80539GF0342M
 |sspec3=SL8VU | step3=C0 | sock3=Socket 479/FC-μBGA | tdp3=27 | part3=LE80539GF0342M
 |sspec4=SL9JZ |step4=D0 | sock4=Socket 479/FC-μBGA | tdp4=27 | part4=LE80539GF0342M
}}
{{cpulist|p6|yonah|model=Core Duo T2450|ark=29752
 |l2=2|fsb=533|mult=15|vmin=0.762|vmax=1.3|tdp=31|date=|price=OEM
 |sspec1=SLA4M|step1=C0|part1=LF80539GE0412M
}}
{{cpulist|p6|yonah|model=Core Duo T2500|ark=27236
 |l2=2|fsb=667|mult=12|vmin=0.762|vmax=1.3|tdp=31|date=January 2006|price=$423
 |sspec1=SL8VT |step1=C0 | sock1=Socket M | part1=LF80539GF0412M
 |sspec2=SL9K2 |step2=D0 | sock2=Socket M | part2=LF80539GF0412M
 |sspec3=SL8VP | step3=C0 | sock3=Socket 479/FC-μBGA | part3=LE80539GF0412M
 |sspec4=SL9EH |step4=D0 | sock4=Socket 479/FC-μBGA | part4=LE80539GF0412M
}}
{{cpulist|p6|yonah|model=Core Duo T2600|ark=27237
 |l2=2|fsb=667|mult=13|vmin=0.762|vmax=1.3|tdp=31|date=January 2006|price=$637
 |sspec1=SL8VN |step1=C0 | sock1=Socket M | part1=LE80539GF0482M
 |sspec2=SL9JN |step2=D0 | sock2=Socket M | part2=LE80539GF0482M
 |sspec3=SL8VS | step3=C0 | sock3=Socket 479/FC-μBGA | part3=LE80539GF0482M
 |sspec4=SL9K3 |step4=D0 | sock4=Socket 479/FC-μBGA | part4=LE80539GF0482M
}}
{{cpulist|p6|yonah|model=Core Duo T2700|ark=27238
 |l2=2|fsb=667|mult=14|vmin=0.762|vmax=1.3|tdp=31|date=June 2006|price=$637
 |sspec1=SL9JP|step1=D0|sock1=Socket M|part1=LF80539GF0532MX
 |sspec2=SL9K4|step2=D0|sock2=Socket 479/FC-μBGA|part2=LE80539GF0532MX
}}
{{end}}

=== Core 2 ===
{{Main|Intel Core 2}}
[[File:Laptop-intel-core2duo-t5500.jpg|thumb|Inside of old Sony VAIO laptop (VGN-C140G)]]

==== "Merom-L" (65 nm) <span class="anchor" id="&quot;Merom-L&quot; (ultra-low-voltage, 65 nm)"></span> ====

*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]], [[Trusted Execution Technology]] (TXT)''
* [[Die (integrated circuit)|Die]] size: 81&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 65nm process|A1]]
{{cpulist|core|head}}
{{cpulist|core|section=ultra-low voltage}}
{{cpulist|core|merom|model=Core 2 Solo ULV U2100|ark=31789
|l2=1|fsb=533|mult=8 |vmin=0.86 |vmax=0.975|tdp=5.5|sock=[[Micro-FCBGA]]|date=September 2007|price=$241|links=1
 |sspec1=SLAGM|cores=1|step1=A1|part1=LE80537UE0041M}}
{{cpulist|core|merom|model=Core 2 Solo ULV U2200|ark=31790
|l2=1|fsb=533|mult=9 |vmin=0.86 |vmax=0.975|tdp=5.5|sock=Micro-FCBGA|date=September 2007|price=$262
 |sspec1=SLAGL|cores=1|step1=A1|part1=LE80537UE0091M}}
{{end}}

==== "Merom", "Merom-2M" (standard-voltage, 65 nm) <span class="anchor" id="&quot;Merom-2M&quot; (standard-voltage, 65 nm)"></span><span class="anchor" id="&quot;Merom&quot; (standard-voltage, 65 nm)"></span><span class="anchor" id="T7600"></span> ====

*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2)''
* Model T7600G features an unlocked clock multiplier. Only sold OEM in the [[Dell XPS]] M1710.
* ''[[Intel VT-x]]'': Supported by T5500 (L2), T5600 and all T7xxx
* ''Intel Dynamic Front Side Bus Frequency Switching'': Supported by [[Intel Core (microarchitecture)#Steppings using 65nm process|E1, G0, G2, M0 Steppings]]
* Socket P processors can throttle the [[front-side bus]] (FSB) anywhere between 400 and 800 MT/s as needed.
* [[Die (integrated circuit)|Die]] size: 143&nbsp;mm<sup>2</sup> (Merom), 111&nbsp;mm<sup>2</sup> (Merom-2M)
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 65nm process|B2, E1, G0, G2]] (Merom), [[Intel Core (microarchitecture)#Steppings using 65nm process|L2, M0]] (Merom-2M)
* All models of stepping B2 released in July 2006, stepping L2 released in January 2007.
{{cpulist|core|head}}
{{cpulist|core|merom|model=Core 2 Duo T5200|ark=27252
|l2=2|fsb=533|mult=12 |vmin=0.95 |vmax=1.175|tdp=34|sock=[[Socket M]]|date=October 2006|price=[[Original equipment manufacturer|OEM]]|links=1
 |sspec1=SL9VP|step1=B2|part1=LF80537GE0252M}}
{{cpulist|core|merom|model=Core 2 Duo T5250|ark=30786
|l2=2|fsb=667|mult=9 |vmin=0.95 |vmax=1.175|tdp=35|sock=[[Socket P]]|date=Q2 2007|price=OEM
 |sspec1=SLA9S|step1=M0|part1=LF80537GF0212M}}
{{cpulist|core|merom|model=Core 2 Duo T5270|ark=33096
|l2=2|fsb=800|mult=7 |vmin=0.95 |vmax=1.175|tdp=35|sock=Socket P|date=October 2007|price=OEM
 |sspec1=SLALK|step1=M0|part1=LF80537GG0172M}}
{{cpulist|core|merom|model=Core 2 Duo T5300|ark=29758
|l2=2|fsb=533|mult=13 |vmin=0.95 |vmax=1.175|tdp=34|sock=Socket M|date=Q1 2007|price=OEM
 |sspec1=SL9WE|step1=L2|part1=LF80537GE0302M}}
{{cpulist|core|merom|model=Core 2 Duo T5450|ark=30787
|l2=2|fsb=667|mult=10 |vmin=0.95 |vmax=1.175|tdp=35|sock=Socket P|date=Q2 2007|price=OEM
 |sspec1=SLA4F|step1=M0|part1=LF80537GF0282MT}}
{{cpulist|core|merom|model=Core 2 Duo T5470|ark=31788
|l2=2|fsb=800|mult=8 |vmin=0.95 |vmax=1.175|tdp=35|sock=Socket P|date=July 2007|price=OEM
 |sspec1=SLAEB|step1=M0|part1=LF80537GG0252M}}
{{cpulist|core|merom|model=Core 2 Duo T5500|ark=27253
 |l2=2|fsb=667|mult=10 |vmin=0.95 |vmax=1.175|tdp=34|sock=Socket M|date=August 28, 2006|price=$209
 |sspec1=SL9SH|step1=B2|part1=LF80537GF0282M
 |sspec2=SLGFK|step2=G2
 |sspec3=SL9U4|step3=L2}}
{{cpulist|core|merom|model=Core 2 Duo T5500|ark=27253
 |l2=2|fsb=667|mult=10 |vmin=0.95 |vmax=1.175|tdp=34|sock=BGA479|date=August 2006|price=$209
 |sspec1=SL9SQ|step1=B2|part1=LE80537GF0282M
 |sspec2=SL9U8|step2=L2}}
{{cpulist|core|merom|model=Core 2 Duo T5550|ark=32427
|l2=2|fsb=667|mult=11 |vmin=0.95 |vmax=1.175|tdp=35|sock=Socket P|date=January 2008|price=OEM
 |sspec1=SLA4E|step1=M0|part1=LF80537GF0342MT}}
{{cpulist|core|merom|model=Core 2 Duo T5600|ark=27254
 |l2=2|fsb=667|mult=11 |vmin=0.95 |vmax=1.175|tdp=34|sock=Socket M|date=August 2006|price=$241
 |sspec1=SL9SG|step1=B2|part1=LF80537GF0342M
 |sspec2=SL9U3|step2=L2}}
{{cpulist|core|merom|model=Core 2 Duo T5600|ark=27254
 |l2=2|fsb=667|mult=11 |vmin=0.95 |vmax=1.175|tdp=34|sock=BGA479|date=August 2006|price=$241
 |sspec1=SL9SP|step1=B2|part1=LE80537GF0342M
 |sspec2=SL9U7|step2=L2}}
{{cpulist|core|merom|model=Core 2 Duo T5670|ark=35163
|l2=2|fsb=800|mult=9 |vmin=0.95 |vmax=1.175|tdp=35|sock=Socket P|date=Q2 2008|price=OEM
 |sspec1=SLAJ5|step1=M0|part1=LF80537GG0332MN}}
{{cpulist|core|merom|model=Core 2 Duo T5750|ark=33915
|l2=2|fsb=667|mult=12 |vmin=0.95 |vmax=1.175|tdp=35|sock=Socket P|date=January 2008|price=OEM
 |sspec1=SLA4D|step1=M0|part1=LF80537GF0412M}}
{{cpulist|core|merom|model=Core 2 Duo T5800|ark=35581
|l2=2|fsb=800|mult=10 |vmin=0.95 |vmax=1.175|tdp=35|sock=Socket P|date=Q4 2008|price=OEM
 |sspec1=SLB6E|step1=M0|part1=LF80537GG041F}}
{{cpulist|core|merom|model=Core 2 Duo T5850<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SLA4C.html|title=SLA4C (Intel Core 2 Duo T5850)|access-date=2018-10-27|work=CPU-World|archive-date=May 3, 2023|archive-url=https://web.archive.org/web/20230503160531/https://www.cpu-world.com/sspec/SL/SLA4C.html|url-status=live}}</ref>
|l2=2|fsb=667|mult=13 |vmin=0.95 |vmax=1.175|tdp=35|sock=Socket P|date=Q4 2008|price=OEM
 |sspec1=SLA4C|step1=M0|part1=LF80537GF0482M}}
{{cpulist|core|merom|model=Core 2 Duo T5870|ark=37034
|l2=2|fsb=800|mult=10 |vmin=0.95 |vmax=1.175|tdp=35|sock=Socket P|date=2008|price=OEM
 |sspec1=SLAZR|step1=M0|part1=LF80537GG0412MN}}
{{cpulist|core|merom|model=Core 2 Duo T5900<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SLB6D.html|title=SLB6D (Intel Core 2 Duo T5900)|access-date=2018-10-27|work=CPU-World|archive-date=May 5, 2023|archive-url=https://web.archive.org/web/20230505013720/https://www.cpu-world.com/sspec/SL/SLB6D.html|url-status=live}}</ref>
|l2=2|fsb=800|mult=11 |vmin=0.95 |vmax=1.175|tdp=35|sock=Socket P|date=July 2008|price=OEM
 |sspec1=SLB6D|step1=M0|part1=LF80537GG049F}}
{{cpulist|core|merom|model=Core 2 Duo T7100|ark=29759
|l2=2|fsb=800|mult=9 |vmin=0.95 |vmax=1.175|tdp=35|date=May 2007|price=$209
 |sspec1=SLA4A|step1=M0|sock1=Socket P|part1=LF80537GG0332M
}}
{{cpulist|core|merom|model=Core 2 Duo T7100|ark=29759
|l2=2|fsb=800|mult=9 |vmin=0.95 |vmax=1.175|tdp=35|date=May 2007|price=$209
 |sspec1=SLA3U|step1=M1|sock1=FCBGA6|part1=LE80537GG0332M
}}
{{cpulist|core|merom|model=Core 2 Duo T7200|ark=27255
|l2=4|fsb=667|mult=12 |vmin=0.95 |vmax=1.175|tdp=34|date=August 2006|price=$294
 |sspec1=SL9SF|step1=B2|sock1=Socket M|part1=LF80537GF0414M
}}
{{cpulist|core|merom|model=Core 2 Duo T7200|ark=27255
|l2=4|fsb=667|mult=12 |vmin=0.95 |vmax=1.175|tdp=34|date=August 2006|price=$294
 |sspec1=SL9SL|step1=B2|sock1=FCBGA6|part1=LE80537GF0414M
}}
{{cpulist|core|merom|model=Core 2 Duo T7250|ark=31728
|l2=2|fsb=800|mult=10 |vmin=0.95 |vmax=1.175|tdp=35|date=September 2007|price=$290
 |sspec1=SLA49|step1=M0|sock1=Socket P|part1=LF80537GG0412M
 |sspec2=SLAXH|step2=M0
}}
{{cpulist|core|merom|model=Core 2 Duo T7250|ark=31728
|l2=2|fsb=800|mult=10 |vmin=0.95 |vmax=1.175|tdp=35|date=September 2007|price=$290
 |sspec1=SLA3T|step1=M1|sock1=FCBGA6|part1=LE80537GG0412M
}}
{{cpulist|core|merom|model=Core 2 Duo T7300|ark=29760
|l2=4|fsb=800|mult=10 |vmin=0.95 |vmax=1.175|tdp=35|date=May 2007|price=$241
 |sspec1=SLAMD|step1=G0|sock1=Socket P|part1=LF80537GG0414M
 |sspec2=SLA45|step2=E1|part2=LF80537GG0414M
}}
{{cpulist|core|merom|model=Core 2 Duo T7300|ark=29760
|l2=4|fsb=800|mult=10 |vmin=0.95 |vmax=1.175|tdp=35|date=May 2007|price=$241
 |sspec1=SLA3P|step1=E1|sock1=FCBGA6|part1=LE80537GG0414M
 |sspec2=SLAMF|step2=G0
}}
{{cpulist|core|merom|model=Core 2 Duo T7400|ark=27256
 |2166&nbsp;MHz |l2=4|fsb=667|mult=13 |vmin=0.95 |vmax=1.175|tdp=34|date=August 2006|price=$423
 |sspec1=SL9SE|step1=B2|sock1=Socket M|part1=LF80537GF0484M
 |sspec2=SLGFJ|step2=G2
}}
{{cpulist|core|merom|model=Core 2 Duo T7400|ark=27256
 |2166&nbsp;MHz |l2=4|fsb=667|mult=13 |vmin=0.95 |vmax=1.175|tdp=34|date=August 2006|price=$423
 |sspec1=SL9SK|step1=B2|sock1=FCBGA6|part1=LE80537GF0484M
 |sspec2=SLGFV|step2=G2
}}
{{cpulist|core|merom|model=Core 2 Duo T7500|ark=29761|2200&nbsp;MHz
 |l2=4|fsb=800|mult=11 |vmin=0.95 |vmax=1.175|tdp=35|date=May 2007|price=$316
 |sspec1=SLA44|step1=E1|sock1=Socket P|part1=LF80537GG0494M
 |sspec2=SLAF8|step2=G0
}}
{{cpulist|core|merom|model=Core 2 Duo T7500|ark=29761|2200&nbsp;MHz
 |l2=4|fsb=800|mult=11 |vmin=0.95 |vmax=1.175|tdp=35|date=May 2007|price=$316
 |sspec1=SLA3N|step1=E1|sock1=FCBGA6|part1=LE80537GG0494M
 |sspec2=SLADM|step2=G0
}}
{{cpulist|core|merom|model=Core 2 Duo T7600|ark=27257
|l2=4|fsb=667|mult=14 |vmin=0.95 |vmax=1.175|tdp=34|date=August 2006|price=$637
 |sspec1=SL9SD|step1=B2|sock1=Socket M|part1=LF80537GF0534M
}}
{{cpulist|core|merom|model=Core 2 Duo T7600|ark=27257
|l2=4|fsb=667|mult=14 |vmin=0.95 |vmax=1.175|tdp=34|date=August 2006|price=$637
 |sspec1=SL9SJ|step1=B2|sock1=FCBGA6|part1=LE80537GF0534M
}}
{{cpulist|core|merom|model=Core 2 Duo T7600G<ref>{{cite web|url=http://www.cpu-world.com/sspec/SL/SL9U5.html|work=CPU-World|access-date=2018-10-27|title=SL9U5 (Intel Core 2 Duo T7600G)|archive-date=May 6, 2023|archive-url=https://web.archive.org/web/20230506205211/https://www.cpu-world.com/sspec/SL/SL9U5.html|url-status=live}}</ref>
 |l2=4|fsb=667|mult=14 |vmin=0.95 |vmax=1.175|tdp=34|date=December 2006|price=
 |sspec1=SL9U5|step1=B2|sock1=Socket M|part1=LF80537GF0534MU
}}
{{cpulist|core|merom|model=Core 2 Duo T7700|ark=29762|2400&nbsp;MHz
 |l2=4|fsb=800|mult=12 |vmin=0.95 |vmax=1.175|tdp=35|date=May 2007|price=$530
 |sspec1=SLA43|step1=E1|sock1=Socket P|part1=LF80537GG0564M
 |sspec2=SLAF7|step2=G0
}}
{{cpulist|core|merom|model=Core 2 Duo T7700|ark=29762|2400&nbsp;MHz
 |l2=4|fsb=800|mult=12 |vmin=0.95 |vmax=1.175|tdp=35|date=May 2007|price=$530
 |sspec1=SLA3M|step1=E1|sock1=FCBGA6|part1=LE80537GG0564M
 |sspec2=SLADL|step2=G0
}}
{{cpulist|core|merom|model=Core 2 Duo T7800|ark=31729
|l2=4|fsb=800|mult=13 |vmin=0.95 |vmax=1.175|tdp=35|date=September 2007|price=$530
 |sspec1=SLAF6|step1=G0|sock1=Socket P|part1=LF80537GG0644ML
}}
{{cpulist|core|merom|model=Core 2 Duo T7800|ark=31729
|l2=4|fsb=800|mult=13 |vmin=0.95 |vmax=1.175|tdp=35|date=September 2007|price=$530
 |sspec1=SLA75|step1=G0|sock1=FCBGA6|part1=LE80537GG0644M
}}
{{end}}

See also: Versions of the same Merom-2M core with half the L2 cache disabled are available under the [[List of Intel Pentium Dual-Core microprocessors#"Merom-M", "Merom-2M" (65 nm)|Pentium Dual-Core]] brand.

==== "Merom" (low-voltage, 65 nm) ====

*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]], [[Trusted Execution Technology]] (TXT)''
* ''Intel Dynamic Front Side Bus Frequency Switching'': Supported by [[Intel Core (microarchitecture)#Steppings using 65nm process|E1, G0, G2 Steppings]]
* [[Die (integrated circuit)|Die]] size: 143&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 65nm process|B2, E1, G0, G2]]
{{cpulist|core|head}}
{{cpulist|core|merom|model=Core 2 Duo SL7100<ref>{{cite web|url=https://www.infoworld.com/article/2650885/computer-hardware/intel-develops-processor-similar-to-macbook-air-chip.html|title=Intel develops processor similar to MacBook Air chip|date=2008-02-11|work=[[InfoWorld]]|access-date=2018-10-27|first1=Agam|last1=Shah|archive-date=October 28, 2018|archive-url=https://web.archive.org/web/20181028033609/https://www.infoworld.com/article/2650885/computer-hardware/intel-develops-processor-similar-to-macbook-air-chip.html|url-status=live}}</ref>
|l2=4|fsb=800|mult=6|tdp=12|sock=[[μFC-BGA 956]]|price=OEM|links=1
 |sspec1=SLAJD|sspec2=SLAT4|part1=SY80537LG0094M}}
{{cpulist|core|merom|model=Core 2 Duo L7200|ark=28025
|l2=4|fsb=667|mult=8 |vmin=0.9 |vmax=1.2|tdp=17|sock=FCBGA6|date=Q1 2007|price=$284
 |sspec1=SL9SN|step1=B2|part1=LE80537LF0144M}}
{{cpulist|core|merom|model=Core 2 Duo L7300|ark=29756
|l2=4|fsb=800|mult=7 |vmin=0.9 |vmax=1.1|tdp=17|sock=FCBGA6|date=May 2007|price=$284
 |sspec1=SLA3S|step1=E1|part1=LE80537LG0174M}}
{{cpulist|core|merom|model=Core 2 Duo L7400|ark=28026
|l2=4|fsb=667|mult=9 |vmin=0.9 |vmax=1.2|tdp=17|sock=FCBGA6|date=Q1 2007|price=$316
 |sspec1=SL9SM|step1=B2|part1=LE80537LF0214M
 |sspec2=SLGFX|step2=G2}}
{{cpulist|core|merom|model=Core 2 Duo L7500|ark=29757
|l2=4|fsb=800|mult=8 |vmin=0.9 |vmax=1.1|tdp=17|sock=FCBGA6|date=May 2007|price=$316
 |sspec1=SLA3R|step1=E1|part1=LE80537LG0254M
 |sspec2=SLAET|step2=G0}}
{{cpulist|core|merom|model=Core 2 Duo SP7500<ref name="intel.com">{{cite web|url=https://www.intel.com/content/www/us/en/support/products/873/processors.html|title=Support for Intel Processors|website=Intel|access-date=June 26, 2019|archive-date=June 23, 2019|archive-url=https://web.archive.org/web/20190623123110/https://www.intel.com/content/www/us/en/support/products/873/processors.html|url-status=live}}</ref>{{failed verification|date=October 2018}}<ref>{{cite web|url=http://www.anandtech.com/mac/showdoc.aspx?i=3203|title=The MacBook Air CPU Mystery: More Details Revealed|work=[[AnandTech]]|date=2008-01-17|first1=Anand Lai|last1=Shimpi|access-date=2018-10-27|archive-date=January 5, 2010|archive-url=https://web.archive.org/web/20100105075850/http://www.anandtech.com/mac/showdoc.aspx?i=3203|url-status=live}}</ref>
|l2=4|fsb=800|mult=8 |vmin=1.0 |vmax=1.25|tdp=20|sock=μFC-BGA 956|price=OEM
 |sspec1=SLAT2|step1=|part1=SY80537GG0254M
 |sspec2=SLAEV|step2=|noanchor=yes}}
{{cpulist|core|merom|model=Core 2 Duo L7700|ark=32243
|l2=4|fsb=800|mult=9 |vmin=0.9 |vmax=1.1|tdp=17|sock=FCBGA6|date=September 2007|price=$316
 |sspec1=SLAES|step1=G0|part1=LE80537LG0334M}}
{{cpulist|core|merom|model=Core 2 Duo SP7700<ref name="intel.com" />{{failed verification|date=October 2018}}
|l2=4|fsb=800|mult=9 |vmin=1.0 |vmax=1.25|tdp=20|sock=μFC-BGA 956|price=OEM
 |sspec1=SLALQ|sspec2=SLALR|sspec3=SLASZ|step1=|part1=SY80537GG0334M|part2=SY80537GG0334ML|noanchor=yes}}
{{end}}

==== "Merom-2M" (ultra-low-voltage, 65 nm) ====

*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]]''
* [[Die (integrated circuit)|Die]] size: 111&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 65nm process|L2, M0]]
{{cpulist|core|head}}
{{cpulist|core|merom|model=Core 2 Duo U7500|ark=36931
|l2=2|fsb=533|mult=8 |vmin=0.8 |vmax=0.975|tdp=10|sock=FCBGA6 (Socket&nbsp;M)|date=April 2007|price=$262|links=1
 |sspec1=SLA2V|step1=L2|part1=LE80537UE0042M
 |sspec2=SLAUT|step2=M0}}
{{cpulist|core|merom|model=Core 2 Duo U7500|ark=29763
|l2=2|fsb=533|mult=8 |vmin=0.8 |vmax=0.975|tdp=10|sock=FCBGA6 (Socket&nbsp;P)|date=February 2008|price=$262
 |sspec1=SLV3X|step1=M0|part1=LE80537UE0042ML}}
{{cpulist|core|merom|model=Core 2 Duo U7600|ark=29764
|l2=2|fsb=533|mult=9 |vmin=0.8 |vmax=0.975|tdp=10|sock=FCBGA6 (Socket&nbsp;M)|date=April 2007|price=$289
 |sspec1=SLA2U|step1=L2|part1=LE80537UE0092M
 |sspec2=SLAUS|step2=M0}}
{{cpulist|core|merom|model=Core 2 Duo U7600|ark=29764
|l2=2|fsb=533|mult=9 |vmin=0.8 |vmax=0.975|tdp=10|sock=FCBGA6 (Socket&nbsp;P)|date=April 2007|price=$289
 |sspec1=SLV3W|step1=M0|part1=LE80537UE0092ML}}
{{cpulist|core|merom|ark=33920|model=Core 2 Duo U7700
|l2=2|fsb=533|mult=10 |vmin=0.8 |vmax=0.975|tdp=10|sock=FCBGA6 (Socket&nbsp;M)|date=December 2007|price=$289
 |sspec1=SLA6X|step1=L2|part1=LE80537UE0142M
 |sspec2=SLAUR|step2=M0}}
{{cpulist|core|merom|model=Core 2 Duo U7700|ark=33920
|l2=2|fsb=533|mult=10 |vmin=0.8 |vmax=0.975|tdp=10|sock=FCBGA6 (Socket&nbsp;P)|date=February 2008|price=$289
 |sspec1=SLV3V|step1=M0|part1=LE80537UE0142ML}}
{{end}}

==== "Merom XE" (65 nm) <span class="anchor" id="&quot;Merom XE&quot; (standard-voltage, 65 nm)"></span> ====

''These models feature an [[CPU locking|unlocked]] [[clock multiplier]]''
*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]], [[Trusted Execution Technology]] (TXT), Intel Dynamic Front Side Bus Frequency Switching''
* Merom XE processors support Dynamic Front Side Bus Throttling between 400 and 800 MT/s.
* [[Die (integrated circuit)|Die]] size: 143&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 65nm process|E1, G0]]
{{cpulist|core|head}}
{{cpulist|core|merom|model=Core 2 Extreme X7800|ark=30788
|l2=4|fsb=800|mult=13 |vmin=1.0375 |vmax=1.3|tdp=44|sock=[[Socket P]]|date=July 2007|price=$851|links=1
 |sspec1=SLA6Z|step1=E1|part1=LF80537GG0644M}}
{{cpulist|core|merom|model=Core 2 Extreme X7900|ark=31730
|l2=4|fsb=800|mult=14 |vmin=1.0375 |vmax=1.3|tdp=44|sock=Socket P|date=August 2007|price=$851
 |sspec1=SLA33|step1=E1|part1=LF80537GG0724M
 |sspec2=SLAF4|step2=G0}}
{{end}}

==== "Penryn-L" (45 nm) <span class="anchor" id="&quot;Penryn-L&quot; (ultra-low-voltage, 45 nm, Small Form Factor)"></span> ====

* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]], [[Trusted Execution Technology]] (TXT), Intel Dynamic Acceleration (IDA)''
* [[Socket P]] processors can throttle the [[front-side bus]] (FSB) anywhere between 400 and 800 MT/s as needed.
* [[Die (integrated circuit)|Die]] size: 82&nbsp;mm<sup>2</sup>
* 228 million transistors
* Package size: 22&nbsp;mm × 22&nbsp;mm
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|M0, R0]]
{{cpulist|core|head}}
{{cpulist|core|section=Small Form Factor, ultra-low voltage}}
{{cpulist|core|penrynulv|ark=36728|model=Core 2 Solo SU3300|sspec1=SLGAR|cores=1|step1=M0|sspec2=SLGAJ|step2=R0|mult=6|fsb=800|l2=3 |vmin=1.05 |vmax=1.15|tdp=5.5|date=May 2008|part1=AV80585UG0093M|price=$262|links=1}}
{{cpulist|core|penrynulv|ark=37133|model=Core 2 Solo SU3500|sspec1=SLGFM|cores=1|step1=R0|mult=7|fsb=800|l2=3 |vmin=1.05 |vmax=1.15|tdp=5.5|date=Q2 2009|part1=AV80585UG0173M|price=$262}}
{{end}}

==== "Penryn" (Apple iMac specific, 45 nm) ====

* [[Die (integrated circuit)|Die]] size: 107&nbsp;mm<sup>2</sup>
* The 2008 20" iMac used the E8135 and E8335 CPUs at a lower than specified clock frequency, explaining why the same model is used at different frequencies. This list shows the frequencies used by Apple.
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|C0, E0]]
{{cpulist|core|head}}
{{cpulist|core|penryn|model=Core 2 Duo E8135|fsb=1066|l2=6|mult=9|tdp=44|sock=[[Socket P]]|date=April 2008|
 sspec1=SLAQA|step1=C0|part1=FF80576E8135|part2=FF80576GH0676M|links=1}}
{{cpulist|core|penryn|model=Core 2 Duo E8135|fsb=1066|l2=6|mult=10|tdp=44|sock=Socket P|date=March 2009|
 sspec1=SLG8W|step1=E0|part1=AW80576GH0676M|part2=AW80576E8135}}
{{cpulist|core|penryn|model=Core 2 Duo E8135|fsb=1066|l2=6|mult=10|tdp=35|sock=Socket P|date=March 2009|
 sspec1=SLGED|step1=E0|part1=AW80576GH0676M}}
{{cpulist|core|penryn|model=Core 2 Duo E8235|fsb=1066|l2=6|mult=10.5|tdp=44|sock=Socket P|date=April 2008|
 sspec1=SLAQB|step1=C0|part1=FF80576GH0726M}}
{{cpulist|core|penryn|model=Core 2 Duo E8335|fsb=1066|l2=6|mult=11|tdp=44|sock=Socket P|date=April 2008|
 sspec1=SLAQC|step1=C0|part1=FF80576GH0776M}}
{{cpulist|core|penryn|model=Core 2 Duo E8335|fsb=1066|l2=6|mult=11 |vmin=1.0500 |vmax=1.2250|tdp=35|sock=Socket P|date=March 2009|
 sspec1=SLGEB|step1=E0|part1=AW80576GH0776M}}
{{cpulist|core|penryn|model=Core 2 Duo E8435|fsb=1066|l2=6|mult=11.5 |vmin=1.0500 |vmax=1.2375|tdp=55|sock=Socket P|date=April 2008|
 sspec1=SLAQD|step1=C0|part1=FF80576GH0836M}}
{{cpulist|core|penryn|model=Core 2 Duo E8435|fsb=1066|l2=6|mult=11.5|tdp=44|sock=Socket P|date=March 2009|
 sspec1=SLGEA|step1=E0|part1=AW80576GH0836M}}
{{end}}

==== "Penryn", "Penryn-3M" (standard-voltage, 45 nm) <span class="anchor" id="&quot;Penryn-2M&quot; (standard-voltage, 45 nm)"></span><span class="anchor" id="&quot;Penryn-3M&quot; (standard-voltage, 45 nm)"></span><span class="anchor" id="&quot;Penryn&quot; (standard-voltage, 45 nm)"></span><!-- Penryn-2M really does not exist --> ====

*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), Intel Dynamic Acceleration (IDA)''<ref name="T6xxx">{{cite web |url=http://ark.intel.com/cpu.aspx?groupID=40479&code=t6400 |publisher=Intel Corporation |access-date=February 6, 2009 |title=Intel Core2 Duo Processor T6400 (2M Cache, 2.00&nbsp;GHz, 800&nbsp;MHz FSB) |url-status=dead |archive-url=https://web.archive.org/web/20090212072827/http://ark.intel.com/cpu.aspx?groupID=40479&code=t6400 |archive-date=February 12, 2009 }}</ref>
* T6570,<ref name="T6570">{{cite web |url=http://ark.intel.com/Product.aspx?id=42841 |publisher=Intel Corporation |access-date=March 20, 2010 |title=Intel Core2 Duo Processor T6570 (2M Cache, 2.10&nbsp;GHz, 800&nbsp;MHz FSB) |archive-date=July 4, 2011 |archive-url=https://web.archive.org/web/20110704160259/http://ark.intel.com/Product.aspx?id=42841 |url-status=live }}</ref> T6670, all T8xxx and T9xxx models support [[Intel VT-x]]
* All T9xxx models support [[Trusted Execution Technology]] (TXT)
* T6xxx models are Penryn-3M processors with 1&nbsp;MB L2 cache disabled.
Note that models T8100, T8300, T9300, T9500 are Penryn processors designed for Santa Rosa Refresh platforms with maximum FSB of 800 MT/s, whereas the rest of the Penryn processors are designed for Montevina platforms that can go up to maximum FSB of 1066 MT/s.

Penryn processors support Dynamic Front Side Bus Throttling between 400–800MT/s.
* [[Die (integrated circuit)|Die]] size: 107&nbsp;mm<sup>2</sup> (Penryn), 82&nbsp;mm<sup>2</sup> (Penryn-3M)
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|C0, E0]] (Penryn) [[Intel Core (microarchitecture)#Steppings using 45nm process|M0, R0]] (Penryn-3M)<ref name="T6xxx" />
{{cpulist|core|head}}
{{cpulist|core|penryn|model=Core 2 Duo T6400|ark=40479
 |l2=2|fsb=800 |mult=10 |vmin=1.00 |vmax=1.250 |tdp=35 |sock1=[[Socket P]] |date=January 2009 |price=OEM |links=1
 |sspec1=SLGJ4|step1=R0 |part1=AW80577GG0412MA}}
{{cpulist|core|penryn|model=Core 2 Duo T6500|ark=39311
 |l2=2|fsb=800 |mult=10.5 |vmin=1.00 |vmax=1.250 |tdp=35 |sock=Socket P |date=January 2009 |price=OEM
 |sspec1=SLGF4|step1=R0 |part1=AW80577GG0452ML
 |part2=AW80577GG0452MA}}
{{cpulist|core|penryn|model=Core 2 Duo T6570|ark=42841
 |l2=2|fsb=800 |mult=10.5 |vmin=1.00 |vmax=1.250 |tdp=35 |sock=Socket P |date=Q3 2009 |price=OEM
 |sspec1=SLGLL|step1=R0 |part1=AW80577GG0452MH}}
{{cpulist|core|penryn|model=Core 2 Duo T6600|ark=37255
 |l2=2|fsb=800 |mult=11 |vmin=1.00 |vmax=1.250 |tdp=35 |sock=Socket P |date=January 2009 |price=OEM
 |sspec1=SLGJ9|step1=R0 |part1=AW80577GG0492MA
 |sspec2=SLGF5|step2=R0 |part2=AW80577GG0492ML}}
{{cpulist|core|penryn|model=Core 2 Duo T6670|ark=42109
 |l2=2|fsb=800 |mult=11 |vmin=1.00 |vmax=1.250 |tdp=35 |sock=Socket P |date=Q3 2009 |price=OEM
 |sspec1=SLGLK|step1=R0|part1=AW80577GG0492MH
 |sspec2=SLGLJ|step2=R0}}
{{cpulist|core|penryn|model=Core 2 Duo T6900|ark=
 |l2=2|fsb=800 |mult=12.5 |vmin=1.00 |vmax=1.250 |tdp=35 |sock=Socket P |date=?|price=OEM
 |sspec1=SLGHZ|step1=?|part1=AW80577GG0602MA}}
{{cpulist|core|penryn|model=Core 2 Duo T6970|ark=
 |l2=2|fsb=800 |mult=12.5 |vmin=1.00 |vmax=1.250 |tdp=35 |sock=Socket P |date=?|price=OEM
 |sspec1=SLGLJ|step1=R0|part1=AW80577GG0602MH}}
{{cpulist|core|penryn|model=Core 2 Duo T8100|ark=33916
 |l2=3|fsb=800 |mult=10.5 |vmin=1.000 |vmax=1.250 |tdp=35 |sock=Socket P |date=January 2008 |price=$209
 |sspec1=SLAP9|step1=M0 |part1=FF80577GG0453M (M0)
 |sspec2=SLAVJ|step2=M0 |part2=FF80577GG0453MN
 |sspec3=SLAYP|step3=M0
 |sspec4=SLAYZ|step4=C0 |part3=FF80576GG0453M (C0)
 |sspec5=SLAUU|step5=C0 |part4=BX80577T8100}}
{{cpulist|core|penryn|model=Core 2 Duo T8100|ark=33916
 |l2=3|fsb=800 |mult=10.5 |vmin=1.000 |vmax=1.250 |tdp=35 |sock=FCBGA6 |date=January 2008 |price=$209
 |sspec1=SLAPS|step1=M0|part1=EC80577GG0453M (M0)
 |sspec2=SLAXG|step2=M0
 |sspec3=SLAPT|step3=C0|part3=EC80576GG0453M (C0)
 |sspec4=SLAZD|step4=C0}}
{{cpulist|core|penryn|model=Core 2 Duo T8300|ark=33099
 |l2=3|fsb=800 |mult=12 |vmin=1.00 |vmax=1.250 |tdp=35 |sock=Socket P |date=January 2008 |price=$241
 |sspec1=SLAPA|step1=M0|part1=FF80577GG0563M
 |sspec2=SLAYQ|step2=M0 |part2=BX80577T8300}}
{{cpulist|core|penryn|model=Core 2 Duo T8300|ark=33099
 |l2=3|fsb=800 |mult=12 |vmin=1.00 |vmax=1.250 |tdp=35 |sock=FCBGA6 |date=January 2008 |price=$241
 |sspec1=SLAPR|step1=M0|part1=EC80577GG0563M (M0)
 |sspec2=SLAPU|step2=C0|part2=EC80576GG0563M (C0)
 |sspec3=SLAZC|step3=C0}}
{{cpulist|core|penryn|model=Core 2 Duo T9300|ark=33917
 |l2=6|fsb=800 |mult=12.5 |vmin=1.000 |vmax=1.250 |tdp=35 |sock=Socket P |date=January 2008 |price=$316
 |sspec1=SLAQG|step1=C0|part1=FF80576GG0606M
 |sspec2=SLAYY|step2=C0}}
{{cpulist|core|penryn|model=Core 2 Duo T9300|ark=33917
 |l2=6|fsb=800 |mult=12.5 |vmin=1.000 |vmax=1.250 |tdp=35 |sock=FCBGA6 |date=January 2008 |price=$316
 |sspec1=SLAPV|step1=C0|part1=EC80576GG0606M
 |sspec2=SLAZB|step2=C0}}
{{cpulist|core|penryn|model=Core 2 Duo T9400|ark=35562
 |l2=6|fsb=1066|mult= 9.5 |vmin=1.050 |vmax=1.162 |tdp=35 |sock=Socket P |date=July 2008 |price=$316
 |sspec1=SLB46|step1=C0|part1=AW80576GH0616M
 |sspec2=SLB4D|step2=C0
 |sspec3=SLGE5|step3=E0}}
{{cpulist|core|penryn|model=Core 2 Duo T9400|ark=35562
 |l2=6|fsb=1066|mult= 9.5 |vmin=1.050 |vmax=1.162 |tdp=35 |sock=FCBGA6 |date=July 2008 |price=$316
 |sspec1=SL3BX|step1=C0|part1=AV80576GH0616M
 |sspec2=SLGEK|step2=E0}}
{{cpulist|core|penryn|model=Core 2 Duo T9500|ark=33918
 |l2=6|fsb=800 |mult=13 |vmin=1.000 |vmax=1.250 |tdp=35 |sock=Socket P |date=January 2008 |price=$530
 |sspec1=SLAQH|step1=C0|part1=FF80576GG0646M
 |sspec2=SLAYX|step2=C0}}
{{cpulist|core|penryn|model=Core 2 Duo T9500|ark=33918
 |l2=6|fsb=800 |mult=13 |vmin=1.000 |vmax=1.250 |tdp=35 |sock=FCBGA6 |date=January 2008 |price=$530
 |sspec1=SLAPW|step1=C0|part1=EC80576GG0646M
 |sspec2=SLAZA|step2=C0
 |sspec3=SLB49|step3=C0
 |sspec4=SLB4A|step4=C0
 |sspecs=<br />SLB4B (C0)<br />SLB3BW (C0)|part2=AV80576SH0616M}}
{{cpulist|core|penryn|model=Core 2 Duo T9550|ark=37130
 |l2=6|fsb=1066|mult=10 |vmin=1.050 |vmax=1.212 |tdp=35 |sock=Socket P |date=December 2008 |price=$316
 |sspec1=SLGE4|step1=E0|part1=AW80576GH0676MG}}
{{cpulist|core|penryn|model=Core 2 Duo T9550|ark=37130
 |l2=6|fsb=1066|mult=10 |vmin=1.050 |vmax=1.212 |tdp=35 |sock=FCBGA6 |date=December 2008 |price=$316
 |sspec1=SLGEL|step1=E0|part1=AV80576GH0676MG}}
{{cpulist|core|penryn|model=Core 2 Duo T9600|ark=35563
 |l2=6|fsb=1066|mult=10.5 |vmin=1.050 |vmax=1.162 |tdp=35 |sock=Socket P |date=July 2008 |price=$530
 |sspec1=SLB47|step1=C0|part1=AW80576GH0726M
 |sspec2=SLG8N|step2=C0
 |sspec3=SLG9F|step3=E0}}
{{cpulist|core|penryn|model=Core 2 Duo T9600|ark=35563
 |l2=6|fsb=1066|mult=10.5 |vmin=1.050 |vmax=1.162 |tdp=35 |sock=FCBGA6 |date=July 2008 |price=$530
 |sspec1=SLB43|step1=C0|part1=AV80576GH0726M
 |sspec2=SLGEM|step2=E0}}
{{cpulist|core|penryn|model=Core 2 Duo T9800|ark=37005
 |l2=6|fsb=1066|mult=11 |vmin=1.050 |vmax=1.212 |tdp=35 |sock=Socket P |date=December 2008 |price=$530
 |sspec1=SLGES|step1=E0|part1=AW80576GH0776MG}}
{{cpulist|core|penryn|model=Core 2 Duo T9800|ark=37005
 |l2=6|fsb=1066|mult=11 |vmin=1.050 |vmax=1.212 |tdp=35 |sock=FCBGA6 |date=December 2008 |price=$530
 |sspec1=SLGEP|step1=E0|part1=AV80576GH0776MG}}
{{cpulist|core|penryn|model=Core 2 Duo T9900|ark=39312
 |l2=6|fsb=1066|mult=11.5 |vmin=1.050 |vmax=1.2125|tdp=35 |sock=Socket P |date=April 2009 |price=$530
 |sspec1=SLGEE|step1=E0|part1=AW80576GH0836MG}}
{{cpulist|core|penryn|model=Core 2 Duo T9900|ark=39312
 |l2=6|fsb=1066|mult=11.5 |vmin=1.050 |vmax=1.2125|tdp=35 |sock=FCBGA6 |date=April 2009 |price=$530
 |sspec1=SLGKH|step1=E0|part1=AV80576GH0836MG}}
{{end}}

==== "Penryn", "Penryn-3M" (medium-voltage, 45 nm) <span class="anchor" id="&quot;Penryn&quot; (medium-voltage, 45 nm)"></span><span class="anchor" id="&quot;Penryn-3M&quot; (medium-voltage, 45 nm)"></span> ====

* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]] (except the non-Mac P7350, P7450),<ref name="P7350">{{cite web |url=http://processorfinder.intel.com/details.aspx?sSpec=SLB53 |title=Intel® Core™2 Duo Mobile Processor P7350 – SLB53 |access-date=2009-02-09 |archive-url=https://web.archive.org/web/20090205000256/http://processorfinder.intel.com/details.aspx?sSpec=SLB53 |archive-date=2009-02-05 |url-status=dead }}</ref><ref name="P7450">{{cite web |url=http://processorfinder.intel.com/Details.aspx?sSpec=SLB54 |title=Intel® Core™2 Duo Mobile Processor P7450 – SLB54 |access-date=2009-05-02 |archive-url=https://web.archive.org/web/20090516173831/http://processorfinder.intel.com/details.aspx?sSpec=SLB54 |archive-date=2009-05-16 |url-status=dead }}</ref><ref name="P7550">{{cite web|url=https://ark.intel.com/content/www/us/en/ark.html|title=Intel product specifications|website=ark.intel.com|access-date=June 26, 2019|archive-date=July 4, 2011|archive-url=https://web.archive.org/web/20110704232233/http://ark.intel.com/Product.aspx?id=42915&processor=i5-750&spec-codes=SLBLC|url-status=live}}</ref> [[Trusted Execution Technology]] (TXT), Intel Dynamic Acceleration (IDA)''
* Select [[Apple Inc.|Apple]] subsets of P7000 series processors support Intel VT-x.<ref>{{cite web |author=Eric Tung |title=Re: Does VMware Fusion require a CPU supporting Intel VT-x? |url=http://communities.vmware.com/thread/199449#1198447 |access-date=April 18, 2009 |date=March 13, 2009 |archive-date=July 19, 2009 |archive-url=https://web.archive.org/web/20090719145012/http://communities.vmware.com/thread/199449#1198447 |url-status=live }}</ref>
* Penryn and Penryn-3M processors support Dynamic Front Side Bus Throttling between 533–1066MT/s.
* [[Die (integrated circuit)|Die]] size: 107&nbsp;mm<sup>2</sup> (Penryn), 82&nbsp;mm<sup>2</sup> (Penryn-3M)
* Package size: 35&nbsp;mm × 35&nbsp;mm
* Transistors: 410 million <ref name="Techarp20151218">{{cite web|publisher=Techarp.com|title=Tech ARP – Mobile CPU Comparison Guide Rev. 12.3|url=http://www.techarp.com/showarticle.aspx?artno=347&pgno=8|access-date=Dec 18, 2015|archive-date=September 10, 2015|archive-url=https://web.archive.org/web/20150910082804/http://www.techarp.com/showarticle.aspx?artno=347&pgno=8|url-status=live}}</ref>
* [[Stepping level|Steppings]]: ([[Intel Core (microarchitecture)#Steppings using 45nm process|Core microarchitecture 45nm steppings]])
**[[Intel Core (microarchitecture)#Steppings using 45nm process|C0, E0]] (Penryn)
**[[Intel Core (microarchitecture)#Steppings using 45nm process|M0, R0]] (Penryn-3M)
**stepping C0/M0 is only used in the Intel Mobile 965 Express ([[Centrino#Santa Rosa platform (2007)|Santa Rosa refresh]]) platform
**stepping E0/R0 adds two new instructions (XSAVE/XRSTOR) and supports the later Intel Mobile 4 Express ([[Centrino#Montevina platform (2008)|Montevina]]) platform
{{cpulist|core|head}}
{{cpulist|core|penryn|ark=36750|model=Core 2 Duo P7350 |sspec1=SLB44 |step1=C0 |sspec2=SLB53 |step2=M0 |freq=2000 |l2=3 |fsb=1066 |mult=7.5 |vmin=1.00 |vmax=1.250 |tdp=25 |sock=Socket P |date=Mid 2008 |part1=AW80576GH0413M |part2=AW80577SH0413M |price=OEM |links=1}}
{{cpulist|core|penryn|ark=36750|model=Core 2 Duo P7350 |sspec1=SLG8E |step1=C0 |sspec2=SLGE3 |step2=R0 |freq=2000 |l2=3 |fsb=1066 |mult=7.5 |vmin=1.00 |vmax=1.250 |tdp=25 |sock=FC-BGA478 |date=Mid 2008 |price=OEM |links=1}}
{{cpulist|core|penryn|ark=37117|model=Core 2 Duo P7370 |2000&nbsp;MHz |l2=3 |fsb=1066 |mult=7.5 |vmin=1.00 |vmax=1.250 |tdp=25 |Socket P |date=January 2009 |price=OEM|
 part1=AW80577SH0413M |sspec1=SLG8X |step1=R0 |sspec2=SLGF9 |step2=R0 |part2=AW80577SH0413ML}}
{{cpulist|core|penryn|ark=36734|model=Core 2 Duo P7450 |2133&nbsp;MHz |l2=3 |fsb=1066 |mult=8 |vmin=1.00 |vmax=1.250 |tdp=25 |sock=Socket P |date=January 2009 |price=OEM|
 sspec1=SLB45 |step1=C0 |sspec2=SLGF7 |step2=R0 |sspec3=SLB54 |step3=M0 |sspec4=SLB56 |step4=M0 |part1=AW80577SH0463M |part2=AW80576GH0463M (C0)}}
{{cpulist|core|penryn|ark=36734|model=Core 2 Duo P7450 |2133&nbsp;MHz |l2=3 |fsb=1066 |mult=8 |vmin=1.00 |vmax=1.250 |tdp=25 |sock=FC-BGA478 |date=January 2009 |price=OEM|
 sspec2=SLGFF |step2=C0 |part2=AW80577P7450M (C0)}}
{{cpulist|core|penryn|ark=42014|model=Core 2 Duo P7550 |2266&nbsp;MHz |l2=3 |fsb=1066 |mult=8.5 |vmin=1.00 |vmax=1.250 |tdp=25 |sock=Socket P |date=June 2009 |price=OEM|
 sspec1=SLGF8 |step1=R0 |part1=AW80577SH0513MA}}
{{cpulist|core|penryn|ark=42167|model=Core 2 Duo P7570 |2266&nbsp;MHz |l2=3 |fsb=1066 |mult=8.5 |vmin=1.00 |vmax=1.250 |tdp=25 |sock=Socket P |date=Q3 2009 |price=OEM|
 sspec1=SLGLW |step1=R0 |part1=AW80577SH0513ML}}
{{cpulist|core|penryn|ark=35569|model=Core 2 Duo P8400 |2266&nbsp;MHz |l2=3 |fsb=1066 |mult=8.5 |vmin=1.00 |vmax=1.250 |tdp=25 |sock=Socket P |date=June 13, 2008<ref>{{cite web|url=http://www.hardware.info/en-US/productdb/bGRkapiUmJjKY8g/viewproduct/Intel_Core_2_Duo_P8400/|title=[ Hardware.Info ] – Intel Core 2 Duo P8400 [BX80577P8400]|date=September 2, 2008|access-date=June 26, 2019|archive-url=https://web.archive.org/web/20080902235441/http://www.hardware.info/en-US/productdb/bGRkapiUmJjKY8g/viewproduct/Intel_Core_2_Duo_P8400/|archive-date=2008-09-02}}</ref> |price=$209|
 sspec1=SLB3R |step1=M0 |sspec2=SLB3Q |step2=M0 |sspec3=SLB52 |step3=M0 |sspec=
* SLG8Z&nbsp;(M0)
* SLGCC&nbsp;(R0)
* SLGCQ&nbsp;(R0)
* SLGCF&nbsp;(R0)
* SLGFC&nbsp;(R0)
* SLGCL&nbsp;(R0)
|part1=AW80577SH0513M|part2=AW80577SH0513MN|part3=BX80577P8400}}
{{cpulist|core|penryn|ark=35569|model=Core 2 Duo P8400 |2266&nbsp;MHz |l2=3 |fsb=1066 |mult=8.5 |vmin=1.00 |vmax=1.250 |tdp=25 |sock=FC-BGA478 |date=June 2008 |price=$209 |
 sspec1=SLB4M|step1=M0|part1=AV80577SH0513M}}
{{cpulist|core|penryn|ark=35568|model=Core 2 Duo P8600 |2400&nbsp;MHz |l2=3 |fsb=1066 |mult=9 |vmin=1.00 |vmax=1.250 |tdp=25 |date=June 2008<ref>{{cite web|url=http://www.hardware.info/en-US/productdb/bGRkapiUmJjKZMg/viewproductprices/Intel_Core_2_Duo_P8600_BX80577P8600|title=[ Hardware.Info ] – Intel Core 2 Duo P8600 [BX80577P8600]|date=February 8, 2009|access-date=June 26, 2019|archive-url=https://web.archive.org/web/20090208032055/http://www.hardware.info/en-US/productdb/bGRkapiUmJjKZMg/viewproductprices/Intel_Core_2_Duo_P8600_BX80577P8600|archive-date=2009-02-08}}</ref> |price=$241 |
 sspec1=SLB3S |step1=M0 |sspec2=SLGA4 |step2=M0 |sspec3=SLGFD |step3=R0 |part1=AW80577SH0563M|part2=BX80577P8600}}
{{cpulist|core|penryn|ark=35568|model=Core 2 Duo P8600 |2400&nbsp;MHz |l2=3 |fsb=1066 |mult=9 |vmin=1.00 |vmax=1.250 |tdp=25 |date=June 2008 |price=$241 |
 sspec1=SLB4N |step1=M0|sspec2=SLGDZ |step2=R0 |sock=FC-BGA478 |part1=AV80577SH0563M}}
{{cpulist|core|penryn|ark=37006|model=Core 2 Duo P8700 |2533&nbsp;MHz |l2=3 |fsb=1066 |mult=9.5 |vmin=1.00 |vmax=1.250 |tdp=25 |sock=Socket P |date=December 2008 |price=$241|
 sspec1=SLGFE |step1=R0 |part1=AW80577SH0613MG |part2=BX80577P8700}}
{{cpulist|core|penryn|ark=37006|model=Core 2 Duo P8700 |2533&nbsp;MHz |l2=3 |fsb=1066 |mult=9.5 |vmin=1.00 |vmax=1.250 |tdp=25 |sock=FC-BGA478 |date=December 2008 |price=$241|
 sspec1=SLGFG |step1=R0 |part1=AV80577SH0613MG}}
{{cpulist|core|penryn|ark=40380|model=Core 2 Duo P8800 |2667&nbsp;MHz |l2=3 |fsb=1066 |mult=10 |vmin=1.00 |vmax=1.250 |tdp=25 |sock=Socket P |date=Q2 2009 |price=$241|
 sspec1=SLGLR |step1=R0 |part1=AW80577SH0673MG |part2=BX80577P8800}}
{{cpulist|core|penryn|ark=40380|model=Core 2 Duo P8800 |2667&nbsp;MHz |l2=3 |fsb=1066 |mult=10 |vmin=1.00 |vmax=1.250 |tdp=25 |sock=FC-BGA478 |date=Q2 2009 |price=$241|
 sspec1=SLGLA |step1=E0 |part1=AV80577SH0673MG}}
{{cpulist|core|penryn|ark=35566|model=Core 2 Duo P9500 |2533&nbsp;MHz |l2=6 |fsb=1066 |mult=9.5 |vmin=1.05 |vmax=1.162 |tdp=25 |sock=Socket P |date=July 2008|price=$348|
 sspec1=SLB4E |step1=C0 |sspec2=SLGE8|step2=E0|part1=AW80576SH0616M |part2=AV80576SH0616M}}
{{cpulist|core|penryn|ark=37266|model=Core 2 Duo P9600 |2667&nbsp;MHz |l2=6 |fsb=1066 |mult=10 |vmin=1.05 |vmax=1.212 |tdp=25 |sock=Socket P |date=December 2008 |price=$348|
 sspec1=SLGE6 |step1=E0 |part1=AW80576SH0676MG}}
{{cpulist|core|penryn|ark=42599|model=Core 2 Duo P9700 |2800&nbsp;MHz |l2=6 |fsb=1066 |mult=10.5 |vmin=1.012 |vmax=1.175 |tdp=28 |sock=Socket P |date=June 2009 |price=$348|
 sspec1=SLGQS |step1=E0 |part1=AW80576SH0726MG}}
{{end}}

==== "Penryn" (medium-voltage, 45 nm, Small Form Factor) ====

* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]], [[Trusted Execution Technology]] (TXT), Intel Dynamic Acceleration (IDA)''
* [[Die (integrated circuit)|Die]] size: 107&nbsp;mm<sup>2</sup>
* Package size: 22&nbsp;mm × 22&nbsp;mm
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|C0]], [[Intel Core (microarchitecture)#Steppings using 45nm process|E0]]
{{cpulist|core|head}}
{{cpulist|core|penrynulv|ark=36691|model=Core 2 Duo SP9300|sspec1=SLB63|step1=C0|<!--sspec2=SLGAF|step2=E0|-->freq=2266|l2=6|fsb=1066|mult=8.5 |vmin=0.900 |vmax=1.225|tdp=25|date=July 2008|part1=AV80576SH0516M|price=$284|links=1}}
{{cpulist|core|penrynulv|ark=36693|model=Core 2 Duo SP9400|sspec1=SLB64|step1=C0|sspec2=SLGHG|step2=C0|freq=2400|l2=6|fsb=1066|mult=9 |vmin=0.900 |vmax=1.225|tdp=25|date=July 2008|part1=AV80576SH0566M|price=$284|sspec3=SLGAA|step3=E0}}
{{cpulist|core|penrynulv|ark=37260|model=Core 2 Duo SP9600|<!--sspec1=SLGER|step1=C0|-->sspec2=SLGER|step2=E0|freq=2533|l2=6|fsb=1066|mult=9.5 |vmin=0.900 |vmax=1.225|tdp=25|date=Q1 2009|part1=AV80576SH0516M|part2=AV80576SH0616M|price=$316}}
{{end}}

==== "Penryn" (low-voltage, 45 nm, Small Form Factor) ====

* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]], [[Trusted Execution Technology]] (TXT), Intel Dynamic Acceleration (IDA)''
* [[Die (integrated circuit)|Die]] size: 107&nbsp;mm<sup>2</sup>
* Package size: 22&nbsp;mm × 22&nbsp;mm
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|C0]], [[Intel Core (microarchitecture)#Steppings using 45nm process|E0]]
{{cpulist|core|head}}
{{cpulist|core|penrynulv|ark=36686|model=Core 2 Duo SL9300|l2=6|fsb=1066|mult=6 |vmin=1.050 |vmax=1.150|tdp=17|date=September 2008|price=$284|
 sspec1=SLB65|step1=C0|sspec2=SLGHC|step2=C0|sspec3=SLGAG|step3=E0|part1=AV80576LH0256M|links=1}}
{{cpulist|core|penrynulv|ark=37210|model=Core 2 Duo SL9380|l2=6|fsb=800 |mult=9 |vmin=1.050 |vmax=1.150|tdp=17|date=September 2008|price=$316|
 sspec1=SLGA2|step1=C0|sspec2=SLGAD|step2=E0|part1=AV80576LG0336M}}
{{cpulist|core|penrynulv|ark=36689|model=Core 2 Duo SL9400|l2=6|fsb=1066|mult=7 |vmin=1.050 |vmax=1.150|tdp=17|date=September 2008|price=$316|
 sspec1=SLB66|step1=C0|sspec2=SLGHD|step2=C0|sspec3=SLGAB|step3=E0|part1=AV80576LH0366M}}
{{cpulist|core|penrynulv|ark=37262|model=Core 2 Duo SL9600|l2=6|fsb=1066|mult=8 |vmin=1.050 |vmax=1.150|tdp=17|date=Q1'09 |price=$316|
 sspec1=SLGEQ|step1=E0|part1=AV80576LH0466M}}
{{end}}

==== "Penryn-3M" (ultra-low-voltage, 45 nm, Small Form Factor) ====

* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]], [[Trusted Execution Technology]] (TXT) (except SU7300), Intel Dynamic Acceleration (IDA)''
* [[Die (integrated circuit)|Die]] size: 107&nbsp;mm<sup>2</sup>
* Package size: 22&nbsp;mm × 22&nbsp;mm
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|M0]], [[Intel Core (microarchitecture)#Steppings using 45nm process|R0]]
{{cpulist|core|head}}
{{cpulist|core|penrynulv|ark=42791|model=Core 2 Duo SU7300|l2=3|mult=6.5|date=September 2009|fsb=800|price=$289 |vmin=1.05 |vmax=1.15|links=1
 |sspec1=SLGS6|step1=R0|sspec2=SLGYV|step2=R0|part1=AV80577UG0133M|part2=AV80577UG0133ML}}
<!--{{cpulist|core|penrynulv|model=Core 2 Duo SU7800|l2=3|mult=7 |date=September 2009|fsb=800|price=$289
 |part1=AV80577UG0173M|sspec1=SLGS5|step1=R0}}-->
{{cpulist|core|penrynulv|ark=36695|model=Core 2 Duo SU9300|l2=3|mult=6 |date=September 2008|fsb=800|price=$262 |vmin=1.05 |vmax=1.15
 |part1=AV80577UG0093M|sspec1=SLB5Q|step1=M0|sspec2=SLGAL|step2=R0}}
{{cpulist|core|penrynulv|ark=36697|model=Core 2 Duo SU9400|l2=3|mult=7 |date=September 2008|fsb=800|price=$289 |vmin=1.05 |vmax=1.15
 |part1=AV80577UG0173M|sspec1=SLB5V|step1=M0|sspec2=SLGHN|step2=M0|sspec3=SLGAK|step3=R0}}
{{cpulist|core|penrynulv|ark=37264|model=Core 2 Duo SU9600|l2=3|mult=8 |date=Q1 2009 |fsb=800|price=$289 |vmin=1.05 |vmax=1.15
 |part1=AV80577UG0253M|sspec1=SLGEX|step1=R0|sspec2=SLGFN|step2=R0}}
{{end}}

==== "Penryn XE" (45 nm) <span class="anchor" id="&quot;Penryn XE&quot; (standard-voltage, 45 nm)"></span> ====

*These models feature an [[CPU locking|unlocked]] [[clock multiplier]]
*All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]], [[Trusted Execution Technology]] (TXT)''
* Penryn XE processors support Dynamic Front Side Bus Throttling between 400–800 MT/s and 533–1066 MT/s.
* [[Die (integrated circuit)|Die]] size: 107&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|C0, E0]]
{{cpulist|core|head}}
{{cpulist|core|penryn|ark=34443|model=Core 2 Extreme X9000|sspec1=SLAQJ|step1=C0|sspec2=SLAZ3|step2=C0|l2=6|fsb=800|mult=14 |vmin=1.062 |vmax=1.150|tdp=44|date=January 2008|part1=FF80576ZG0726M|price=$851|links=1}}
{{cpulist|core|penryn|ark=35431|model=Core 2 Extreme X9100|sspec1=SLB48|step1=C0|sspec2=SLG8M|step2=C0|sspec3=SLGE7|step3=E0|l2=6|fsb=1066|mult=11.5 |vmin=1.062 |vmax=1.150|tdp=44|date=July 2008|part1=AW80576GH0836M|price=$851}}
{{end}}

==== "Penryn QC" (45 nm) <span class="anchor" id="&quot;Penryn QC&quot; (standard-voltage, 45 nm)"></span> ====

* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]], [[Trusted Execution Technology]] (TXT)''
* Can throttle the [[front-side bus]] (FSB) anywhere between 533 and 1066 MT/s as needed.
* [[Die (integrated circuit)|Die]] size: 2 × 107&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|E0]]
{{cpulist|core|head}}
{{cpulist|core|penrynqc|ark=40480|model=Core 2 Quad Q9000|sspec1=SLGEJ|step1=E0|freq=2.00|l2=2 × 3 MB|fsb=1066|mult=7.5 |vmin=1.050 |vmax=1.175|tdp=45|sock=P|date=December 2008|part1=AW80581GH0416M|part2=BX80581Q9000|price=$348|links=1|cores=4}}
{{cpulist|core|penrynqc|ark=37033|model=Core 2 Quad Q9100|sspec1=SLB5G|step1=E0|freq=2.26|l2=2 × 6 MB|fsb=1066|mult=8.5 |vmin=1.050 |vmax=1.175|tdp=45|sock=P|date=August 2008|part1=AW80581GH051003|price=$851|cores=4}}
{{end}}

==== "Penryn QC XE" (45 nm) <span class="anchor" id="&quot;Penryn QC XE&quot; (standard-voltage, 45 nm)"></span> ====

* This model features an [[CPU locking|unlocked]] [[clock multiplier]] usually manipulated through the systems BIOS however some manufacturers (such as [[Hewlett-Packard|HP]]) do not have this feature enabled on their laptops that use this processor.
* All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSSE3]], [[SSE4]].1, Enhanced Intel [[SpeedStep]] Technology (EIST), [[Intel 64]], XD bit (an [[NX bit]] implementation), [[Intel Active Management Technology]] (iAMT2), [[Intel VT-x]], [[Trusted Execution Technology]] (TXT)''
* Can throttle the [[front-side bus]] (FSB) anywhere between 533 and 1066 MT/s as needed.
* Package size: 35&nbsp;mm × 35&nbsp;mm
* [[Die (integrated circuit)|Die]] size: 2 × 107&nbsp;mm<sup>2</sup>
* [[Stepping level|Steppings]]: [[Intel Core (microarchitecture)#Steppings using 45nm process|E0]]
{{cpulist|core|head}}
{{cpulist|core|penrynqc|ark=36727|model=Core 2 Extreme QX9300|sspec1=SLB5J|step1=E0|freq=2533|l2=2 × 6 [[Mebibyte|MiB]]||fsb=1066|mult=9.5 |vmin=1.050 |vmax=1.175|tdp=45|sock=P|date=August 2008|part1=AW80581ZH061003|price=$1038|links=1|cores=4}}
<!--
{{cpulist|core|penrynqc||model=Core 2 Extreme QX9400|sspec1=SLB5K|step1=E0|freq=2667|l2=2 × 6 MiB||fsb=1066|mult=10 |vmin=1.050 |vmax=1.175|tdp=45|sock=P|date=|part1=AW80581ZH067003|price=}} -->
{{end}}

=== Core i (1st gen) ===

==== Clarksfield<span class="anchor" id="&quot;Clarksfield&quot; (45 nm)"></span> ====

Common features:
* Socket: [[Socket G1|G1]].
* All the CPUs support dual-channel [[DDR3]]-1333 RAM.
* All CPU models provide 16 lanes of [[PCIe 2.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 1.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[45 nm process|45&nbsp;nm]].
* XM-suffix processors have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan=6 | Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/43127.html 940XM]
| rowspan=6 | 4 (8)
| 2.13
| 3.33
| rowspan=4 | 8&nbsp;MB
| rowspan=2 | 55&nbsp;W
| {{dts|2010|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/43126.html 920XM]
| 2.00
| rowspan=2 | 3.20
| {{dts|2009|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/43125.html 840QM]
| 1.86
| rowspan=4 | 45&nbsp;W
| {{dts|2010|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/43124.html 820QM]
| rowspan=2 | 1.73
| 3.06
| {{dts|2009|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/49024.html 740QM]
| 2.93
| rowspan=2 | 6&nbsp;MB
| {{dts|2010|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/43122.html 720QM]
| 1.60
| 2.80
| {{dts|2009|September|format=mdy|abbr=off}}
|}

==== Arrandale<span class="anchor" id="&quot;Arrandale&quot; (MCP, 32 nm)"></span> ====

Common features:
* Socket: All models (except i3-380M) are available in BGA-1288; M-suffix (excluding UM- and LM-suffix) models are also available as [[Socket G1]].
* All the CPUs support dual-channel [[DDR3]] RAM. All models support it at 800&nbsp;MT/s speeds while M- and LM-suffix models support up to 1066&nbsp;MT/s speeds.
* All CPU models provide 16 lanes of [[PCIe 2.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 1.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[32 nm process|32&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="9" | Core i7
! style="text-align:left;" data-sort-value="sku29" | [https://ark.intel.com/content/www/us/en/ark/products/49664.html 680UM]
| rowspan="29" | 2 (4)
| 1.46
| 2.53
| rowspan="29" | [[Intel Graphics Technology#Westmere|HD Graphics]]
| 166–500
| rowspan="9" | 4&nbsp;MB
| 18&nbsp;W
| rowspan="2" | {{dts|2010|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku28" | [https://ark.intel.com/content/www/us/en/ark/products/49654.html 660LM]
|2.26
|3.06
|266–566
|25&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku27" | [https://ark.intel.com/content/www/us/en/ark/products/49158.html 660UM]
|1.33
|2.40
|166–500
|18&nbsp;W
| {{dts|2010|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku26" | [https://ark.intel.com/content/www/us/en/ark/products/49666.html 640M]
|2.80
|3.46
|500–766
|35&nbsp;W
| {{dts|2010|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku25" | [https://ark.intel.com/content/www/us/en/ark/products/43563.html 640LM]
|2.13
|2.93
|266–566
|25&nbsp;W
| rowspan="5" | {{dts|2010|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku24" | [https://ark.intel.com/content/www/us/en/ark/products/47700.html 640UM]
|1.20
|2.27
|166–500
|18&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku23" | [https://ark.intel.com/content/www/us/en/ark/products/43560.html 620M]
|2.66
|3.33
|500–766
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku22" | [https://ark.intel.com/content/www/us/en/ark/products/43559.html 620LM]
|2.00
|2.80
|266–566
|25&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku21" | [https://ark.intel.com/content/www/us/en/ark/products/43562.html 620UM]
|1.06
|2.13
|166–500
|18&nbsp;W
|-
! rowspan="13" |Core i5
! style="text-align:left;" data-sort-value="sku20" | [https://ark.intel.com/content/www/us/en/ark/products/49652.html 580M]
| rowspan="2" |2.66
|3.33
| rowspan="2" |500–766
| rowspan="20" |3&nbsp;MB
| rowspan="2" |35&nbsp;W
| rowspan="3" | {{dts|2010|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku19" | [https://ark.intel.com/content/www/us/en/ark/products/49653.html 560M]
|3.20
|-
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/49665.html 560UM]
|1.33
|2.13
|166–500
|18&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/43544.html 540M]
|2.53
|3.07
|500–766
|35&nbsp;W
| {{dts|2010|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/49159.html 540UM]
|1.20
|2.00
|166–500
|18&nbsp;W
| {{dts|2010|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/47341.html 520M]
|2.40
|2.93
|500–766
|35&nbsp;W
| rowspan="2" | {{dts|2010|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/47554.html 520UM]
|1.07
|1.87
|166–500
|18&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/52952.html 480M]
|2.66
|2.93
|500–766
|35&nbsp;W
| {{dts|2011|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/50026.html 470UM]
|1.33
|1.86
|166–500
|18&nbsp;W
| {{dts|2010|October|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/50179.html 460M]
|2.53
|2.80
| rowspan="3" |500–766
| rowspan="3" |35&nbsp;W
| {{dts|2010|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/49022.html 450M]
|2.40
|2.66
| {{dts|2010|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/43537.html 430M]
|2.26
|2.53
| {{dts|2010|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/49023.html 430UM]
|1.20
|1.73
|166–500
|18&nbsp;W
| {{dts|2010|May|format=mdy|abbr=off}}
|-
! rowspan="7" |Core i3
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/52955.html 390M]
|2.66
| rowspan="7" {{n/a}}
| rowspan="2" |500–667
| rowspan="2" |35&nbsp;W
| {{dts|2011|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/50178.html 380M]
|2.53
| {{dts|2010|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/50028.html 380UM]
|1.33
|166–500
|18&nbsp;W
| {{dts|2010|October|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/49020.html 370M]
|2.40
| rowspan="3" |500–667
| rowspan="3" |35&nbsp;W
| {{dts|2010|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/43529.html 350M]
|2.26
| rowspan="2" | {{dts|2010|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/47663.html 330M]
|2.13
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/49021.html 330UM]
|1.20
|166–500
|18&nbsp;W
| {{dts|2010|May|format=mdy|abbr=off}}
|}

=== Core i (2nd gen) ===

==== Sandy Bridge-M<span class="anchor" id="&quot;Sandy Bridge&quot; (32 nm)"></span><span class="anchor" id="&quot;Sandy Bridge-M&quot; (dual-core, 32 nm)"></span><span class="anchor" id="&quot;Sandy Bridge-M&quot; (quad-core) (32 nm)"></span><span class="anchor" id="&quot;Sandy Bridge&quot; (32 nm)_2"></span> ====

Common features:
* Socket: [[Socket G2|G2]], BGA 1023 (dual-core models), BGA 1224 (quad-core models).
* All the CPUs support dual-channel [[DDR3]] RAM. All models support it at 1333&nbsp;MT/s speeds while i7-2720QM and above support up to 1600&nbsp;MT/s speeds.
* All CPU models provide 16 lanes of [[PCIe 2.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[32 nm process|32&nbsp;nm]].
* XM-suffix models have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="18" | Core i7
! style="text-align:left;" data-sort-value="sku42" | [https://ark.intel.com/content/www/us/en/ark/products/53478.html 2960XM]
| rowspan="10" | 4 (8)
| 2.7
| 3.7
| rowspan="42" | [[Intel Graphics Technology#Sandy Bridge|HD 3000]]
| rowspan="6" | 650–1300
| rowspan="4" | 8&nbsp;MB
| rowspan="2" | 55&nbsp;W
| {{dts|2011|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku41" | [https://ark.intel.com/content/www/us/en/ark/products/52237.html 2920XM]
| rowspan="2" |2.5
|3.5
| {{dts|2011|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku40" | [https://ark.intel.com/content/www/us/en/ark/products/53476.html 2860QM]
|3.6
| rowspan="8" |45&nbsp;W
| {{dts|2011|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku39" | [https://ark.intel.com/content/www/us/en/ark/products/52227.html 2820QM]
|2.3
|3.4
| {{dts|2011|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku38" | [https://ark.intel.com/content/www/us/en/ark/products/53474.html 2760QM]
|2.4
|3.5
| rowspan="6" |6&nbsp;MB
| {{dts|2011|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku37" | [https://ark.intel.com/content/www/us/en/ark/products/50067.html 2720QM]
| rowspan="3" |2.2
|3.3
| {{dts|2011|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku36" | [https://ark.intel.com/content/www/us/en/ark/products/53470.html 2675QM]
| rowspan="2" |3.1
|650–1200
| rowspan="2" | {{dts|2011|October|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku35" | [https://ark.intel.com/content/www/us/en/ark/products/53469.html 2670QM]
|650–1100
|-
! style="text-align:left;" data-sort-value="sku34" | [https://ark.intel.com/content/www/us/en/ark/products/53463.html 2635QM]
| rowspan="2" |2.0
| rowspan="2" |2.9
|650–1200
| rowspan="2" | {{dts|2011|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku33" | [https://ark.intel.com/content/www/us/en/ark/products/52219.html 2630QM]
|650–1100
|-
! style="text-align:left;" data-sort-value="sku32" | [https://ark.intel.com/content/www/us/en/ark/products/54617.html 2677M]
| rowspan="32" |2 (4)
|1.8
|2.9
|350–1200
| rowspan="8" |4&nbsp;MB
| rowspan="2" |17&nbsp;W
| {{dts|2011|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku31" | [https://ark.intel.com/content/www/us/en/ark/products/54615.html 2657M]
|1.6
|2.7
|350–1000
| {{dts|2011|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku30" | [https://ark.intel.com/content/www/us/en/ark/products/53464.html 2640M]
|2.8
|3.5
|650–1300
|35&nbsp;W
| {{dts|2011|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku29" | [https://ark.intel.com/content/www/us/en/ark/products/54611.html 2649M]
|2.3
|3.2
|500–1100
|25&nbsp;W
| {{dts|2011|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku28" | [https://ark.intel.com/content/www/us/en/ark/products/54618.html 2637M]
|1.7
|2.8
|350–1200
|17&nbsp;W
| {{dts|2011|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku27" | [https://ark.intel.com/content/www/us/en/ark/products/52231.html 2620M]
|2.7
|3.4
|650–1300
|35&nbsp;W
| rowspan="3" | {{dts|2011|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku26" | [https://ark.intel.com/content/www/us/en/ark/products/54610.html 2629M]
|2.1
|3.0
|500–1100
|25&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku25" | [https://ark.intel.com/content/www/us/en/ark/products/54616.html 2617M]
|1.5
|2.6
|350–950
| rowspan="2" |17&nbsp;W
|-
! rowspan="10" |Core i5
! style="text-align:left;" data-sort-value="sku24" | [https://ark.intel.com/content/www/us/en/ark/products/54620.html 2557M]
|1.7
|2.7
|350–1200
| rowspan="24" |3&nbsp;MB
| {{dts|2011|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku23" | [https://ark.intel.com/content/www/us/en/ark/products/50072.html 2540M]
|2.6
|3.3
|650–1300
|35&nbsp;W
| rowspan="3" | {{dts|2011|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku22" | [https://ark.intel.com/content/www/us/en/ark/products/54619.html 2537M]
|1.4
|2.3
|350–900
|17&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku21" | [https://ark.intel.com/content/www/us/en/ark/products/52229.html 2520M]
|2.5
|3.2
|650–1300
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku20" | [https://ark.intel.com/content/www/us/en/ark/products/56858.html 2467M]
|1.6
|2.3
|350–1150
|17&nbsp;W
| {{dts|2011|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku19" | [https://ark.intel.com/content/www/us/en/ark/products/53452.html 2450M]
|2.5
|3.1
| rowspan="2" |650–1300
| rowspan="6" |35&nbsp;W
| {{dts|2012|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/60636.html 2435M]
| rowspan="2" |2.4
| rowspan="2" |3.0
| {{dts|2011|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/53450.html 2430M]
|650–1200
| {{dts|2011|October|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/53449.html 2415M]
| rowspan="2" |2.3
| rowspan="2" |2.9
|650–1300
|Q1 2011
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/52224.html 2410M]
|650–1200
| {{dts|2011|February|format=mdy|abbr=off}}
|-
! rowspan="14" |Core i3
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/53442.html 2370M]
|2.4
| rowspan="14" {{n/a}}
|650–1150
| {{dts|2012|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/54834.html 2377M]
| rowspan="2" |1.5
| rowspan="4" |350–1000
| rowspan="4" |17&nbsp;W
| {{dts|2012|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/74259.html 2375M]
|Q1 2013
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/59798.html 2367M]
| rowspan="2" |1.4
| {{dts|2011|October|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/70272.html 2365M]
| {{dts|2012|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/53438.html 2350M]
|2.3
|650–1150
|35&nbsp;W
| {{dts|2011|October|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/54624.html 2357M]
|1.3
|350–950
|17&nbsp;W
| {{dts|2011|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/74542.html 2348M]
|2.3
|650–1150
| rowspan="7" |35&nbsp;W
| {{dts|2013|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | 2332M<ref>{{cite web |title=CPU-Upgrade: Intel Core i3-2332M CPU |url=https://www.cpu-upgrade.com/CPUs/Intel/Core_i3_Mobile/i3-2332M.html |website=cpu-upgrade.com |access-date=19 October 2023 |archive-date=September 18, 2017 |archive-url=https://web.archive.org/web/20170918105705/http://www.cpu-upgrade.com/CPUs/Intel/Core_i3_Mobile/i3-2332M.html |url-status=live }}</ref>
| rowspan="3" |2.2
| rowspan="6" |650–1100
| {{dts|2011|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/53434.html 2330M]
| {{dts|2011|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/70927.html 2328M]
| {{dts|2012|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/53432.html 2312M]
| rowspan="3" |2.1
|Q2 2011
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/52220.html 2310M]
| {{dts|2011|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | 2308M<ref>{{cite web |title=CPU-Upgrade: Intel Core i3-2308M CPU |url=https://www.cpu-upgrade.com/CPUs/Intel/Core_i3_Mobile/i3-2308M.html |website=cpu-upgrade.com |access-date=19 October 2023 |archive-date=June 28, 2016 |archive-url=https://web.archive.org/web/20160628003653/http://www.cpu-upgrade.com/CPUs/Intel/Core_i3_Mobile/i3-2308M.html |url-status=live }}</ref>
|Q3 2012
|}

=== Core i (3rd gen) ===

==== Ivy Bridge<span class="anchor" id="&quot;Ivy Bridge&quot; (22 nm)"></span><span class="anchor" id="&quot;Ivy Bridge-M&quot; (dual-core, 22 nm)"></span><span class="anchor" id="&quot;Ivy Bridge-M&quot; (quad-core) (22 nm)"></span><span class="anchor" id="&quot;Ivy Bridge&quot; (22 nm)_2"></span> ====
[[File:Intel i5 3230M (Ivy Bridge, JPG, Full Scale, 85% Quality).jpg|thumb|Intel i5 3230M die shot]]
Common features:
* Socket: [[Socket G2|G2]], BGA 1023 (dual-core models), BGA 1224 (quad-core models).
* All the CPUs support dual-channel [[DDR3]] or [[DDR3L]] RAM, at up to 1600&nbsp;MT/s speed.
* All CPU models provide 16 lanes of PCIe, except Y-suffix models which do not have PCIe support. i5 and i7 M-, QM- and XM-suffix models support it at [[PCIe 3.0]] speeds, while all other models support it at PCIe 2.0 speeds.
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[22 nm process|22&nbsp;nm]].
* XM-suffix models have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="19" | Core i7
! style="text-align:left;" data-sort-value="sku37" | [https://ark.intel.com/content/www/us/en/ark/products/71096.html 3940XM]
| rowspan="12" | 4 (8)
| 3.0
| 3.9
| rowspan="37" | [[Intel Graphics Technology#Ivy Bridge|HD 4000]]
| 650–1350
| rowspan="4" | 8&nbsp;MB
| rowspan="2" | 55&nbsp;W
| {{dts|2012|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku36" | [https://ark.intel.com/content/www/us/en/ark/products/64887.html 3920XM]
|2.9
| rowspan="2" |3.8
| rowspan="2" |650–1300
| {{dts|2012|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku35" | [https://ark.intel.com/content/www/us/en/ark/products/70846.html 3840QM]
|2.8
| rowspan="6" |45&nbsp;W
| {{dts|2012|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku34" | [https://ark.intel.com/content/www/us/en/ark/products/64889.html 3820QM]
| rowspan="2" |2.7
| rowspan="2" |3.7
|650–1250
| {{dts|2012|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku33" | [https://ark.intel.com/content/www/us/en/ark/products/70847.html 3740QM]
|650–1300
| rowspan="8" |6&nbsp;MB
| {{dts|2012|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku32" | [https://ark.intel.com/content/www/us/en/ark/products/64891.html 3720QM]
|2.6
|3.6
|650–1250
| {{dts|2012|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku31" | [https://ark.intel.com/content/www/us/en/ark/products/71460.html 3635QM]
| rowspan="2" |2.4
| rowspan="2" |3.4
|650–1200
| rowspan="2" | {{dts|2012|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku30" | [https://ark.intel.com/content/www/us/en/ark/products/71459.html 3630QM]
| rowspan="2" |650–1150
|-
! style="text-align:left;" data-sort-value="sku29" | [https://ark.intel.com/content/www/us/en/ark/products/71458.html 3632QM]
|2.2
|3.2
|35&nbsp;W
| {{dts|2012|October|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku28" | [https://ark.intel.com/content/www/us/en/ark/products/64900.html 3615QM]
| rowspan="2" |2.3
| rowspan="2" |3.3
|650–1200
| rowspan="2" |45&nbsp;W
| rowspan="3" | {{dts|2012|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku27" | [https://ark.intel.com/content/www/us/en/ark/products/64899.html 3610QM]
| rowspan="2" |650–1100
|-
! style="text-align:left;" data-sort-value="sku26" | [https://ark.intel.com/content/www/us/en/ark/products/67356.html 3612QM]
|2.1
|3.1
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku25" | [https://ark.intel.com/content/www/us/en/ark/products/71258.html 3687U]
| rowspan="25" |2 (4)
|2.1
|3.3
|350–1200
| rowspan="7" |4&nbsp;MB
|17&nbsp;W
| rowspan="2" | {{dts|2013|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku24" | [https://ark.intel.com/content/www/us/en/ark/products/72015.html 3689Y]
|1.5
|2.6
|350–850
|13&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku23" | [https://ark.intel.com/content/www/us/en/ark/products/64898.html 3667U]
|2.0
|3.2
|350–1150
|17&nbsp;W
| {{dts|2012|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku22" | [https://ark.intel.com/content/www/us/en/ark/products/71255.html 3540M]
|3.0
|3.7
|650–1300
|35&nbsp;W
| rowspan="2" | {{dts|2013|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku21" | [https://ark.intel.com/content/www/us/en/ark/products/72054.html 3537U]
|2.0
|3.1
|350–1200
|17&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku20" | [https://ark.intel.com/content/www/us/en/ark/products/64893.html 3520M]
|2.9
|3.6
|650–1250
|35&nbsp;W
| rowspan="2" | {{dts|2012|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku19" | [https://ark.intel.com/content/www/us/en/ark/products/65714.html 3517U]
| rowspan="2" |1.9
|3.0
|350–1150
| rowspan="2" |17&nbsp;W
|-
! rowspan="12" |Core i5
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/71259.html 3437U]
|2.9
|650–1200
| rowspan="18" |3&nbsp;MB
| rowspan="2" | {{dts|2013|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/72014.html 3439Y]
|1.5
|2.3
|350–850
|13&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/64903.html 3427U]
|1.8
|2.8
|350–1150
|17&nbsp;W
| {{dts|2012|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/71256.html 3380M]
|2.9
|3.6
|650–1250
| rowspan="3" |35&nbsp;W
| {{dts|2013|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/64895.html 3360M]
|2.8
|3.5
|650–1200
| {{dts|2012|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/71257.html 3340M]
|2.7
|3.4
|650–1250
| rowspan="3" | {{dts|2013|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/72055.html 3337U]
|1.8
|2.7
|350–1100
|17&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/72013.html 3339Y]
|1.5
|2.0
|350–850
|13&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/64896.html 3320M]
|2.6
|3.3
|650–1200
|35&nbsp;W
| rowspan="2" | {{dts|2012|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/65707.html 3317U]
|1.7
|2.6
|350–1050
|17&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/72056.html 3230M]
|2.6
|3.2
| rowspan="2" |650–1100
| rowspan="2" |35&nbsp;W
| {{dts|2013|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/65708.html 3210M]
|2.5
|3.1
| {{dts|2012|June|format=mdy|abbr=off}}
|-
! rowspan="6" |Core i3
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/72057.html 3227U]
|1.9
| rowspan="6" {{n/a}}
|350–1100
|17&nbsp;W
| rowspan="2" | {{dts|2013|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/72012.html 3229Y]
|1.4
|350–850
|13&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/65697.html 3217U]
|1.8
|350–1050
|17&nbsp;W
| {{dts|2012|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/72058.html 3130M]
|2.6
| rowspan="2" |650–1100
| rowspan="3" |35&nbsp;W
| {{dts|2013|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/71465.html 3120M]
|2.5
| {{dts|2012|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/65700.html 3110M]
|2.4
|650–1000
| {{dts|2012|June|format=mdy|abbr=off}}
|}

=== Core i (4th gen) ===

==== Haswell-MB<span class="anchor" id="&quot;Haswell-MB&quot; (22 nm)"></span><span class="anchor" id="&quot;Haswell-MB&quot; (dual-core, 22 nm)"></span><span class="anchor" id="&quot;Haswell-MB&quot; (quad-core, 22 nm)"></span> ====

Common features:
* Socket: [[Intel Socket G3|G3]].
* All the CPUs support dual-channel [[DDR3L]] RAM, at up to 1600&nbsp;MT/s speed.
* All CPU models provide 16 lanes of PCIe. i5 and i7 models support it at [[PCIe 3.0]] speeds, while i3 models support it at PCIe 2.0 speeds.
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[22 nm process|22&nbsp;nm]].
* MX-suffix models have an unlocked multiplier and can be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="12" | Core i7
! style="text-align:left;" data-sort-value="sku22" | [https://ark.intel.com/content/www/us/en/ark/products/78940.html 4940MX]
| rowspan="10" | 4 (8)
| 3.1
| 4.0
| rowspan="22" | [[Intel Graphics Technology#Haswell|HD 4600]]
| rowspan="2" | 400–1350
| rowspan="4" | 8&nbsp;MB
| rowspan="2" | 57&nbsp;W
| {{dts|2014|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku21" | [https://ark.intel.com/content/www/us/en/ark/products/75133.html 4930MX]
|3.0
| rowspan="2" |3.9
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku20" | [https://ark.intel.com/content/www/us/en/ark/products/78939.html 4910MQ]
|2.9
| rowspan="4" |400–1300
| rowspan="5" |47&nbsp;W
| {{dts|2014|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku19" | [https://ark.intel.com/content/www/us/en/ark/products/75131.html 4900MQ]
| rowspan="2" |2.8
| rowspan="2" |3.8
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/78937.html 4810MQ]
| rowspan="6" |6&nbsp;MB
| {{dts|2014|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/75128.html 4800MQ]
|2.7
|3.7
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/78931.html 4710MQ]
|2.5
|3.5
| rowspan="4" |400–1150
| rowspan="2" | {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/78933.html 4712MQ]
|2.3
|3.3
|37&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/75117.html 4700MQ]
|2.4
|3.4
|47&nbsp;W
| rowspan="2" | {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/75119.html 4702MQ]
|2.2
|3.2
| rowspan="13" |37&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/80345.html 4610M]
| rowspan="12" |2 (4)
|3.0
|3.7
| rowspan="2" |400–1300
| rowspan="2" |4&nbsp;MB
| {{dts|2014|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/76349.html 4600M]
| rowspan="2" |2.9
| rowspan="2" |3.6
| {{dts|2013|September|format=mdy|abbr=off}}
|-
! rowspan="6" |Core i5
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/80344.html 4340M]
| rowspan="4" |400–1250
| rowspan="10" |3&nbsp;MB
| {{dts|2014|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/76750.html 4330M]
|2.8
|3.5
| {{dts|2013|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/80373.html 4310M]
|2.7
|3.4
| {{dts|2014|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/76347.html 4300M]
| rowspan="2" |2.6
|3.3
| {{dts|2013|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/81012.html 4210M]
|3.2
| rowspan="2" |400–1150
| {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/76348.html 4200M]
|2.5
|3.1
| {{dts|2013|September|format=mdy|abbr=off}}
|-
! rowspan="4" |Core i3
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/77483.html 4110M]
|2.6
| rowspan="4" {{n/a}}
| rowspan="4" |400–1100
| {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/76346.html 4100M]
| rowspan="2" |2.5
| {{dts|2013|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | 4010M<ref>{{cite web |title=CPU-Upgrade: Intel Core i3-4010M CPU |url=https://www.cpu-upgrade.com/CPUs/Intel/Core_i3_Mobile/i3-4010M.html |website=cpu-upgrade.com |access-date=21 October 2023}}</ref>
|Q3 2014
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/75104.html 4000M]
|2.4
| {{dts|2013|September|format=mdy|abbr=off}}
|}

==== Haswell-ULT<span class="anchor" id="&quot;Haswell-ULT&quot; (SiP, 22 nm)"></span><span class="anchor" id="&quot;Haswell-ULT&quot; (SiP, dual-core, 22 nm)"></span> ====

Common features:
* Socket: BGA 1168.
* All the CPUs support dual-channel [[DDR3L]] or [[LPDDR3]] RAM, at up to 1600&nbsp;MT/s speed.
* All CPU models provide 12 lanes of [[PCIe 2.0]] except i3-4xx5U models, which provide 10 lanes of PCIe 2.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[22 nm process|22&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="7" | Core i7
! style="text-align:left;" data-sort-value="sku26" | [https://ark.intel.com/content/www/us/en/ark/products/75114.html 4650U]
| rowspan="26" | 2 (4)
| 1.7
| rowspan="2" | 3.3
| [[Intel Graphics Technology#Haswell|HD 5000]]
| rowspan="2" | 200–1100
| rowspan="7" | 4&nbsp;MB
| rowspan="2" | 15&nbsp;W
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku25" | [https://ark.intel.com/content/www/us/en/ark/products/76616.html 4600U]
|2.1
|[[Intel Graphics Technology#Haswell|HD 4400]]
| {{dts|2013|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku24" | [https://ark.intel.com/content/www/us/en/ark/products/83506.html 4578U]
|3.0
|3.5
| rowspan="2" |[[Intel Graphics Technology#Haswell|Iris 5100]]
| rowspan="2" |200–1200
| rowspan="2" |28&nbsp;W
| {{dts|2014|July|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku23" | [https://ark.intel.com/content/www/us/en/ark/products/75992.html 4558U]
|2.8
|3.3
| rowspan="2" | {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku22" | [https://ark.intel.com/content/www/us/en/ark/products/75112.html 4550U]
|1.5
|3.0
|HD 5000
| rowspan="6" |200–1100
| rowspan="6" |15&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku21" | [https://ark.intel.com/content/www/us/en/ark/products/81015.html 4510U]
|2.0
|3.1
| rowspan="2" |HD 4400
| {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku20" | [https://ark.intel.com/content/www/us/en/ark/products/75460.html 4500U]
|1.8
| rowspan="2" |3.0
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! rowspan="12" |Core i5
! style="text-align:left;" data-sort-value="sku19" | [https://ark.intel.com/content/www/us/en/ark/products/75034.html 4360U]
|1.5
| rowspan="2" |HD 5000
| rowspan="19" |3&nbsp;MB
| {{dts|2014|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/75033.html 4350U]
|1.4
|2.9
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/80343.html 4310U]
|2.0
|3.0
|HD 4400
| {{dts|2014|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/83507.html 4308U]
|2.8
|3.3
|Iris 5100
|200–1200
|28&nbsp;W
| {{dts|2014|July|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/76308.html 4300U]
|1.9
|2.9
|HD 4400
|200–1100
|15&nbsp;W
| {{dts|2013|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/75991.html 4288U]
| rowspan="2" |2.6
| rowspan="2" |3.1
| rowspan="2" |Iris 5100
|200–1200
| rowspan="2" |28&nbsp;W
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/83508.html 4278U]
|200–1100
| {{dts|2014|July|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/75030.html 4260U]
|1.4
|2.7
|HD 5000
|200–1000
|15&nbsp;W
| {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/75990.html 4258U]
|2.4
|2.9
|Iris 5100
|200–1100
|28&nbsp;W
| rowspan="2" | {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/75028.html 4250U]
|1.3
|2.6
|HD 5000
| rowspan="3" |200–1000
| rowspan="3" |15&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/81016.html 4210U]
|1.7
|2.7
| rowspan="2" |HD 4400
| {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/75459.html 4200U]
|1.6
|2.6
| rowspan="2" | {{dts|2013|June|format=mdy|abbr=off}}
|-
! rowspan="7" |Core i3
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/75989.html 4158U]
| rowspan="2" |2.0
| rowspan="7" {{n/a}}
|Iris 5100
|200–1100
|28&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/81017.html 4120U]
| rowspan="6" |HD 4400
| rowspan="3" |200–1000
| rowspan="6" |15&nbsp;W
| {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/75110.html 4100U]
|1.8
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/81018.html 4030U]
| rowspan="2" |1.9
| rowspan="2" | {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/81019.html 4025U]
|200–950
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/75107.html 4010U]
| rowspan="2" |1.7
|200–1000
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/75105.html 4005U]
|200–950
| {{dts|2013|September|format=mdy|abbr=off}}
|}

==== Haswell-ULX<span class="anchor" id="&quot;Haswell-ULX&quot; (SiP, 22 nm)"></span><span class="anchor" id="&quot;Haswell-ULX&quot; (SiP, dual-core, 22 nm)"></span> ====

Common features:
* Socket: BGA 1168.
* All the CPUs support dual-channel [[DDR3L]] or [[LPDDR3]] RAM, at up to 1600&nbsp;MT/s speed.
* All CPU models provide 12 lanes of [[PCIe 2.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[22 nm process|22&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=1 | Core i7
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/76618.html 4610Y]
| rowspan="11" | 2 (4)
| 1.7
| 2.9
| rowspan="11" | [[Intel Graphics Technology#Haswell|HD 4200]]
| rowspan="11" | 200–850
| 4&nbsp;MB
| rowspan="11" | 11.5&nbsp;W
| rowspan="3" | {{dts|2013|September|format=mdy|abbr=off}}
|-
! rowspan="6" |Core i5
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/76613.html 4302Y]
| rowspan="3" |1.6
| rowspan="2" |2.3
| rowspan="10" |3&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/76612.html 4300Y]
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/81020.html 4220Y]
|2.0
| {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/76611.html 4210Y]
|1.5
|1.9
| rowspan="2" | {{dts|2013|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/76610.html 4202Y]
|1.6
|2.0
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/75802.html 4200Y]
|1.4
|1.9
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! rowspan="4" |Core i3
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/81021.html 4030Y]
|1.6
| rowspan="4" {{n/a}}
| {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/76609.html 4020Y]
| rowspan="2" |1.5
| rowspan="2" | {{dts|2013|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/76608.html 4012Y]
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/75988.html 4010Y]
|1.3
| {{dts|2013|June|format=mdy|abbr=off}}
|}

==== Haswell-H<span class="anchor" id="&quot;Haswell-H&quot; (dual-core, 22 nm)"></span><span class="anchor" id="&quot;Haswell-H&quot; (MCP, quad-core, 22 nm)"></span><span class="anchor" id="&quot;Haswell-H&quot; (MCP, quad-core, (22 nm) 2"></span> ====

Common features:
* Socket: BGA 1364.
* All the CPUs support dual-channel [[DDR3L]] RAM, at up to 1600&nbsp;MT/s speed.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Models with Iris Pro 5200 iGPU also feature 128&nbsp;MB of [[eDRAM]], acting as L4 cache.
* Fabrication process: [[22 nm process|22&nbsp;nm]].
* i7-4950HQ comes with an unlocked multiplier, allowing for users to overclock it beyond the factory set clock speed.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="15" | Core i7
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/83503.html 4980HQ]
| rowspan="15" | 4 (8)
| 2.8
| 4.0
| rowspan="9" | [[Intel Graphics Technology#Haswell|Iris Pro 5200]]
| rowspan="3" | 200–1300
| rowspan="15" | 6&nbsp;MB
| rowspan="10" | 47&nbsp;W
| {{dts|2014|July|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/76088.html 4960HQ]
|2.6
|3.8
| {{dts|2013|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/76085.html 4950HQ]
|2.4
|3.6
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/83504.html 4870HQ]
|2.5
|3.7
| rowspan="6" |200–1200
| {{dts|2014|July|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/76089.html 4860HQ]
|2.4
|3.6
| {{dts|2014|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/76086.html 4850HQ]
|2.3
|3.5
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/83505.html 4770HQ]
|2.2
|3.4
| {{dts|2014|July|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/76090.html 4760HQ]
|2.1
|3.3
| {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/76087.html 4750HQ]
|2.0
|3.2
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/78934.html 4720HQ]
|2.6
|3.6
| rowspan="8" |[[Intel Graphics Technology#Haswell|HD 4600]]
|400–1200
| rowspan="2" | {{dts|2015|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/78935.html 4722HQ]
|2.4
|3.4
|400–1150
|37&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/78930.html 4710HQ]
|2.5
|3.5
|400–1200
|47&nbsp;W
| rowspan="2" | {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/78932.html 4712HQ]
|2.3
|3.3
|400–1150
|37&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/75116.html 4700HQ]
|2.4
|3.4
|400–1200
|47&nbsp;W
| rowspan="2" | {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/75118.html 4702HQ]
|2.2
|3.2
| rowspan="3" |400–1150
|37&nbsp;W
|-
! rowspan="2" |Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/78929.html 4210H]
| rowspan="2" |2 (4)
|2.9
|3.5
| rowspan="2" |3&nbsp;MB
| rowspan=2 | 47&nbsp;W
| {{dts|2014|July|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/75027.html 4200H]
|2.8
|3.4
| {{dts|2013|September|format=mdy|abbr=off}}
|}

=== Core i (5th gen) ===

==== Broadwell-U<span class="anchor" id="&quot;Broadwell-U&quot; (14 nm)"></span><span class="anchor" id="&quot;Broadwell-U&quot; (dual-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 1168.
* All the CPUs support dual-channel [[DDR3L]] or [[LPDDR3]] RAM, at up to 1600&nbsp;MT/s speed. Models i5-5350U or above, along with all ix-5xx7 models, support LPDDR3 up to 1866&nbsp;MT/s speed.
* All CPU models provide 12 lanes of [[PCIe 2.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="5" | Core i7
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/84995.html 5650U]
| rowspan="16" | 2 (4)
| 2.2
| rowspan="2" | 3.2
| [[Intel Graphics Technology#Broadwell|HD 6000]]
| 300–1000
| rowspan="5" | 4&nbsp;MB
| rowspan="2" | 15&nbsp;W
| rowspan="12" | {{dts|2015|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/85215.html 5600U]
|2.6
|[[Intel Graphics Technology#Broadwell|HD 5500]]
|300–950
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/84993.html 5557U]
|3.1
|3.4
|[[Intel Graphics Technology#Broadwell|Iris 6100]]
|300–1100
|28&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/84992.html 5550U]
|2.0
| rowspan="2" |3.0
|HD 6000
|300–1000
| rowspan="4" |15&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/85214.html 5500U]
|2.4
|HD 5500
|300–950
|-
! rowspan="6" |Core i5
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/84990.html 5350U]
|1.8
| rowspan="2" |2.9
|HD 6000
|300–1000
| rowspan="11" |3&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/85213.html 5300U]
|2.3
|HD 5500
|300–900
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/84988.html 5287U]
|2.9
|3.3
| rowspan="2" |Iris 6100
|300–1100
| rowspan="2" |28&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/84985.html 5257U]
|2.7
|3.1
|300–1050
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/84984.html 5250U]
|1.6
| rowspan="2" |2.7
|HD 6000
|300–1000
| rowspan="2" |15&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/85212.html 5200U]
|2.2
|HD 5500
|300–900
|-
! rowspan="5" |Core i3
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/84982.html 5157U]
|2.5
| rowspan="5" {{n/a}}
|Iris 6100
|300–1000
|28&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/84699.html 5020U]
|2.2
| rowspan="4" |HD 5500
|300–900
| rowspan="4" |15&nbsp;W
| rowspan="2" | {{dts|2015|March|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/84698.html 5015U]
| rowspan="2" |2.1
|300–850
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/84697.html 5010U]
|300–900
| rowspan="2" | {{dts|2015|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/84695.html 5005U]
|2.0
|300–850
|}

==== Broadwell-H<span class="anchor" id="&quot;Broadwell-H&quot; (dual-core, 14 nm)"></span><span class="anchor" id="&quot;Broadwell-H&quot; (MCP, quad-core, 14 nm)"></span><span class="anchor" id="&quot;Broadwell-H&quot; ([[Multi-chip package|MCP]], quad-core, 14 nm) 2"></span> ====

Common features:
* Socket: BGA 1364.
* All the CPUs support dual-channel [[DDR3L]] or [[LPDDR3]] RAM, at up to 1866&nbsp;MT/s speed.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Models with Iris Pro 6200 iGPU also feature 128&nbsp;MB of [[eDRAM]], acting as L4 cache.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=4 | Core i7
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/87720.html 5950HQ]
| rowspan=4 | 4 (8)
| 2.9
| 3.7
| rowspan=3 | [[Intel Graphics Technology#Broadwell|Iris Pro 6200]]
| 300–1150
| rowspan=4 | 6&nbsp;MB
| rowspan=5 | 47&nbsp;W
| rowspan=5 | {{dts|2015|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/87719.html 5850HQ]
| 2.7
| 3.6
| 300–1100
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/87717.html 5750HQ]
| 2.5
| 3.4
| rowspan=3 | 300–1050
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/87716.html 5700HQ]
| 2.7
| rowspan=2 | 3.5
| [[Intel Graphics Technology#Broadwell|HD 5600]]
|-
! rowspan=1 | Core i5
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/87713.html 5350H]
| 2 (4)
| 3.1
| Iris Pro 6200
| 4&nbsp;MB
|}

=== Core M (5th gen) ===

==== Broadwell-Y<span class="anchor" id="&quot;Broadwell-Y&quot; (SoC, dual-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 1234.
* All the CPUs support dual-channel [[DDR3L]], [[DDR3L-RS]] or [[LPDDR3]] RAM, at up to 1600&nbsp;MT/s speed.
* All CPU models provide 12 lanes of [[PCIe 2.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=7 | Core M
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/84672.html 5Y71]
| rowspan=7 | 2 (4)
| 1.2
| 2.9
| rowspan=7 | [[Intel Graphics Technology#Broadwell|HD 5300]]
| 300–900
| rowspan=7 | 4&nbsp;MB
| rowspan=7 | 4.5&nbsp;W
| {{dts|2014|October|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/83612.html 5Y70]
| rowspan=2 | 1.1
| rowspan=2 | 2.6
| 100–850
| {{dts|2014|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/84669.html 5Y51]
| 300–900
| rowspan=3 | {{dts|2014|October|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/84666.html 5Y31]
| 0.9
| 2.4
| 300–850
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/85234.html 5Y10c]
| rowspan=3 | 0.8
| rowspan=3 | 2.0
| 300–800
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/83610.html 5Y10a]
| rowspan=2 | 100–800
| rowspan=2 | {{dts|2014|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/83611.html 5Y10]
|}

=== Core i (6th gen) ===

==== Skylake-U<span class="anchor" id="&quot;Skylake-U&quot; (14 nm)"></span><span class="anchor" id="&quot;Skylake-U&quot; (dual-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 1356.
* All the CPUs support dual-channel [[DDR4]]-2133, [[DDR3L]]-1600 or [[LPDDR3]]-1866 RAM.
* All CPU models provide 12 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="7" | Core i7
! style="text-align:left;" data-sort-value="sku18" | [https://ark.intel.com/content/www/us/en/ark/products/91169.html 6660U]
| rowspan="18" | 2 (4)
| 2.4
| rowspan="3" | 3.4
| rowspan="2" | [[Intel Graphics Technology#Skylake|Iris 540]]
| rowspan="3" | 300–1050
| rowspan="7" | 4&nbsp;MB
| rowspan="3" | 15&nbsp;W
| {{dts|2016|March|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku17" | [https://ark.intel.com/content/www/us/en/ark/products/91497.html 6650U]
|2.2
| rowspan="5" | {{dts|2015|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku16" | [https://ark.intel.com/content/www/us/en/ark/products/88192.html 6600U]
|2.6
|[[Intel Graphics Technology#Skylake|HD 520]]
|-
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/91167.html 6567U]
|3.3
|3.6
|[[Intel Graphics Technology#Skylake|Iris 550]]
|300–1100
|28&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/91163.html 6560U]
|2.2
|3.2
|Iris 540
| rowspan="3" |300–1050
| rowspan="5" |15&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/88194.html 6500U]
| rowspan="2" |2.5
| rowspan="3" |3.1
|HD 520
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/93430.html 6498DU]
|[[Intel Graphics Technology#Skylake|HD 510]]
| {{dts|2015|December|format=mdy|abbr=off}}
|-
! rowspan="7" |Core i5
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/91156.html 6360U]
|2.0
|Iris 540
| rowspan="2" |300–1000
| rowspan="2" |3&nbsp;MB
| rowspan="6" | {{dts|2015|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/88190.html 6300U]
|2.4
|3.0
|HD 520
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/91164.html 6287U]
|3.1
|3.5
| rowspan="2" |Iris 550
|300–1100
| rowspan="3" |4&nbsp;MB
| rowspan="2" |28&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/91166.html 6267U]
|2.9
|3.3
|300–1050
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/91160.html 6260U]
|1.8
|2.9
|Iris 540
|300–950
| rowspan="3" |15&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/88193.html 6200U]
| rowspan="2" |2.3
| rowspan="2" |2.8
|HD 520
| rowspan="5" |300–1000
| rowspan="6" |3&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/93432.html 6198DU]
|HD 510
| rowspan="2" | {{dts|2015|December|format=mdy|abbr=off}}
|-
! rowspan="4" |Core i3
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/91154.html 6167U]
|2.7
| rowspan="4" {{n/a}}
| rowspan="2" |Iris 550
| rowspan="2" |28&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/96484.html 6157U]
|2.4
| {{dts|2016|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/88180.html 6100U]
|2.3
| rowspan="2" |HD 520
| rowspan="2" |15&nbsp;W
| {{dts|2015|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/91157.html 6006U]
|2.0
|300–900
| {{dts|2016|November|format=mdy|abbr=off}}
|}

==== Skylake-H<span class="anchor" id="&quot;Skylake-H&quot; (14 nm)"></span><span class="anchor" id="&quot;Skylake-H&quot; (quad-core, 14 nm)"></span><span class="anchor" id="&quot;Skylake-H&quot; (MCP, quad-core, 14 nm)"></span><span class="anchor" id="&quot;Skylake-H&quot; (MCP, quad-core, 14 nm) 2"></span> ====

Common features:
* Socket: BGA 1440.
* All the CPUs support dual-channel [[DDR4]]-2133, [[DDR3L]]-1600 or [[LPDDR3]]-1866 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Models with Iris Pro 580 iGPU also feature 128&nbsp;MB of [[eDRAM]], acting as L4 cache.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* K-suffix processors have an unlocked multiplier, allowing it to be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="7" | Core i7
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/93336.html 6970HQ]
| rowspan="7" | 4 (8)
| 2.8
| 3.7
| [[Intel Graphics Technology#Skylake|Iris Pro 580]]
| rowspan="2" | 350–1050
| rowspan="5" | 8&nbsp;MB
| rowspan="10" | 45&nbsp;W
| {{dts|2016|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/88972.html 6920HQ]
|2.9
|3.8
|[[Intel Graphics Technology#Skylake|HD 530]]
| {{dts|2015|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/93340.html 6870HQ]
| rowspan="3" |2.7
| rowspan="3" |3.6
|Iris Pro 580
|350–1000
| {{dts|2016|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/88970.html 6820HQ]
| rowspan="2" |HD 530
| rowspan="2" |350–1050
| rowspan="2" | {{dts|2015|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/88969.html 6820HK]
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/93341.html 6770HQ]
| rowspan="3" |2.6
| rowspan="3" |3.5
|Iris Pro 580
|350–950
| rowspan="5" |6&nbsp;MB
| {{dts|2016|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/88967.html 6700HQ]
| rowspan="2" |HD 530
|350–1050
| rowspan="2" | {{dts|2015|September|format=mdy|abbr=off}}
|-
! rowspan="3" |Core i5
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/88962.html 6440HQ]
| rowspan="3" |4 (4)
|350–950
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/93335.html 6350HQ]
| rowspan="2" |2.3
| rowspan="2" |3.2
|Iris Pro 580
|350–900
| {{dts|2016|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/88959.html 6300HQ]
| rowspan="2" |HD 530
|350–950
| rowspan="2" | {{dts|2015|September|format=mdy|abbr=off}}
|-
!Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/89063.html 6100H]
|2 (4)
|2.7
| {{n/a}}
|350–900
|3&nbsp;MB
|35&nbsp;W
|}

=== Core M (6th gen) ===

==== Skylake-Y<span class="anchor" id="&quot;Skylake-Y&quot; (SoC, dual-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 1515.
* All the CPUs support dual-channel [[DDR3L]]-1600 or [[LPDDR3]]-1866 RAM.
* All CPU models provide 10 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! Core m7
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/88199.html 6Y75]
| rowspan=4 | 2 (4)
| 1.2
| 3.1
| rowspan=4 | [[Intel Graphics Technology#Skylake|HD 515]]
| 300–1000
| rowspan=4 | 4&nbsp;MB
| rowspan=4 | 4.5&nbsp;W
| rowspan=4 | {{dts|2015|September|format=mdy|abbr=off}}
|-
! rowspan=2 | Core m5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/88197.html 6Y57]
| rowspan=2 | 1.1
| 2.8
| rowspan=2 | 300–900
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/88202.html 6Y54]
| 2.7
|-
! Core m3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/88198.html 6Y30]
| 0.9
| 2.2
| 300–850
|}

=== Core i (7th gen) ===

==== Kaby Lake-U<span class="anchor" id="&quot;Kaby Lake-U&quot; (14 nm)"></span><span class="anchor" id="&quot;Kaby Lake-U&quot; (dual-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 1356.
* All the CPUs support dual-channel [[DDR4]]-2133, [[DDR3L]]-1600 or [[LPDDR3]]-1866 RAM.
* All CPU models provide 12 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="5" | Core i7
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/97537.html 7660U]
| rowspan="15" | 2 (4)
| 2.5
| 4.0
| [[Intel Graphics Technology#Kaby Lake|Iris Plus 640]]
| 300–1100
| rowspan="6" | 4&nbsp;MB
| rowspan="2" | 15&nbsp;W
| rowspan="4" | {{dts|2017|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/97466.html 7600U]
|2.8
|3.9
|[[Intel Graphics Technology#Kaby Lake|HD 620]]
| rowspan="2" |300–1150
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/97541.html 7567U]
|3.5
|4.0
|[[Intel Graphics Technology#Kaby Lake|Iris Plus 650]]
|28&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/97540.html 7560U]
|2.4
|3.8
|Iris Plus 640
| rowspan="2" |300–1050
| rowspan="4" |15&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/95451.html 7500U]
|2.7
|3.5
|HD 620
| {{dts|2016|September|format=mdy|abbr=off}}
|-
! rowspan="6" |Core i5
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/97535.html 7360U]
|2.3
|3.6
|Iris Plus 640
|300–1000
| rowspan="5" | {{dts|2017|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/97472.html 7300U]
|2.6
|3.5
|HD 620
| rowspan="2" |300–1100
|3&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/97531.html 7287U]
|3.3
|3.7
| rowspan="2" |Iris Plus 650
| rowspan="3" |4&nbsp;MB
| rowspan="2" |28&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/97528.html 7267U]
|3.1
|3.5
|300–1050
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/97539.html 7260U]
|2.2
|3.4
|Iris Plus 640
|300–950
| rowspan="2" |15&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/95443.html 7200U]
|2.5
|3.1
|HD 620
| rowspan="5" |300–1000
| rowspan="5" |3&nbsp;MB
| {{dts|2016|September|format=mdy|abbr=off}}
|-
! rowspan="4" |Core i3
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/97666.html 7167U]
|2.8
| rowspan="4" {{n/a}}
|Iris Plus 650
|28&nbsp;W
| {{dts|2017|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/124977.html 7130U]
|2.7
| rowspan="3" |HD 620
| rowspan="3" |15&nbsp;W
| {{dts|2017|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/95442.html 7100U]
|2.4
| {{dts|2016|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/122590.html 7020U]
|2.3
|Q2 2018
|}

==== Kaby Lake-H<span class="anchor" id="&quot;Kaby Lake-H&quot; (14 nm)"></span><span class="anchor" id="&quot;Kaby Lake-H&quot; (quad-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 1440.
* All the CPUs support dual-channel [[DDR4]]-2400, [[DDR3L]]-1600 or [[LPDDR3]]-2133 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* K-suffix processors have an unlocked multiplier, allowing it to be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=4 | Core i7
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/97462.html 7920HQ]
| rowspan=4 | 4 (8)
| 3.1
| 4.1
| rowspan=7 | [[Intel Graphics Technology#Kaby Lake|HD 630]]
| rowspan=4 | 350–1100
| rowspan=3 | 8&nbsp;MB
| rowspan=6 | 45&nbsp;W
| rowspan=7 | {{dts|2017|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/97464.html 7820HK]
| rowspan=2 | 2.9
| rowspan=2 | 3.9
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/97496.html 7820HQ]
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/97185.html 7700HQ]
| rowspan=2 | 2.8
| rowspan=2 | 3.8
| rowspan=3 | 6&nbsp;MB
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/97459.html 7440HQ]
| rowspan=2 | 4 (4)
| rowspan=2 | 300–1000
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/97456.html 7300HQ]
| 2.5
| 3.5
|-
! rowspan=1 | Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/97126.html 7100H]
| 2 (4)
| 3.0
| {{n/a}}
| 300–950
| 3&nbsp;MB
| 35&nbsp;W
|}

==== Kaby Lake-Y<span class="anchor" id="&quot;Kaby Lake-Y&quot; (dual-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 1515.
* All the CPUs support dual-channel [[LPDDR3]]-1866 or [[DDR3L]]-1600 RAM.
* All CPU models provide 10 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=1 | Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/95441.html 7Y75]
| rowspan=3 | 2 (4)
| 1.3
| 3.6
| rowspan=3 | [[Intel Graphics Technology#Kaby Lake|HD 615]]
| 300–1050
| rowspan=3 | 4&nbsp;MB
| rowspan=3 | 4.5&nbsp;W
| {{dts|2016|September|format=mdy|abbr=off}}
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/97461.html 7Y57]
| rowspan=2 | 1.2
| 3.3
| rowspan=2 | 300–950
| {{dts|2017|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/95452.html 7Y54]
| 3.2
| {{dts|2016|September|format=mdy|abbr=off}}
|}

=== Core M (7th gen) ===

==== Kaby Lake-Y<span class="anchor" id="&quot;Kaby Lake-Y&quot; (SoC, dual-core, 14 nm)"></span> ====

Core m5 and Core m7 models were rebranded as [[#"Kaby Lake-Y" (dual-core, 14 nm)|Core i5]] and [[#"Kaby Lake-Y" (dual-core, 14 nm)|Core i7]].

Common features:
* Socket: BGA 1515.
* All the CPUs support dual-channel [[DDR3L]]-1600 or [[LPDDR3]]-1866 RAM.
* All CPU models provide 10 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=2 | Core m3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/97538.html 7Y32]
| rowspan=2 | 2 (4)
| 1.1
| 3.0
| rowspan=2 | [[Intel Graphics Technology#Kaby Lake|HD 615]]
| rowspan=2 | 300–900
| rowspan=2 | 4&nbsp;MB
| rowspan=2 | 4.5&nbsp;W
| {{dts|2017|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/95449.html 7Y30]
| 1.0
| 2.6
| {{dts|2016|September|format=mdy|abbr=off}}
|}

=== Core i (8th gen) ===

==== Coffee Lake-U<span class="anchor" id="&quot;Coffee Lake-U&quot; (dual-core, 14 nm)"></span><span class="anchor" id="&quot;Coffee Lake-U&quot; (quad-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 1528.
* All the CPUs support dual-channel [[DDR4]]-2400 or [[LPDDR3]]-2133 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="3" | Core i7
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/191050.html 8569U]
| rowspan="8" | 4 (8)
| 2.8
| 4.7
| rowspan="2" | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|Iris Plus 655]]
| rowspan="2" | 300–1200
| rowspan="3" | 8&nbsp;MB
| rowspan="2" | 28&nbsp;W
| {{dts|2019|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/137979.html 8559U]
|2.7
| rowspan="2" |4.5
| {{dts|2019|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/192996.html 8557U]
|1.7
|[[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|Iris Plus 645]]
| rowspan="2" |300–1150
|15&nbsp;W
| {{dts|2019|July|format=mdy|abbr=off}}
|-
! rowspan="5" |Core i5
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/191070.html 8279U]
|2.4
|4.1
| rowspan="2" |Iris Plus 655
| rowspan="5" |6&nbsp;MB
| rowspan="2" |28&nbsp;W
| {{dts|2019|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/137980.html 8269U]
|2.6
|4.2
| rowspan="2" |300–1100
| {{dts|2018|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/198389.html 8260U]
|1.6
|3.9
|[[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 620]]
|15&nbsp;W
|Q4 2019
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/135935.html 8259U]
|2.3
|3.8
|Iris Plus 655
| rowspan="2" |300–1050
|28&nbsp;W
| {{dts|2018|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/191067.html 8257U]
|1.4
| rowspan="2" |3.9
|Iris Plus 645
|15&nbsp;W
| {{dts|2019|July|format=mdy|abbr=off}}
|-
! rowspan="2" |Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/198391.html 8140U]
| rowspan="2" |2 (4)
|2.1
|UHD 620
|300–1000
| rowspan="2" |4&nbsp;MB
|15&nbsp;W
|Q4 2019
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/135936.html 8109U]
|3.0
|3.6
|Iris Plus 655
|300–1050
|28&nbsp;W
| {{dts|2018|April|format=mdy|abbr=off}}
|}

==== Coffee Lake-H<span class="anchor" id="&quot;Coffee Lake-H&quot; (quad-core, 14 nm)"></span><span class="anchor" id="&quot;Coffee Lake-H&quot; (hexa-core, 14 nm)"></span><span class="anchor" id="Coffee Lake-H (14 nm, 8th/9th generation)"></span> ====
{{for-text|the 9th generation refresh|section [[#Coffee Lake-H (refresh)|§ Coffee Lake-H (refresh)]] below}}

Common features:
* Socket: BGA 1440.
* All the CPUs support dual-channel [[DDR4]]-2666 RAM. Models i5-8300H and above also support [[LPDDR3]]-2133 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* K-suffix processors have an unlocked multiplier, allowing it to be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=1 | Core i9
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/134903.html 8950HK]
| rowspan=3 | 6 (12)
| 2.9
| 4.8
| rowspan=6 | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 630]]
| 350–1200
| 12&nbsp;MB
| rowspan=6 | 45&nbsp;W
| rowspan=5 | {{dts|2018|April|format=mdy|abbr=off}}
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/134899.html 8850H]
| 2.6
| 4.3
| 350–1150
| rowspan=2 | 9&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/134906.html 8750H]
| 2.2
| 4.1
| rowspan=2 | 350–1100
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/134877.html 8400H]
| rowspan=2 | 4 (8)
| 2.5
| 4.2
| rowspan=2 | 8&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/134876.html 8300H]
| 2.3
| 4.0
| rowspan=2 | 350–1000
|-
! rowspan=1 | Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/149160.html 8100H]
| 4 (4)
| 3.0
| {{n/a}}
| 6&nbsp;MB
| {{dts|2018|July|format=mdy|abbr=off}}
|}

==== Coffee Lake-B<span class="anchor" id="&quot;Coffee Lake-B&quot; (quad-core, 14 nm)"></span><span class="anchor" id="&quot;Coffee Lake-B&quot; (hexa-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 1440.
* All the CPUs support dual-channel [[DDR4]]-2666 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=1 | Core i7
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/134905.html 8700B]
| 6 (12)
| 3.2
| 4.6
| rowspan=4 | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 630]]
| 350–1200
| 12&nbsp;MB
| rowspan=4 | 65&nbsp;W
| rowspan=3 | {{dts|2018|April|format=mdy|abbr=off}}
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/134892.html 8500B]
| rowspan=2 | 6 (6)
| 3.0
| 4.1
| 350–1100
| rowspan=2 | 9&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/134888.html 8400B]
| 2.8
| 4.0
| rowspan=2 | 350–1050
|-
! rowspan=1 | Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/189980.html 8100B]
| 4 (4)
| 3.6
| {{n/a}}
| 6&nbsp;MB
| Q3 2018
|}

==== Kaby Lake Refresh<span class="anchor" id="&quot;Kaby Lake Refresh&quot; (14 nm)"></span><span class="anchor" id="&quot;Kaby Lake Refresh&quot; (quad-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 1356.
* All the CPUs support dual-channel [[DDR4]]-2400 or [[LPDDR3]]-2133 RAM.
* All CPU models provide 12 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/124968.html 8650U]
| rowspan=4 | 4 (8)
| 1.9
| 4.2
| rowspan=5 | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 620]]
| rowspan=2 | 300–1150
| rowspan=2 | 8&nbsp;MB
| rowspan=5 | 15&nbsp;W
| rowspan=4 | {{dts|2017|August|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/122589.html 8550U]
| 1.8
| 4.0
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/124969.html 8350U]
| 1.7
| 3.6
| rowspan=2 | 300–1100
| rowspan=2 | 6&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/124967.html 8250U]
| 1.6
| rowspan=2 | 3.4
|-
! rowspan=1 | Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/137977.html 8130U]
| 2 (4)
| 2.2
| 300–1000
| 4&nbsp;MB
| {{dts|2018|February|format=mdy|abbr=off}}
|}

==== Kaby Lake-G<span class="anchor" id="&quot;Kaby Lake-G&quot; (quad-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 2270.
* All the CPUs support dual-channel [[DDR4]]-2400 RAM.
* All CPU models provide 8 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* Kaby Lake-G CPUs have an embedded discrete Radeon RX Vega M GPU as listed in the table below, which have [[HBM2]] [[VRAM]] also embedded on the CPU package.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! colspan="2" | Embedded dGPU
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=4 | Core i7
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/130409.html 8809G]
| rowspan=5 | 4 (8)
| rowspan=4 | 3.1
| 4.2
| rowspan=5 | [[Intel Graphics Technology#Kaby Lake|HD 630]]
| rowspan=4 | 350–1100
| rowspan=2 | [[Kaby Lake#Discrete GPU specifications|RX Vega M GH]]
| rowspan=2 | 1063–1190
| rowspan=4 | 8&nbsp;MB
| rowspan=2 | 100&nbsp;W
| rowspan=5 | {{dts|2018|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/130407.html 8709G]
| rowspan=3 | 4.1
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/130406.html 8706G]
| rowspan=3 | [[Kaby Lake#Discrete GPU specifications|RX Vega M GL]]
| rowspan=3 | 931–1011
| rowspan=3 | 65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/130411.html 8705G]
|-
! rowspan=1 | Core i5
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/130408.html 8305G]
| 2.8
| 3.2
| 350–1000
| 6&nbsp;MB
|}

==== Amber Lake-Y<span class="anchor" id="&quot;Amber Lake-Y&quot; (dual-core, 14 nm)"></span> ====
{{for-text|the Core m3 models|section [[#Amber Lake-Y 2|§ Core M (8th gen) § Amber Lake-Y]] below|the 10th generation series|section [[#Amber Lake-Y (10xxx)|§ Amber Lake-Y (10xxx)]] below}}

Common features:
* Socket: BGA 1515.
* All the CPUs support dual-channel [[LPDDR3]]-1866 or [[DDR3L]]-1600 RAM.
* All CPU models provide 10 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=1 | Core i7
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/185281.html 8500Y]
| rowspan=4 | 2 (4)
| 1.5
| 4.2
| [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 615]]
| rowspan=3 | 300–1050
| rowspan=4 | 4&nbsp;MB
| 5&nbsp;W
| {{dts|2018|August|format=mdy|abbr=off}}
|-
! rowspan=3 | Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/194697.html 8310Y]
| rowspan=2 | 1.6
| 3.9
| rowspan=2 | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 617]]
| rowspan=2 | 7&nbsp;W
| Q1 2019
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/189912.html 8210Y]
| 3.6
| {{dts|2018|October|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/185280.html 8200Y]
| 1.3
| 3.9
| UHD 615
| 300–950
| 5&nbsp;W
| {{dts|2018|August|format=mdy|abbr=off}}
|}

==== Whiskey Lake-U<span class="anchor" id="&quot;Whiskey Lake-U&quot; (dual-core, 14 nm)"></span><span class="anchor" id="&quot;Whiskey Lake-U&quot; (quad-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 1528.
* All the CPUs support dual-channel [[DDR4]]-2400 or [[LPDDR3]]-2133 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/193563.html 8665U]
| rowspan=4 | 4 (8)
| 1.9
| 4.8
| rowspan=5 | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 620]]
| rowspan=2 | 300–1150
| rowspan=2 | 8&nbsp;MB
| rowspan=5 | 15&nbsp;W
| {{dts|2019|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/149091.html 8565U]
| 1.8
| 4.6
| {{dts|2018|August|format=mdy|abbr=off}}
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/193555.html 8365U]
| rowspan=2 | 1.6
| 4.1
| rowspan=2 | 300–1100
| rowspan=2 | 6&nbsp;MB
| {{dts|2019|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/149088.html 8265U]
| rowspan=2 | 3.9
| rowspan=2 | {{dts|2018|August|format=mdy|abbr=off}}
|-
! rowspan=1 | Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/149090.html 8145U]
| 2 (4)
| 2.1
| 300–1000
| 4&nbsp;MB
|}

==== Cannon Lake-U<span class="anchor" id="&quot;Cannon Lake-U&quot; (dual-core, 10 nm)"></span> ====

Common features:
* Socket: BGA 1528.
* All the CPUs support dual-channel [[DDR4]]-2400 or [[LPDDR4]](x)-2400 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[10 nm process|10&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=1 | Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/136863.html 8121U]
| 2 (4)
| 2.2
| 3.2
| colspan=2 {{n/a}}
| 4&nbsp;MB
| 15&nbsp;W
| {{dts|2018|May|format=mdy|abbr=off}}
|}

=== Core M (8th gen) ===

==== Amber Lake-Y ====

Core m5 and Core m7 models were rebranded as Core i5 and Core i7.

Common features:
* Socket: BGA 1515.
* All the CPUs support dual-channel [[DDR3L]]-1600 or [[LPDDR3]]-1866 RAM.
* All CPU models provide 10 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! Core m3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/185282.html 8100Y]
| 2 (4)
| 1.1
| 3.4
| [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 615]]
| 300–900
| 4&nbsp;MB
| 5&nbsp;W
| {{dts|2018|August|format=mdy|abbr=off}}
|}

=== Core i (9th gen) ===

==== Coffee Lake-H (refresh) ====

Common features:
* Socket: BGA 1440.
* All the CPUs support dual-channel [[DDR4]]-2666 or [[LPDDR3]]-2133 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* K-suffix processors have an unlocked multiplier, allowing it to be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="2" | Core i9
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/192990.html 9980HK]
| rowspan="2" | 8 (16)
| 2.4
| 5.0
| rowspan="4" | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 630]]
| 350–1250
| rowspan="2" | 16&nbsp;MB
| rowspan="8" | 45&nbsp;W
| rowspan="8" | {{dts|2019|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/192987.html 9880H]
|2.3
|4.8
|350–1200
|-
! rowspan="3" |Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/191047.html 9850H]
| rowspan="3" |6 (12)
| rowspan="3" |2.6
|4.6
| rowspan="2" |350–1150
| rowspan="3" |12&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/191045.html 9750H]
| rowspan="2" |4.5
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/191046.html 9750HF]
| colspan="2" {{n/a}}
|-
! rowspan="3" |Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/191078.html 9400H]
| rowspan="3" |4 (8)
|2.5
|4.3
| rowspan="2" |UHD 630
|350–1100
| rowspan="3" |8&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/191075.html 9300H]
| rowspan="2" |2.4
| rowspan="2" |4.1
|350–1050
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/191080.html 9300HF]
| colspan="2" {{n/a}}
|}

=== Core i (10th gen) ===

==== Comet Lake-U<span class="anchor" id="&quot;Comet Lake-U&quot; (dual-core, 14 nm)"></span><span class="anchor" id="&quot;Comet Lake-U&quot; (quad-core, 14 nm)"></span><span class="anchor" id="&quot;Comet Lake-U&quot; (14 nm)"></span> ====

Common features:
* Socket: BGA 1528.
* All the CPUs support dual-channel [[DDR4]]-2666, [[LPDDR4]]-2933 or [[LPDDR3]]-2133 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="4" | Core i7
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/196448.html 10810U]
| rowspan="2" | 6 (12)
| rowspan="2" | 1.1
| rowspan="2" | 4.7
| rowspan="7" | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 620]]
| rowspan="5" | 300–1150
| rowspan="2" | 12&nbsp;MB
| rowspan="7" | 15&nbsp;W
| {{dts|2020|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/196448.html 10710U]
| {{dts|2019|August|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/201896.html 10610U]
| rowspan="4" |4 (8)
| rowspan="2" |1.8
| rowspan="2" |4.9
| rowspan="2" |8&nbsp;MB
| {{dts|2020|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/196449.html 10510U]
| {{dts|2019|August|format=mdy|abbr=off}}
|-
! rowspan="2" |Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/201892.html 10310U]
|1.7
|4.4
| rowspan="2" |6&nbsp;MB
| {{dts|2020|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/195436.html 10210U]
|1.6
|4.2
|300–1100
| rowspan="2" | {{dts|2019|August|format=mdy|abbr=off}}
|-
!Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/196451.html 10110U]
|2 (4)
|2.1
|4.1
|300–1000
|4&nbsp;MB
|}

==== Comet Lake-H<span class="anchor" id="&quot;Comet Lake-H&quot; (quad-core, 14 nm)"></span><span class="anchor" id="&quot;Comet Lake-H&quot; (14 nm)"></span><span class="anchor" id="Comet Lake-H (14 nm, 10th generation)"></span> ====

Common features:
* Socket: BGA 1440.
* All the CPUs support dual-channel [[DDR4]] RAM, at up to 2933&nbsp;MT/s speed.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* K-suffix processors have an unlocked multiplier, allowing it to be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="3" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | {{abbr|TVB|Thermal Velocity Boost}}
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="2" | Core i9
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/201838.html 10980HK]
| rowspan="4" | 8 (16)
| rowspan="2" | 2.4
| rowspan="2" | 5.1
| rowspan="2" | 5.3
| rowspan="10" | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 630]]
| rowspan="2" | 350–1250
| rowspan="4" | 16&nbsp;MB
| rowspan="10" | 45&nbsp;W
| {{dts|2020|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/203682.html 10885H]
| {{dts|2020|May|format=mdy|abbr=off}}
|-
! rowspan="4" |Core i7
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/202329.html 10875H]
|2.3
|4.9
|5.1
| rowspan="2" |350–1200
| {{dts|2020|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/208018.html 10870H]
|2.2
|4.8
|5.0
| {{dts|2020|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/201897.html 10850H]
| rowspan="3" |6 (12)
|2.7
|4.9
|5.1
| rowspan="2" |350–1150
| rowspan="3" |12&nbsp;MB
| rowspan="2" | {{dts|2020|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/201837.html 10750H]
|2.6
|4.8
|5.0
|-
! rowspan="4" |Core i5
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/201905.html 10500H]
|2.5
|4.5
| rowspan="4" {{n/a}}
|350–1050
| {{dts|2020|December|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/201895.html 10400H]
| rowspan="3" |4 (8)
|2.6
|4.6
|350–1100
| rowspan="3" |8&nbsp;MB
| rowspan="2" | {{dts|2020|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/201839.html 10300H]
|2.5
|4.5
| rowspan="2" |350–1050
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/208016.html 10200H]
|2.4
|4.1
| {{dts|2020|August|format=mdy|abbr=off}}
|}

==== Ice Lake-U<span class="anchor" id="&quot;Ice Lake-U&quot; (dual-core, 10 nm)"></span><span class="anchor" id="&quot;Ice Lake-U&quot; (quad-core, 10 nm)"></span> ====

Common features:
* Socket: BGA 1526, except for models with 'N' in the name which use a smaller BGA 1344 package.
* All the CPUs support dual-channel [[DDR4]]-3200 or [[LPDDR4]]-3733 RAM.
* [[PCIe 3.0]] support.
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 512&nbsp;KB per core.
* Fabrication process: [[10 nm process|10&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="3" | Core i7
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/196593.html 1068NG7]
| rowspan="7" | 4 (8)
| rowspan="2" | 2.3
| rowspan="2" | 4.1
| rowspan="5" | [[Intel Graphics Technology#Ice Lake|Iris Plus (G7)]]
| rowspan="3" | 300–1100
| rowspan="3" | 8&nbsp;MB
| rowspan="2" | 28&nbsp;W
| {{dts|2020|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | 1068G7<ref>{{cite web |last1=Pirzada |first1=Usman |title=Intel Launches 10th Generation 10nm 'Ice Lake' Mobility Processors - Led By Core i7 1068G7 Flagship With 3.6 GHZ All Core Boost |url=https://wccftech.com/intel-launches-10th-generation-10nm-ice-lake-mobility-processors-led-by-core-i7-1068g7-flagship-with-3-6-ghz-all-core-boost/ |website=Wccftech |access-date=7 February 2024 |date=1 August 2019 |archive-date=May 1, 2023 |archive-url=https://web.archive.org/web/20230501114942/https://wccftech.com/intel-launches-10th-generation-10nm-ice-lake-mobility-processors-led-by-core-i7-1068g7-flagship-with-3-6-ghz-all-core-boost/ |url-status=live }}</ref>
| rowspan="2" | {{dts|2019|August|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/196597.html 1065G7]
|1.3
|3.9
|15&nbsp;W
|-
! rowspan="4" |Core i5
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/196594.html 1038NG7]
|2.0
|3.8
| rowspan="4" |300–1050
| rowspan="4" |6&nbsp;MB
|28&nbsp;W
| {{dts|2020|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/196592.html 1035G7]
|1.2
| rowspan="2" |3.7
| rowspan="4" |15&nbsp;W
| rowspan="4" | {{dts|2019|August|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/196591.html 1035G4]
|1.1
|[[Intel Graphics Technology#Ice Lake|Iris Plus (G4)]]
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/196603.html 1035G1]
|1.0
|3.6
| rowspan="2" |[[Intel Graphics Technology#Ice Lake|UHD Graphics (G1)]]
|-
! rowspan=1 | Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/196588.html 1005G1]
|2 (4)
|1.2
|3.4
|300–900
|4&nbsp;MB
|}

==== Ice Lake-Y<span class="anchor" id="&quot;Ice Lake-Y&quot; (dual-core, 10 nm)"></span><span class="anchor" id="&quot;Ice Lake-Y&quot; (quad-core, 10 nm)"></span> ====

Common features:
* Socket: BGA 1377, except for models with 'N' in the name which use a smaller BGA 1044 package.
* All the CPUs support dual-channel [[LPDDR4]] RAM, at up to 3733&nbsp;MT/s speed.
* [[PCIe 3.0]] support.
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 512&nbsp;KB per core.
* Fabrication process: [[10 nm process|10&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=1 | Core i7
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/197120.html 1060G7]
| rowspan="4" | 4 (8)
| 1.0
| 3.8
| rowspan="3" | [[Intel Graphics Technology#Ice Lake|Iris Plus (G7)]]
| 300–1100
| 8&nbsp;MB
| 9&nbsp;W
| Q3 2019
|-
! rowspan="3" |Core i5
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/196589.html 1030NG7]
|1.1
| rowspan="3" |3.5
| rowspan="3" |300–1050
| rowspan="3" |6&nbsp;MB
|10&nbsp;W
|Q2 2020
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/197119.html 1030G7]
|0.8
| rowspan="5" |9&nbsp;W
| rowspan="2" |Q3 2019
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/197121.html 1030G4]
|0.7
| rowspan="3" |[[Intel Graphics Technology#Ice Lake|Iris Plus (G4)]]
|-
! rowspan="3" |Core i3
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/196586.html 1000NG4]
| rowspan="3" |2 (4)
| rowspan="3" |1.1
| rowspan="3" |3.2
| rowspan="3" |300–900
| rowspan="3" |4&nbsp;MB
|Q2 2020
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/197123.html 1000G4]
| rowspan="2" |Q3 2019
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/197122.html 1000G1]
|[[Intel Graphics Technology#Ice Lake|UHD Graphics (G1)]]
|}

==== Amber Lake-Y (10xxx)<span class="anchor" id="&quot;Amber Lake-Y&quot; (quad-core, 14 nm)"></span> ====

Common features:
* Socket: BGA 1377, except for i3-10100Y which uses a smaller BGA package of unknown name.
* All the CPUs support dual-channel [[DDR3L]]-1600 or [[LPDDR3]]-1866 RAM. Models i3-10110Y and up support LPDDR3 at up to 2133&nbsp;MT/s speed.
* All CPU models provide 10 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=1 | Core i7
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/196452.html 10510Y]
| rowspan=3 | 4 (8)
| 1.2
| 4.5
| rowspan=4 | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 620]]
| 300–1150
| 8&nbsp;MB
| rowspan=4 | 7&nbsp;W
| rowspan=4 | {{dts|2019|August|format=mdy|abbr=off}}
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/196453.html 10310Y]
| 1.1
| 4.1
| rowspan=2 | 300–1050
| rowspan=2 | 6&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/196454.html 10210Y]
| rowspan=2 | 1.0
| rowspan=2 | 4.0
|-
! rowspan=2 | Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/196455.html 10110Y]
| rowspan=2 | 2 (4)
| rowspan=2 | 300–1000
| rowspan=2 | 4&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/213356.html 10100Y]
| 1.3
| 3.9
| [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 615]]
| 5&nbsp;W
| {{dts|2021|January|format=mdy|abbr=off}}
|}

=== Core i (11th gen) ===

==== Tiger Lake-UP3<span class="anchor" id="&quot;Tiger Lake-UP3&quot; (10 nm SuperFin)"></span> ====

Common features:
* Socket: BGA 1449.
* All the CPUs support dual-channel [[DDR4]]-3200 or [[LPDDR4X]]-3733 RAM. i5 models and up support LPDDR4X at up to 4266&nbsp;MT/s speed.
* All CPU models provide 4 lanes of [[PCIe 4.0]], in addition to PCIe 3.0 provided by the on-package PCH.
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 1.25&nbsp;MB per core.
* Fabrication process: [[10 nm process|10&nbsp;nm]].
* The base clock speed that the CPU runs at corresponds with the configurable TDP (cTDP) setting chosen.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="3" | Core i7
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/217181.html 1195G7]
| rowspan="7" | 4 (8)
| 1.3–2.9
| 5.0
| rowspan="3" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| ?–1400
| rowspan="3" | 12&nbsp;MB
| rowspan="8" | 12–28&nbsp;W
| {{dts|2021|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/208664.html 1185G7]
|1.2–3.0
|4.8
|?–1350
| rowspan="2" | {{dts|2020|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/208921.html 1165G7]
|1.2–2.8
|4.7
|?–1300
|-
! rowspan="3" |Core i5
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/217184.html 1155G7]
|1.0–2.5
|4.5
| rowspan="3" |Iris Xe<br />(80 EU)
|?–1350
| rowspan="4" |8&nbsp;MB
| {{dts|2021|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/208660.html 1145G7]
|1.1–2.6
|4.4
| rowspan="2" |?–1300
| {{dts|2021|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/208922.html 1135G7]
|0.9–2.4
|4.2
| {{dts|2020|September|format=mdy|abbr=off}}
|-
! rowspan="2" |Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/209735.html 1125G4]
|0.9–2.0
|3.7
| rowspan="2" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(48 EU)
| rowspan="2" |?–1250
|Q1 2021
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/208652.html 1115G4]
|2 (4)
|1.7–3.0
|4.1
|6&nbsp;MB
| {{dts|2020|September|format=mdy|abbr=off}}
|}

==== Tiger Lake-UP4<span class="anchor" id="&quot;Tiger Lake-UP4&quot; (10 nm SuperFin)"></span> ====

Common features:
* Socket: BGA 1598.
* All the CPUs support dual-channel [[LPDDR4X]]-4266 RAM.
* All CPU models provide 4 lanes of [[PCIe 4.0]], in addition to PCIe 3.0 provided by the on-package PCH.
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 1.25&nbsp;MB per core.
* Fabrication process: [[10 nm process|10&nbsp;nm]].
* The base clock speed that the CPU runs at corresponds with the configurable TDP (cTDP) setting chosen.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/208663.html 1180G7]
| rowspan=5 | 4 (8)
| 0.9–2.2
| 4.6
| rowspan=2 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| rowspan=6 | ?–1100
| rowspan=2 | 12&nbsp;MB
| rowspan=6 | 7–15&nbsp;W
| {{dts|2021|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/208661.html 1160G7]
| 0.9–2.1
| 4.4
| {{dts|2020|September|format=mdy|abbr=off}}
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/208659.html 1140G7]
| rowspan=2 | 0.8–1.8
| 4.2
| rowspan=2 | Iris Xe<br />(80 EU)
| rowspan=3 | 8&nbsp;MB
| {{dts|2021|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/208657.html 1130G7]
| 4.0
| {{dts|2020|September|format=mdy|abbr=off}}
|-
! rowspan=2 | Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/209736.html 1120G4]
| 0.8–1.5
| 3.5
| rowspan=2 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(48 EU)
| Q1 2021
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/208651.html 1110G4]
| 2 (4)
| 1.8
| 3.9
| 6&nbsp;MB
| {{dts|2020|September|format=mdy|abbr=off}}
|}

==== Tiger Lake-H<span class="anchor" id="&quot;Tiger Lake-H&quot; (10 nm SuperFin)"></span> ====

Common features:
* Socket: BGA 1598.
* All the CPUs support dual-channel [[DDR4]]-3200 RAM.
* All CPU models provide 20 lanes of [[PCIe 4.0]], in addition to 24 lanes of PCIe 3.0 provided by the on-package PCH.
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 1.25&nbsp;MB per core.
* Fabrication process: [[10 nm process|10&nbsp;nm]].
* The base clock speed that the CPU runs at corresponds with the configurable TDP (cTDP) setting chosen.
* K-suffix processors have an unlocked multiplier, allowing it to be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="3" | Core i9
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/213800.html 11980HK]
| rowspan="5" | 8 (16)
| 2.6–3.3
| rowspan="2" | 5.0
| rowspan="7" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(32 EU)
| rowspan="8" | 350–1450
| rowspan="5" | 24&nbsp;MB
| rowspan=1 | 45–65&nbsp;W
| rowspan="5" | {{dts|2021|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/213798.html 11950H]
|2.1–2.6
| rowspan="8" |35–45&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/213801.html 11900H]
| rowspan="2" |2.1–2.5
|4.9
|-
! rowspan="3" |Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/213799.html 11850H]
|4.8
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/213803.html 11800H]
|1.9–2.3
| rowspan="3" |4.6
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/213802.html 11600H]
| rowspan="4" |6 (12)
|2.5–2.9
|18&nbsp;MB
| {{dts|2021|July|format=mdy|abbr=off}}
|-
! rowspan="3" |Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/213804.html 11500H]
|2.4–2.9
| rowspan="3" |12&nbsp;MB
| rowspan="3" | {{dts|2021|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/213805.html 11400H]
|2.2–2.7
|4.5
| rowspan="2" | UHD Graphics<br />(16 EU)
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/213806.html 11260H]
|2.1–2.6
|4.4
|350–1400
|}

==== Tiger Lake-H35<span class="anchor" id="&quot;Tiger Lake-H35&quot; (10 nm SuperFin)"></span> ====

Common features:
* Socket: BGA 1449.
* All the CPUs support dual-channel [[DDR4]]-3200 or [[LPDDR4X]]-4266 RAM.
* [[PCIe 4.0]] support; 12× PCIe lanes provided by on-package PCH are revision 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 1.25&nbsp;MB per core.
* Fabrication process: [[10 nm process|10&nbsp;nm]].
* The base clock speed that the CPU runs at corresponds with the configurable TDP (cTDP) setting chosen.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=3 | Core i7
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/217182.html 11390H]
| rowspan=5 | 4 (8)
| 2.9–3.4
| rowspan=2 | 5.0
| rowspan=4 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| ?–1400
| rowspan=3 | 12&nbsp;MB
| rowspan=5 | 28–35&nbsp;W
| {{dts|2021|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/197384.html 11375H]
| rowspan=2 | 3.0–3.3
| rowspan=3 | ?–1350
| rowspan=2 | {{dts|2021|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/196655.html 11370H]
| 4.8
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/217183.html 11320H]
| 2.5–3.2
| 4.5
| rowspan=2 | 8&nbsp;MB
| {{dts|2021|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/196656.html 11300H]
| 2.6–3.1
| 4.4
| Iris Xe<br />(80 EU)
| ?–1300
| {{dts|2021|January|format=mdy|abbr=off}}
|}

=== Core i (12th gen) ===

==== Alder Lake-U<span class="anchor" id="&quot;Alder Lake-U&quot; (Intel 7)"></span> ====

Common features:
* Socket: BGA 1781 (ix-12x0U), BGA 1744 (ix-12x5U).
* All the CPUs support dual-channel [[LPDDR5]]-5200 or [[LPDDR4X]]-4266 RAM. ix-12x5U models also support dual-channel [[DDR5]]-4800 and [[DDR4]]-3200 RAM in addition.
* ix-12x0 models provide 4 lanes of [[PCIe 4.0]] and 8 lanes of PCIe 3.0, while ix-12x5U models provide 8 lanes of PCIe 4.0 and 12 lanes of PCIe 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 1.25&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].<ref>{{Cite web |last=Ali |first=Yusuf |date=19 October 2024 |title=i7-1365u vs i7-1260u Gaming: Performance Showdown |url=https://techupdaily.site/i7-1365u-vs-i7-1260u-gaming-performance-showdown/ |access-date=23 October 2024 |website=TechUp Daily}}</ref>

{| class="wikitable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! rowspan="2" class="unsortable" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="4" | Core i7
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/226258.html 1265U]
| rowspan="10" | 2 (4)
| 1.8
| 4.8
| rowspan="8" | 8 (8)
| 1.3
| 3.6
| rowspan="4" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| ?–1250
| rowspan="8" | 12&nbsp;MB
| 15&nbsp;W
| 55&nbsp;W
| rowspan="10" | {{dts|2022|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/226455.html 1260U]
|1.6
| rowspan="3" |4.7
|0.8
| rowspan="3" |3.5
|?–950
|9&nbsp;W
|29&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/226259.html 1255U]
|1.7
|1.2
|?–1250
|15&nbsp;W
|55&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/226454.html 1250U]
|1.1
|0.8
|?–950
|9&nbsp;W
|29&nbsp;W
|-
! rowspan="4" |Core i5
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/226260.html 1245U]
|1.6
| rowspan="6" |4.4
|1.2
| rowspan="6" |3.3
| rowspan="4" |Iris Xe<br />(80 EU)
|?–1200
|15&nbsp;W
|55&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/226452.html 1240U]
|1.1
|0.8
|?–900
|9&nbsp;W
|29&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/226261.html 1235U]
|1.3
|0.9
|?–1200
|15&nbsp;W
|55&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/226453.html 1230U]
|1.0
|0.7
|?–850
|9&nbsp;W
|29&nbsp;W
|-
! rowspan="2" |Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/226263.html 1215U]
|1.2
| rowspan="2" |4 (4)
|0.9
| rowspan="2" |[[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(64 EU)
|?–1100
| rowspan="2" |10&nbsp;MB
|15&nbsp;W
|55&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/226451.html 1210U]
|1.0
|0.7
|?–850
|9&nbsp;W
|29&nbsp;W
|}

==== Alder Lake-P<span class="anchor" id="&quot;Alder Lake-P&quot; (Intel 7)"></span> ====

Common features:
* Socket: BGA 1744.
* All the CPUs support dual-channel [[DDR5]]-4800, [[DDR4]]-3200, [[LPDDR5]]-5200 or [[LPDDR4X]]-4266 RAM.
* All CPU models provide 8 lanes of [[PCIe 4.0]] and 12 lanes of PCIe 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 1.25&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].
* The following models are available with IPU (image processing unit): [https://ark.intel.com/content/www/us/en/ark/products/226266.html i5-1235U], [https://ark.intel.com/content/www/us/en/ark/products/226269.html i3-1215U]. Specifications between them and the respective processor without IPU are completely identical, apart from the addition of the IPU.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="3" | Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/226253.html 1280P]
| 6 (12)
| 1.8
| rowspan="2" | 4.8
| rowspan="6" | 8 (8)
| 1.3
| 3.6
| rowspan="3" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| ?–1450
| 24&nbsp;MB
| rowspan="6" | 28&nbsp;W
| rowspan="6" | 64&nbsp;W
| rowspan="6" | {{dts|2022|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/226255.html 1270P]
| rowspan="4" |4 (8)
|2.2
|1.6
|3.5
| rowspan="3" |?–1400
| rowspan="2" |18&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/226254.html 1260P]
|2.1
|4.7
|1.5
|3.4
|-
! rowspan="2" |Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/226256.html 1250P]
| rowspan="2" |1.7
| rowspan="3" |4.4
| rowspan="2" |1.2
| rowspan="3" |3.3
| rowspan="2" |Iris Xe<br />(80 EU)
| rowspan="3" |12&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/132221.html 1240P]
|?–1300
|-
!Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/226257.html 1220P]
|2 (4)
|1.5
|1.1
|[[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(64 EU)
|?–1100
|}

==== Alder Lake-H<span class="anchor" id="&quot;Alder Lake-H&quot; (Intel 7)"></span> ====

Common features:
* Socket: BGA 1744.
* All the CPUs support dual-channel [[DDR5]]-4800, [[DDR4]]-3200, [[LPDDR5]]-5200 or [[LPDDR4X]]-4266 RAM.
* All CPU models provide 16 lanes of [[PCIe 4.0]], in addition to 12 lanes of PCIe 3.0 provided by the on-package PCH.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 1.25&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].
* K-suffix processors have an unlocked multiplier, allowing it to be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="2" | Core i9
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/132215.html 12900HK]
| rowspan="5" | 6 (12)
| rowspan="2" | 2.5
| rowspan="2" | 5.0
| rowspan="4" | 8 (8)
| rowspan="3" | 1.8
| rowspan="2" | 3.8
| rowspan="4" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| rowspan="2" | ?–1450
| rowspan="5" | 24&nbsp;MB
| rowspan="8" | 45&nbsp;W
| rowspan="5" | 115&nbsp;W
| rowspan="8" | {{dts|2022|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/132214.html 12900H]
|-
! rowspan="3" |Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/226059.html 12800H]
|2.4
|4.8
|3.7
| rowspan="4" |?–1400
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/132228.html 12700H]
| rowspan="2" |2.3
| rowspan="2" |4.7
| rowspan="2" |1.7
| rowspan="2" |3.5
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/226066.html 12650H]
|4 (4)
|[[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(64 EU)
|-
! rowspan="3" |Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/96156.html 12600H]
| rowspan="3" |4 (8)
|2.7
| rowspan="2" |4.5
| rowspan="2" |8 (8)
|2.0
| rowspan="3" |3.3
| rowspan="2" |Iris Xe<br />(80 EU)
| rowspan="2" |18&nbsp;MB
| rowspan="3" |95&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/96141.html 12500H]
|2.5
|1.8
|?–1300
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/132222.html 12450H]
|2.0
|4.4
|4 (4)
|1.5
|UHD Graphics<br />(48 EU)
|?–1200
|12&nbsp;MB
|}

==== Alder Lake-HX<span class="anchor" id="&quot;Alder Lake-HX&quot; (Intel 7)"></span> ====

Common features:
* Socket: BGA 1964.
* All the CPUs support dual-channel [[DDR5]]-4800 or [[DDR4]]-3200 RAM.
* All CPU models provide 16 lanes of [[PCIe 5.0]] and 4 lanes of PCIe 4.0, in addition to 16 lanes of PCIe 4.0 and 12 lanes of PCIe 3.0 provided by the on-package PCH.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the on-package chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 1.25&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].
* The i9 models have unlocked multipliers, allowing them to be overclocked.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="2" | Core i9
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/228439.html 12950HX]
| rowspan="4" | 8 (16)
| rowspan="2" | 2.3
| rowspan="2" | 5.0
| rowspan="6" | 8 (8)
| rowspan="2" | 1.7
| rowspan="2" | 3.6
| rowspan="6" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(32 EU)
| rowspan="2" | ?–1550
| rowspan="2" | 30&nbsp;MB
| rowspan="7" | 55&nbsp;W
| rowspan="7" | 157&nbsp;W
| rowspan="7" | {{dts|2022|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/228441.html 12900HX]
|-
! rowspan="3" |Core i7
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/228442.html 12850HX]
|2.1
| rowspan="2" |4.8
| rowspan="3" |1.5
| rowspan="2" |3.4
| rowspan="3" |?–1450
| rowspan="2" |25&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/226058.html 12800HX]
| rowspan="2" |2.0
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/228795.html 12650HX]
|6 (12)
|4.7
| rowspan="2" |3.3
|24&nbsp;MB
|-
! rowspan="2" |Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/228438.html 12600HX]
| rowspan="2" |4 (8)
|2.5
|4.6
| rowspan="2" |1.8
|?–1350
|18&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/228794.html 12450HX]
|2.4
|4.4
|4 (4)
|3.1
| UHD Graphics<br />(16 EU)
|?–1300
|12&nbsp;MB
|}

==== Alder Lake-N<span class="anchor" id="&quot;Alder Lake-N&quot; (Intel 7)"></span> ====

These are essentially "E-core-only" CPUs, utilizing the [[Gracemont (microarchitecture)|Gracemont]] architecture.

Common features:
* Socket: BGA 1264.
* All the CPUs support dual-channel [[DDR5]]-4800, [[DDR4]]-3200 or [[LPDDR5]]-4800 RAM.
* All CPU models provide 9 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 2&nbsp;MB per cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
! Base
! class="unsortable" | Max.<br />Turbo
|-
! rowspan=2 | Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/231805.html N305]
| rowspan=2 | 8 (8)
| 1.8
| rowspan=2 | 3.8
| rowspan=2 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(32 EU)
| rowspan=2 | ?–1250
| rowspan=2 | 6&nbsp;MB
| 15&nbsp;W
| 35&nbsp;W
| rowspan=2 | {{dts|2023|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/231806.html N300]
| 0.8
| 7&nbsp;W
| 25&nbsp;W
|}

=== Core i (13th gen) ===

==== Raptor Lake-U<span class="anchor" id="&quot;Raptor Lake-U&quot; (Intel 7)"></span> ====

Common features:
* Socket: BGA 1744.
* All the CPUs support dual-channel [[DDR5]]-5200, [[DDR4]]-3200, [[LPDDR5]]-6400 or [[LPDDR4X]]-4266 RAM.
* All CPU models provide 8 lanes of [[PCIe 4.0]] and 12 lanes of PCIe 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 1.25&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].
* The [https://ark.intel.com/content/www/us/en/ark/products/233459.html i3-1315U] is available with IPU (image processing unit). Specifications between it and the respective processor without IPU are completely identical, apart from the addition of the IPU.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="2" | Core i7
! style="text-align:left;" data-sort-value="sku7" | [https://www.intel.com/content/www/us/en/products/sku/232141.html 1365U]
| rowspan=6 | 2 (4)
| 1.8
| 5.2
| rowspan="5" | 8 (8)
| 1.3
| 3.9
| rowspan="2" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| rowspan="2" | ?–1300
| rowspan="5" | 12&nbsp;MB
| rowspan="7" | 15&nbsp;W
| rowspan="7" | 55&nbsp;W
| rowspan="7" | {{dts|2023|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://www.intel.com/content/www/us/en/products/sku/232160.html 1355U]
|1.7
|5.0
| rowspan="2" |1.2
|3.7
|-
! rowspan="3" |Core i5
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/232127.html 1345U]
|1.6
|4.7
|3.5
| rowspan="3" |Iris Xe<br />(80 EU)
| rowspan="5" |?–1250
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/232153.html 1335U]
| rowspan="2" |1.3
| rowspan="2" |4.6
| rowspan="3" |0.9
| rowspan="2" |3.4
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/232143.html 1334U]
|-
! rowspan="2" |Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/232136.html 1315U]
|1.2
| rowspan="2" |4.5
| rowspan="2" |4 (4)
| rowspan="2" |3.3
| rowspan="2" |[[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(64 EU)
| rowspan="2" |10&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/232909.html 1305U]
| 1 (2)
|1.6
|1.2
|}

==== Raptor Lake-P<span class="anchor" id="&quot;Raptor Lake-P&quot; (Intel 7)"></span> ====

Common features:
* Socket: BGA 1744.
* All the CPUs support dual-channel [[DDR5]]-5200, [[DDR4]]-3200, [[LPDDR5]]-6400 or [[LPDDR4X]]-4266 RAM.
* All CPU models provide 8 lanes of [[PCIe 4.0]] and 12 lanes of PCIe 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (32&nbsp;KB data + 64&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: (up to) 2&nbsp;MB per core.
** E-cores: (up to) 4&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku4" | [https://www.intel.com/content/www/us/en/products/sku/232146.html 1370P]
| 6 (12)
| 1.9
| 5.2
| rowspan=4 | 8 (8)
| 1.4
| 3.9
| rowspan=2 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| rowspan=3 | ?–1500
| 24&nbsp;MB
| rowspan=4 | 28&nbsp;W
| rowspan=4 | 64&nbsp;W
| rowspan=4 | {{dts|2023|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://www.intel.com/content/www/us/en/products/sku/232155.html 1360P]
| rowspan=3 | 4 (8)
| 2.2
| 5.0
| 1.6
| 3.7
| 18&nbsp;MB
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://www.intel.com/content/www/us/en/products/sku/232103.html 1350P]
| rowspan=2 | 1.9
| 4.7
| rowspan=2 | 1.4
| 3.5
| rowspan=2 | Iris Xe<br />(80 EU)
| rowspan=2 | 12&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku1" | [https://www.intel.com/content/www/us/en/products/sku/232126.html 1340P]
| 4.6
| 3.4
| ?–1450
|}

==== Raptor Lake-H<span class="anchor" id="&quot;Raptor Lake-H&quot; (Intel 7)"></span> ====

Common features:
* Socket: BGA 1744.
* All the CPUs support dual-channel [[DDR5]]-5200, [[DDR4]]-3200, [[LPDDR5]]-6400 or [[LPDDR4X]]-4266 RAM.
* All CPU models provide 8 lanes of [[PCIe 5.0]] and 8 lanes of PCIe 4.0, in addition to 12 lanes of PCIe 3.0 provided by the on-package PCH.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core.
** E-cores: 4&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].
* K-suffix processors have an unlocked multiplier, allowing it to be overclocked.
* The [https://www.intel.com/content/www/us/en/products/sku/233458.html i5-13500H] is available with IPU (image processing unit). Specifications between it and the respective processor without IPU are completely identical, apart from the addition of the IPU.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="2" | Core i9
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/232144.html 13900HK]
| rowspan="5" | 6 (12)
| rowspan="2" | 2.6
| rowspan="2" | 5.4
| rowspan="4" | 8 (8)
| rowspan="2" | 1.9
| rowspan="2" | 4.1
| rowspan="4" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| rowspan="6" | ?–1500
| rowspan="5" | 24&nbsp;MB
| rowspan="8" | 45&nbsp;W
| rowspan="5" | 115&nbsp;W
| rowspan="8" | {{dts|2023|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/232135.html 13900H]
|-
! rowspan="3" |Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://www.intel.com/content/www/us/en/products/sku/232164.html 13800H]
|2.5
|5.2
| rowspan="3" |1.8
|4.0
|-
! style="text-align:left;" data-sort-value="sku5" | [https://www.intel.com/content/www/us/en/products/sku/232128.html 13700H]
| rowspan="2" |2.4
|5.0
|3.7
|-
! style="text-align:left;" data-sort-value="sku4" | [https://www.intel.com/content/www/us/en/products/sku/232130.html 13620H]
|4.9
|4 (4)
| rowspan="2" |3.6
|[[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(64 EU)
|-
! rowspan="3" |Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://www.intel.com/content/www/us/en/products/sku/232145.html 13600H]
| rowspan="3" |4 (8)
|2.8
|4.8
| rowspan="2" |8 (8)
|2.1
| rowspan="2" |Iris Xe<br />(80 EU)
| rowspan="2" |18&nbsp;MB
| rowspan="3" |95&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/232147.html 13500H]
|2.6
|4.7
|1.9
|3.5
|?–1450
|-
! style="text-align:left;" data-sort-value="sku1" | [https://www.intel.com/content/www/us/en/products/sku/232173.html 13420H]
|2.1
|4.6
|4 (4)
|1.5
|3.4
|UHD Graphics<br />(48 EU)
|?–1400
|12&nbsp;MB
|}

==== Raptor Lake-PX<span class="anchor" id="&quot;Raptor Lake-PX&quot; (Intel 7)"></span> ====

Common features:
* Socket: BGA 1792.
* All the CPUs support dual-channel [[DDR5]]-5200, [[DDR4]]-3200, [[LPDDR5]]-6400 or [[LPDDR4X]]-4266 RAM.
* All CPU models provide 8 lanes of [[PCIe 5.0]] and 8 lanes of PCIe 4.0, in addition to 12 lanes of PCIe 3.0 provided by the on-package PCH.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core.
** E-cores: 4&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core i9
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/232172.html 13905H]
| rowspan=2 | 6 (12)
| 2.6
| 5.4
| rowspan=3 | 8 (8)
| 1.9
| 4.1
| rowspan=2 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| rowspan=2 | ?–1500
| rowspan=2 | 24&nbsp;MB
| rowspan=3 | 45&nbsp;W
| rowspan=3 | 115&nbsp;W
| rowspan=3 | {{dts|2023|January|format=mdy|abbr=off}}
|-
! Core i7
! style="text-align:left;" data-sort-value="sku2" | [https://www.intel.com/content/www/us/en/products/sku/232139.html 13705H]
| 2.4
| 5.0
| 1.8
| 3.7
|-
! Core i5
! style="text-align:left;" data-sort-value="sku1" | [https://www.intel.com/content/www/us/en/products/sku/232107.html 13505H]
| 4 (8)
| 2.6
| 4.7
| 1.9
| 3.5
| Iris Xe<br />(80 EU)
| ?–1450
| 18&nbsp;MB
|}

==== Raptor Lake-HX<span class="anchor" id="&quot;Raptor Lake-HX&quot; (Intel 7)"></span> ====
{{for-text|the 14th generation refresh|section [[#Raptor Lake-HX Refresh|§ Raptor Lake-HX Refresh]] below}}

Common features:
* Socket: BGA 1964.
* All the CPUs support dual-channel [[DDR5]]-4800 or [[DDR4]]-3200 RAM. Models i7-13850HX and up support DDR5 at up to 5600&nbsp;MT/s speed.
* All CPU models provide 16 lanes of [[PCIe 5.0]] and 4 lanes of PCIe 4.0, in addition to 16 lanes of PCIe 4.0 and 12 lanes of PCIe 3.0 provided by the on-package PCH.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the on-package chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core.
** E-cores: 4&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].
* All models support CPU, iGPU, and memory overclocking.<ref>{{Cite web |last=Intel Corporation |title=13th Gen Intel Core Mobile Processor Product Brief |url=https://www.intel.com/content/www/us/en/products/docs/processors/core/13th-gen-core-mobile-brief.html |access-date=2023-01-07 |website=Intel |language=en |archive-date=May 11, 2023 |archive-url=https://web.archive.org/web/20230511222628/http://www.intel.com/content/www/us/en/products/docs/processors/core/13th-gen-core-mobile-brief.html |url-status=live }}</ref>
* i9-13980HX features Thermal Velocity Boost. Without it enabled, the maximum boost clock speed is 0.1&nbsp;GHz lower.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="3" | Core i9
! style="text-align:left;" data-sort-value="sku9" | [https://www.intel.com/content/www/us/en/products/sku/232138.html 13980HX]
| rowspan="5" | 8 (16)
| rowspan="3" | 2.2
| rowspan=1 | 5.6
| rowspan="3" | 16 (16)
| rowspan="3" | 1.6
| rowspan="2" | 4.0
| rowspan="5" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(32 EU)
| rowspan="3" | ?–1650
| rowspan="3" | 36&nbsp;MB
| rowspan="9" | 55&nbsp;W
| rowspan="9" | 157&nbsp;W
| rowspan="9" | {{dts|2023|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku8" | [https://www.intel.com/content/www/us/en/products/sku/232149.html 13950HX]
|5.5
|-
! style="text-align:left;" data-sort-value="sku7" | [https://www.intel.com/content/www/us/en/products/sku/232171.html 13900HX]
|5.4
|3.9
|-
! rowspan="3" |Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://www.intel.com/content/www/us/en/products/sku/232161.html 13850HX]
| rowspan="2" |2.1
|5.1
|12 (12)
| rowspan="2" |1.5
|3.8
|?–1600
| rowspan="2" |30&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku5" | [https://www.intel.com/content/www/us/en/products/sku/232166.html 13700HX]
|5.0
| rowspan="4" |8 (8)
| rowspan="3" |3.6
| rowspan="2" |?–1550
|-
! style="text-align:left;" data-sort-value="sku4" | [https://www.intel.com/content/www/us/en/products/sku/232101.html 13650HX]
| rowspan="4" |6 (12)
| rowspan="2" |2.6
|4.9
| rowspan="2" |1.9
|UHD Graphics<br />(16 EU)
| rowspan="3" |24&nbsp;MB
|-
! rowspan="3" |Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://www.intel.com/content/www/us/en/products/sku/232154.html 13600HX]
|4.7
| rowspan="2" |UHD Graphics<br />(32 EU)
| rowspan="2" |?–1500
|-
! style="text-align:left;" data-sort-value="sku2" | [https://www.intel.com/content/www/us/en/products/sku/232156.html 13500HX]
|2.5
| rowspan="2" |4.6
| rowspan="2" |1.8
|3.5
|-
! style="text-align:left;" data-sort-value="sku1" | [https://www.intel.com/content/www/us/en/products/sku/232132.html 13450HX]
|2.4
|4 (4)
|3.4
|UHD Graphics<br />(16 EU)
|?–1450
|20&nbsp;MB
|}

=== Core i (14th gen) ===

==== Raptor Lake-HX Refresh ====

Common features:
* Socket: BGA 1964.
* All the CPUs support dual-channel [[DDR5]]-5600 or [[DDR4]]-3200 RAM.
* All CPU models provide 16 lanes of [[PCIe 5.0]] and 4 lanes of PCIe 4.0, in addition to 16 lanes of PCIe 4.0 and 12 lanes of PCIe 3.0 provided by the on-package PCH.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core.
** E-cores: 4&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].
* All models support CPU, iGPU, and memory overclocking.
* i7-14650HX, i7-14700HX, and i9-14900HX feature Thermal Velocity Boost. Without it enabled, the maximum boost clock speed is 0.1&nbsp;GHz lower.
* i7-14700HX, and i9-14900HX feature Intel Application Optimization.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan=1 | Core i9
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/235995.html 14900HX]
| rowspan="3" | 8 (16)
| 2.2
| 5.8
| 16 (16)
| 1.6
| 4.1
| rowspan="2" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(32 EU)
| ?–1650
| 36&nbsp;MB
| rowspan="5" | 55&nbsp;W
| rowspan="5" | 157&nbsp;W
| rowspan="5" | {{dts|2024|January|format=mdy|abbr=off}}
|-
! rowspan="2" |Core i7
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/235997.html 14700HX]
|2.1
|5.5
|12 (12)
|1.5
|3.9
| rowspan="2" |?–1600
|33&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/235996.html 14650HX]
|2.2
|5.2
| rowspan="2" |8 (8)
|1.6
|3.7
|UHD Graphics<br />(16 EU)
|30&nbsp;MB
|-
! rowspan="2" |Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/235999.html 14500HX]
| rowspan="2" |6 (12)
|2.6
|4.9
|1.9
| rowspan="2" |3.5
|UHD Graphics<br />(32 EU)
|?–1550
|24&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/235998.html 14450HX]
|2.4
|4.8
|4 (4)
|1.8
|UHD Graphics<br />(16 EU)
|?–1500
|20&nbsp;MB
|}

=== <big style="font-size:114%;"> Core / Core Ultra 3/5/7/9 (Series 1)</big> ===

==== Raptor Lake-U Refresh ====

Common features:
* Socket: BGA 1744.
* All the CPUs support dual-channel [[DDR5]]-5200, [[DDR4]]-3200, [[LPDDR5]]-6400 or [[LPDDR4X]]-4266 RAM.
* All CPU models provide 8 lanes of [[PCIe 4.0]] and 12 lanes of PCIe 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* Includes integrated graphics based on Xe-LP architecture.
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core.
** E-cores: 4&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].
* The [https://ark.intel.com/content/www/us/en/ark/products/238762.html Core 3 100U] is available with IPU (image processing unit). Specifications between it and the respective processor without IPU are completely identical, apart from the addition of the IPU.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! class="unsortable" rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! class="unsortable" rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core&nbsp;7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/236795.html 150U]
| rowspan="3" | 2 (4)
| 1.8
| 5.4
| rowspan="2" | 8 (8)
| 1.2
| 4.0
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Intel Graphics]]<br />(96 EU)
| ?–1300
| rowspan="2" | 12&nbsp;MB
| rowspan="3" | 15&nbsp;W
| rowspan="3" | 55&nbsp;W
| rowspan="3" | {{dts|2024|January|format=mdy|abbr=off}}
|-
! Core&nbsp;5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/236796.html 120U]
| 1.4
| 5.0
| rowspan="2" | 0.9
| 3.8
| Intel Graphics<br />(80 EU)
| rowspan="2" | ?–1250
|-
! Core&nbsp;3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/236776.html 100U]
| 1.2
| 4.7
| 4 (4)
| 3.3
| Intel Graphics<br />(64 EU)
| 10&nbsp;MB
|}

==== Meteor Lake-U ====

Common features:
* Socket: BGA 2049.
* All the CPUs except 1x4U models support dual-channel [[DDR5]]-5600 or [[LPDDR5X]]-7466 RAM. 1x4U models support dual-channel LPDDR5(X)-6400.
* All CPU models provide 20 lanes of [[PCIe 4.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* Includes integrated graphics based on [[Arc Alchemist|Alchemist]] architecture.
* L1 [[CPU cache|cache]]:
** P-cores: 112&nbsp;KB (48&nbsp;KB data + 64&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* All processor models also feature 2× "LP E-Cores" which are clocked at 0.7&nbsp;GHz base (0.4&nbsp;GHz on 1x4U models), 2.1&nbsp;GHz boost and have 2&nbsp;MB of L2 cache.
* Fabrication process: [[5 nm process|Intel&nbsp;4]] (compute tile).
* Configurable TDP (cTDP) of 12–28&nbsp;W is featured on 1x5U models, and 9–15&nbsp;W on 1x4U models.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! class="unsortable" rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! class="unsortable" rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="3" | Core&nbsp;Ultra&nbsp;7
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/237329.html 165U]
| rowspan="7" | 2 (4)
| 1.7
| 4.9
| rowspan="6" | 8 (8)
| 1.2
| rowspan="3" | 3.8
| rowspan="6" | [[Intel Xe|Intel Graphics]]<br />(4 Xe-cores)
| ?–2000
| rowspan="6" | 12&nbsp;MB
| 15&nbsp;W
| 57&nbsp;W
| rowspan="7" | {{dts|2023|December|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/237508.html 164U]
| 1.1
| rowspan="2" | 4.8
| 0.7
| ?–1800
| 9&nbsp;W
| 30&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/237327.html 155U]
| 1.7
| 1.2
| ?–1950
| rowspan="2" | 15&nbsp;W
| rowspan="2" | 57&nbsp;W
|-
! rowspan="4" | Core&nbsp;Ultra&nbsp;5
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/237328.html 135U]
| 1.6
| rowspan="2" | 4.4
| 1.1
| rowspan="3" | 3.6
| ?–1900
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/237507.html 134U]
| 0.7
| 0.5
| ?–1750
| 9&nbsp;W
| 30&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/237330.html 125U]
| 1.3
| 4.3
| 0.8
| ?–1850
| rowspan="2" | 15&nbsp;W
| rowspan="2" | 57&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/237505.html 115U]
| 1.5
| 4.2
| 4 (4)
| 1.0
| 3.5
| Intel Graphics<br />(3 Xe-cores)
| ?–1800
| 10&nbsp;MB
|}

==== Meteor Lake-H ====

Common features:
* Socket: BGA 2049.
* All the CPUs support dual-channel [[DDR5]]-5600 or [[LPDDR5X]]-7466 RAM.
* All CPU models provide 8 lanes of [[PCIe 5.0]] and 20 lanes of PCIe 4.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* Includes integrated graphics based on [[Arc Alchemist|Alchemist]] architecture.
* L1 [[CPU cache|cache]]:
** P-cores: 112&nbsp;KB (48&nbsp;KB data + 64&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* All processor models also feature 2× "LP E-Cores" which are clocked at 0.7&nbsp;GHz base (1.0&nbsp;GHz on Core Ultra 9 185H), 2.5&nbsp;GHz boost and have 2&nbsp;MB of L2 cache.
* Fabrication process: [[5 nm process|Intel&nbsp;4]] (compute tile).
* Configurable TDP (cTDP) of 35–65&nbsp;W is featured on Core Ultra 9 185H, and 20–65&nbsp;W on all other models.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! class="unsortable" rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! class="unsortable" rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core&nbsp;Ultra&nbsp;9
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/236849.html 185H]
| rowspan="3" | 6 (12)
| 2.3
| 5.1
| rowspan="5" | 8 (8)
| 1.8
| rowspan="3" | 3.8
| rowspan="4" | [[Intel Arc]]<br />(8 Xe-cores)
| ?–2350
| rowspan="3" | 24&nbsp;MB
| 45&nbsp;W
| rowspan="5" | 115&nbsp;W
| rowspan="5" | {{dts|2023|December|format=mdy|abbr=off}}
|-
! rowspan="2" | Core&nbsp;Ultra&nbsp;7
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/236851.html 165H]
| rowspan="2" | 1.4
| 5.0
| rowspan="2" | 0.9
| ?–2300
| rowspan="4" | 28&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/236847.html 155H]
| 4.8
| ?–2250
|-
! rowspan="2" | Core&nbsp;Ultra&nbsp;5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/236850.html 135H]
| rowspan="2" | 4 (8)
| 1.7
| 4.6
| 1.2
| rowspan="2" | 3.6
| rowspan="2" | ?–2200
| rowspan="2" | 18&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/236848.html 125H]
| 1.2
| 4.5
| 0.7
| Intel Arc<br />(7 Xe-cores)
|}

=== <big style="font-size:114%;"> Core / Core Ultra 5/7/9 (Series 2)</big> ===

==== Raptor Lake-U Refresh ====

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! class="unsortable" rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! class="unsortable" rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core&nbsp;7
! style="text-align:left;" data-sort-value="sku3" | [https://www.intel.com/content/www/us/en/products/sku/238771/intel-core-7-processor-250u-12m-cache-up-to-5-40-ghz/specifications.html 250U]
| rowspan="2" | 2 (4)
| 1.8
| 5.4
| rowspan="2" | 8 (8)
| 1.2
| 4.0
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Intel Graphics]]<br />(96 EU)
| rowspan="2" | ?–1300
| rowspan="2" | 12&nbsp;MB
| rowspan="2" | 15&nbsp;W
| rowspan="2" | 55&nbsp;W
| rowspan="2" | {{dts|2025|January|format=mdy|abbr=off}}
|-
! Core&nbsp;5
! style="text-align:left;" data-sort-value="sku2" | [https://www.intel.com/content/www/us/en/products/sku/238776/intel-core-5-processor-220u-12m-cache-up-to-5-00-ghz/specifications.html 220U]
| 1.4
| 5.0
| 0.9
| 3.8
| Intel Graphics<br />(80 EU)
|}

==== Arrow Lake-U ====

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! class="unsortable" rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! class="unsortable" rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="2" | Core&nbsp;Ultra&nbsp;7
! style="text-align:left;" data-sort-value="sku4" | [https://www.intel.com/content/www/us/en/products/sku/241859/intel-core-ultra-7-processor-265u-12m-cache-up-to-5-30-ghz/specifications.html 265U]
| rowspan="4" | 2 (2)
| 2.1
| 5.3
| rowspan="4" | 8 (8)
| rowspan="2" | 1.7
| rowspan="2" | 4.2
| rowspan="4" | [[Intel Xe|Intel Graphics]]<br />(4 Xe-cores)
| rowspan="2" | ?–2100
| rowspan="4" | 12&nbsp;MB
| rowspan="4" | 15&nbsp;W
| rowspan="4" | 57&nbsp;W
| rowspan="4" | {{dts|2025|January|format=mdy|abbr=off}}

|-
! style="text-align:left;" data-sort-value="sku3" | [https://www.intel.com/content/www/us/en/products/sku/241860/intel-core-ultra-7-processor-255u-12m-cache-up-to-5-20-ghz/specifications.html 255U]
| rowspan="2" | 2.0
| 5.2
|-
! rowspan="2" | Core&nbsp;Ultra&nbsp;5
! style="text-align:left;" data-sort-value="sku2" | [https://www.intel.com/content/www/us/en/products/sku/241862/intel-core-ultra-5-processor-235u-12m-cache-up-to-4-90-ghz/specifications.html 235U]
| 4.9
| 1.6
| 4.1
| ?–2050
|-
! style="text-align:left;" data-sort-value="sku1" | [https://www.intel.com/content/www/us/en/products/sku/241861/intel-core-ultra-5-processor-225u-12m-cache-up-to-4-80-ghz/specifications.html 225U]
| 1.5
| 4.8
| 1.3
| 3.8
| ?–2000
|}

==== Lunar Lake ====

Common features:
* Socket: BGA 2833.
* All the CPUs support dual-channel [[LPDDR5X]]-8533 RAM (on package).
* All CPU models provide 4 lanes of [[PCIe 5.0]].
* L1 [[CPU cache|cache]]:
** P-cores: 112&nbsp;KB (48&nbsp;KB (12-Way) data + 64&nbsp;KB (16-Way) instructions) per core.
** E-cores: 96&nbsp;KB (32&nbsp;KB (8-Way) data + 64&nbsp;KB (16-Way) instructions) per core.
* L2 cache:
** P-cores: 2.5&nbsp;MB (10-Way) per core.
** E-cores: 4&nbsp;MB (16-Way) per E-core cluster (each "cluster" contains four cores).
* Fabrication process: Compute Tile (Contains the CPU cores) [[TSMC]]'s [[3 nm process|N3B]] node.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[AI_accelerator|NPU]]
! colspan="2" | Integrated memory
! colspan="2" | [[Thermal design power|TDP]]
! class="unsortable" rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! class="unsortable" rowspan="2" | Neural<br />computes<br />engines
! class="unsortable" rowspan="2" | NPU<br />AI<br />TOPS
! class="unsortable" rowspan="2" | Memory<br />speed
! class="unsortable" rowspan="2" | Memory<br />capacity
! class="unsortable" rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core&nbsp;Ultra&nbsp;9
! style="text-align:left;" data-sort-value="sku9" | [https://www.intel.com/content/www/us/en/products/sku/240961/intel-core-ultra-9-processor-288v-12m-cache-up-to-5-10-ghz/specifications.html 288V]
| rowspan="9" | 4 (4)
| 3.3
| 5.1
| rowspan="9" | 4 (4)
| 3.3
| rowspan="5" | 3.7
| rowspan="5" | [[Intel Arc|Intel Arc 140V]]<br />(8 Xe-cores)
| ?–2050
| rowspan="5" | 12&nbsp;MB
| rowspan="5" | 6x<br />Gen4
| rowspan="3" | 48
| rowspan="9" | LPDDR5X<br />8533&nbsp;MT/s
| rowspan="2" | 32&nbsp;GB
| 30&nbsp;W<br />(Min:17&nbsp;W)
| rowspan="9" | 37&nbsp;W
| rowspan="9" | {{dts|2024|September|format=mdy|abbr=off}}
|-
! rowspan="4" | Core&nbsp;Ultra&nbsp;7
! style="text-align:left;" data-sort-value="sku8" | [https://www.intel.com/content/www/us/en/products/sku/240958/intel-core-ultra-7-processor-268v-12m-cache-up-to-5-00-ghz/specifications.html 268V]
| rowspan="4" | 2.2
| rowspan="2" | 5.0
| rowspan="4" | 2.2
| rowspan="2" | ?–2000
| rowspan="8" | 17&nbsp;W<br />(Min:8&nbsp;W)
|-
! style="text-align:left;" data-sort-value="sku7" | [https://www.intel.com/content/www/us/en/products/sku/240956/intel-core-ultra-7-processor-266v-12m-cache-up-to-5-00-ghz/specifications.html 266V]
| 16&nbsp;GB
|-
! style="text-align:left;" data-sort-value="sku6" | [https://www.intel.com/content/www/us/en/products/sku/240957/intel-core-ultra-7-processor-258v-12m-cache-up-to-4-80-ghz/specifications.html 258V]
| rowspan="2" | 4.8
| rowspan="2" | ?–1950
| rowspan="2" | 47
| 32&nbsp;GB
|-
! style="text-align:left;" data-sort-value="sku5" | [https://www.intel.com/content/www/us/en/products/sku/240954/intel-core-ultra-7-processor-256v-12m-cache-up-to-4-80-ghz/specifications.html 256V]
| 16&nbsp;GB
|-
! rowspan="4" | Core&nbsp;Ultra&nbsp;5
! style="text-align:left;" data-sort-value="sku4" | [https://www.intel.com/content/www/us/en/products/sku/240951/intel-core-ultra-5-processor-238v-8m-cache-up-to-4-70-ghz/specifications.html 238V]
| rowspan="4" | 2.1
| rowspan="2" | 4.7
| rowspan="4" | 2.1
| rowspan="4" | 3.5
| rowspan="4" | [[Intel Arc|Intel Arc 130V]]<br />(7 Xe-cores)
| rowspan="4" | ?–1850
| rowspan="4" | 8&nbsp;MB
| rowspan="4" | 5x<br />Gen4
| rowspan="4" | 40
| 32&nbsp;GB
|-
! style="text-align:left;" data-sort-value="sku3" | [https://www.intel.com/content/www/us/en/products/sku/240959/intel-core-ultra-5-processor-236v-8m-cache-up-to-4-70-ghz/specifications.html 236V]
| 16&nbsp;GB
|-
! style="text-align:left;" data-sort-value="sku2" | [https://www.intel.com/content/www/us/en/products/sku/240955/intel-core-ultra-5-processor-228v-8m-cache-up-to-4-50-ghz/specifications.html 228V]
| rowspan="2" | 4.5
| 32&nbsp;GB
|-
! style="text-align:left;" data-sort-value="sku1" | [https://www.intel.com/content/www/us/en/products/sku/240960/intel-core-ultra-5-processor-226v-8m-cache-up-to-4-50-ghz/specifications.html 226V]
| 16&nbsp;GB
|}

==== Raptor Lake-H Refresh ====

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core 9
! style="text-align:left;" data-sort-value="sku5" | [https://www.intel.com/content/www/us/en/products/sku/241947/intel-core-9-processor-270h-24m-cache-up-to-5-80-ghz/specifications.html 270H]
| rowspan="3" | 6 (12)
| 2.7
| 5.8
| rowspan="2" | 8 (8)
| 2.0
| 4.1
| rowspan="2" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| rowspan="3" | ?–1550
| rowspan="3" | 24&nbsp;MB
| rowspan="5" | 45&nbsp;W
| rowspan="5" | 115&nbsp;W
| rowspan="5" | {{dts|2024|December|format=mdy|abbr=off}}
|-
! rowspan="2" |Core 7
! style="text-align:left;" data-sort-value="sku4" | [https://www.intel.com/content/www/us/en/products/sku/241651/intel-core-7-processor-250h-24m-cache-up-to-5-40-ghz/specifications.html 250H]
| rowspan="2" |2.5
|5.4
| rowspan="2" |1.8
| rowspan="2" |4.0
|-
! style="text-align:left;" data-sort-value="sku4" | [https://www.intel.com/content/www/us/en/products/sku/241653/intel-core-7-processor-240h-24m-cache-up-to-5-20-ghz/specifications.html 240H]
|5.2
|4 (4)
|[[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(64 EU)
|-
! rowspan="2" |Core 5
! style="text-align:left;" data-sort-value="sku3" | [https://www.intel.com/content/www/us/en/products/sku/241654/intel-core-5-processor-220h-18m-cache-up-to-4-90-ghz/specifications.html 220H]
| rowspan="2" |4 (8)
|2.7
|4.9
|8 (8)
|2.0
|3.7
|Iris Xe<br />(80 EU)
|?–1500
|18&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku1" | [https://www.intel.com/content/www/us/en/products/sku/241652/intel-core-5-processor-210h-12m-cache-up-to-4-80-ghz/specifications.html 210H]
|2.2
|4.8
|4 (4)
|1.6
|3.6
|UHD Graphics<br />(48 EU)
|?–1400
|12&nbsp;MB
|}

==== Arrow Lake-H ====

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! class="unsortable" rowspan="3" | [[AI_accelerator|NPU]]<br />(TOPS)
! colspan="2" | [[Thermal design power|TDP]]
! class="unsortable" rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! class="unsortable" rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core&nbsp;Ultra&nbsp;9
! style="text-align:left;" data-sort-value="sku5" | [https://www.intel.com/content/www/us/en/products/sku/241747/intel-core-ultra-9-processor-285h-24m-cache-up-to-5-40-ghz/specifications.html 285H]
| rowspan="3" | 6 (6)
| 2.9
| 5.4
| rowspan="5" | 8 (8)
| 2.7
| rowspan="2" | 4.5
| rowspan="4" | [[Intel Arc|Intel Arc 140T]]<br />(8 Xe-cores)
| ?–2350
| rowspan="3" | 24&nbsp;MB
| rowspan="5" | 13
| 45&nbsp;W
| rowspan="5" | 115&nbsp;W
| rowspan="5" | {{dts|2025|January|format=mdy|abbr=off}}
|-
! rowspan="2" | Core&nbsp;Ultra&nbsp;7
! style="text-align:left;" data-sort-value="sku4" | [https://www.intel.com/content/www/us/en/products/sku/241750/intel-core-ultra-7-processor-265h-24m-cache-up-to-5-30-ghz/specifications.html 265H]
| 2.2
| 5.3
| 1.7
| ?–2300
| rowspan="4" | 28&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://www.intel.com/content/www/us/en/products/sku/241751/intel-core-ultra-7-processor-255h-24m-cache-up-to-5-10-ghz/specifications.html 255H]
| 2.0
| 5.1
| 1.5
| rowspan="2" | 4.4
| rowspan="2" | ?–2250
|-
! rowspan="2" | Core&nbsp;Ultra&nbsp;5
! style="text-align:left;" data-sort-value="sku2" | [https://www.intel.com/content/www/us/en/products/sku/241748/intel-core-ultra-5-processor-235h-18m-cache-up-to-5-00-ghz/specifications.html 235H]
| rowspan="2" | 4 (4)
| 2.4
| 5.0
| 1.8
| rowspan="2" | 18&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku1" | [https://www.intel.com/content/www/us/en/products/sku/241749/intel-core-ultra-5-processor-225h-18m-cache-up-to-4-90-ghz/specifications.html 225H]
| 1.7
| 4.9
| 1.3
| 4.3
| [[Intel Arc|Intel Arc 130T]]<br />(7 Xe-cores)
| ?–2200
|}

==== Arrow Lake-HX ====
Common features:

* Core Ultra 9 285HX supports Intel vPro and related technologies.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! class="unsortable" rowspan="3" | [[AI_accelerator|NPU]]<br />(TOPS)
! colspan="2" | [[Thermal design power|TDP]]
! class="unsortable" rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! class="unsortable" rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="2" | Core&nbsp;Ultra&nbsp;9
! style="text-align:left;" data-sort-value="sku6" | [https://www.intel.com/content/www/us/en/products/sku/242297/intel-core-ultra-9-processor-285hx-36m-cache-up-to-5-50-ghz/specifications.html 285HX]
| rowspan="4" | 8 (8)
| 2.8
| 5.5
| rowspan="2" | 16 (16)
| rowspan="2" | 2.1
| rowspan="3" | 4.6
| rowspan="4" | [[Intel Arc]]<br />(4 Xe-cores)
| 300–2000
| rowspan="2" | 36&nbsp;MB
| rowspan="6" | 13
| rowspan="6" | 55&nbsp;W
| rowspan="6" | 160&nbsp;W
| rowspan="6" | {{dts|2025|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://www.intel.com/content/www/us/en/products/sku/242293/intel-core-ultra-9-processor-275hx-36m-cache-up-to-5-40-ghz/specifications.html 275HX]
| 2.7
| 5.4
| rowspan="2" | 300–1900
|-
! rowspan="2" | Core&nbsp;Ultra&nbsp;7
! style="text-align:left;" data-sort-value="sku4" | [https://www.intel.com/content/www/us/en/products/sku/242294/intel-core-ultra-7-processor-265hx-30m-cache-up-to-5-30-ghz/specifications.html 265HX]
| 2.6
| 5.3
| rowspan="2" | 12(12)
| 2.3
| rowspan="2" | 30&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku3" | [https://www.intel.com/content/www/us/en/products/sku/242292/intel-core-ultra-7-processor-255hx-30m-cache-up-to-5-20-ghz/specifications.html 255HX]
| 2.4
| 5.2
| 1.8
| rowspan="3" | 4.5
| 300–1850
|-
! rowspan="2" | Core&nbsp;Ultra&nbsp;5
! style="text-align:left;" data-sort-value="sku2" | [https://www.intel.com/content/www/us/en/products/sku/242295/intel-core-ultra-5-processor-245hx-24m-cache-up-to-5-10-ghz/specifications.html 245HX]
| rowspan="2" | 6 (6)
| 3.1
| rowspan="2" | 5.1
| rowspan="2" | 8 (8)
| rowspan="2" | 2.6
| rowspan="2" | Intel Arc<br />(3 Xe-cores)
| rowspan="2" | 300–1900
| rowspan="2" | 24&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku1" | [https://www.intel.com/content/www/us/en/products/sku/242296/intel-core-ultra-5-processor-235hx-24m-cache-up-to-5-10-ghz/specifications.html 235HX]
| 2.9
|}

==== Twin Lake-N ====

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
! Base
! class="unsortable" | Max.<br />Turbo
|-
! rowspan=2 | Core 3
! style="text-align:left;" data-sort-value="sku2" | [https://www.intel.com/content/www/us/en/products/sku/241639/intel-core-3-processor-n355-6m-cache-up-to-3-90-ghz/specifications.html N355]
| rowspan=2 | 8 (8)
| 1.8
| rowspan=2 | 3.9
| rowspan=2 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(32 EU)
| rowspan=2 | ?–1350
| rowspan=2 | 6&nbsp;MB
| 15&nbsp;W
| 35&nbsp;W
| rowspan=2 | {{dts|2025|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://www.intel.com/content/www/us/en/products/sku/241638/intel-core-3-processor-n350-6m-cache-up-to-3-90-ghz/specifications.html N350]
| 0.8
| 7&nbsp;W
| 25&nbsp;W
|}

== Embedded processors ==

=== Core i (1st gen) ===

==== Arrandale ====

Common features:
* Socket: BGA 1288.
* All the CPUs support dual-channel [[DDR3]] RAM. All models support it at 800&nbsp;MT/s speeds while E- and LE-suffix models support up to 1066&nbsp;MT/s speeds.
* All CPU models provide 16 lanes of [[PCIe 2.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 1.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[32 nm process|32&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=4 | Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/50022.html 660UE]
| rowspan=6 | 2 (4)
| 1.33
| 2.40
| rowspan=6 | [[Intel Graphics Technology#Westmere|HD Graphics]]
| 166–500
| rowspan=4 | 4&nbsp;MB
| 18&nbsp;W
| {{dts|2010|August|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/47934.html 620LE]
| 2.00
| 2.80
| 266–566
| 25&nbsp;W
| rowspan=5 | {{dts|2010|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/47935.html 620UE]
| 1.06
| 2.13
| 166–500
| 18&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/48139.html 610E]
| 2.53
| 3.20
| rowspan=2 | 500–766
| rowspan=3 | 35&nbsp;W
|-
! Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/47936.html 520E]
| 2.40
| 2.93
| rowspan=2 | 3&nbsp;MB
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/48140.html 330E]
| 2.13
| {{n/a}}
| 500–666
|}

=== Core i (2nd gen) ===

==== Sandy Bridge-DT ====

The following models from the Sandy Bridge desktop range are available as embedded processors:
* Core i7-2600
* Core i5-2400
* Core i3-2120

See section [[#Sandy Bridge-DT|Desktop processors § Sandy Bridge-DT]] for full info.

==== Sandy Bridge-M ====

Common features:
* Socket: [[Socket G2|G2]] (2xx0E and 2xx0QE models except i3-2310E), BGA 1023 (all other models).
* All the CPUs support dual-channel [[DDR3]] RAM. All models support it at 1333&nbsp;MT/s speeds while i7-2720QM and above support up to 1600&nbsp;MT/s speeds.
* All CPU models provide 16 lanes of [[PCIe 2.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[32 nm process|32&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="4" | Core i7
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/54644.html 2715QE]
| rowspan="2" | 4 (8)
| rowspan="2" | 2.1
| rowspan="2" | 3.0
| rowspan="9" | [[Intel Graphics Technology#Sandy Bridge|HD 3000]]
| rowspan="2" | 650–1200
| rowspan="2" | 6&nbsp;MB
| rowspan="2" | 45&nbsp;W
| rowspan="2" | {{dts|2011|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/53472.html 2710QE]
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/54642.html 2655LE]
| rowspan="7" |2 (4)
|2.2
|2.9
|650–1000
| rowspan="2" |4&nbsp;MB
|25&nbsp;W
| rowspan="4" | {{dts|2011|February|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/54645.html 2610UE]
|1.5
|2.4
|350–850
|17&nbsp;W
|-
! rowspan="2" |Core i5
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/54647.html 2515E]
| rowspan="2" |2.5
| rowspan="2" |3.1
| rowspan="2" |650–1100
| rowspan="5" |3&nbsp;MB
| rowspan="2" |35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/53456.html 2510E]
|-
! rowspan="3" |Core i3
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/54646.html 2340UE]
|1.3
| rowspan="3" {{n/a}}
|350–800
|17&nbsp;W
| rowspan="2" | {{dts|2011|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/53433.html 2330E]
|2.2
| rowspan="2" |650–1050
| rowspan="2" |35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/54643.html 2310E]
|2.1
| {{dts|2011|February|format=mdy|abbr=off}}
|}

==== Gladden<span class="anchor" id="&quot;Gladden&quot; (32 nm)"></span> ====

Common features:
* Socket: BGA 1284.
* All the CPUs support dual-channel [[DDR3]]-1333 RAM.
* All CPU models provide 16 lanes of [[PCIe 2.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[32 nm process|32&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/68332.html 2115C]
| 2 (4)
| 2.0
| {{n/a}}
| 3&nbsp;MB
| 25&nbsp;W
| Q2 2012
|}

=== Core i (3rd gen) ===

==== Ivy Bridge-DT ====

The following models from the Ivy Bridge desktop range are available as embedded processors:
* Core i7-3770
* Core i5-3550S
* Core i3-3220

See section [[#Ivy Bridge-DT|Desktop processors § Ivy Bridge-DT]] for full info.

==== Ivy Bridge-M ====

Common features:
* Socket: [[Socket G2|G2]] (3xx0ME/QE models only), BGA 1023 (all other models and also i5-3610ME, i3-3120ME).
* All the CPUs support dual-channel [[DDR3]] and [[DDR3L]] RAM, at up to 1600&nbsp;MT/s speed.
* i7 models provide 16 lanes of [[PCIe 3.0]], while i5 models provide 1 lane of PCIe 3.0 and i3 models provide 1 lane of PCIe 2.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[32 nm process|32&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="5" | Core i7
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/65709.html 3615QE]
| rowspan="3" | 4 (8)
| rowspan="2" | 2.3
| rowspan="2" | 3.3
| rowspan="8" | [[Intel Graphics Technology#Ivy Bridge|HD 4000]]
| rowspan="3" | 650–1000
| rowspan="3" | 6&nbsp;MB
| rowspan="2" | 45&nbsp;W
| rowspan="3" | {{dts|2012|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/65711.html 3610QE]
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/65710.html 3612QE]
|2.1
|3.1
|35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/65712.html 3555LE]
| rowspan="5" |2 (4)
|2.5
|3.2
|550–1000
| rowspan="2" |4&nbsp;MB
|25&nbsp;W
| rowspan="3" | {{dts|2012|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/65713.html 3517UE]
|1.7
|2.8
|350–1000
|17&nbsp;W
|-
!Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/65704.html 3610ME]
|2.7
|3.3
|650–950
| rowspan="3" |3&nbsp;MB
|35&nbsp;W
|-
! rowspan="2" |Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/65696.html 3217UE]
|1.6
| rowspan="2" {{n/a}}
|350–900
|17&nbsp;W
| rowspan="2" | {{dts|2012|August|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/65698.html 3120ME]
|2.4
|650–900
|35&nbsp;W
|}

==== Gladden<span class="anchor" id="&quot;Gladden&quot; (22 nm)"></span> ====

Common features:
* Socket: BGA 1284.
* All the CPUs support dual-channel [[DDR3]] and [[DDR3L]] 1333&nbsp;MT/s RAM.
* All CPU models provide 20 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* No integrated graphics.
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[22 nm process|22&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/78170.html 3115C]
| 2 (4)
| 2.5
| {{n/a}}
| 4&nbsp;MB
| 25&nbsp;W
| Q3 2013
|}

=== Core i (4th gen) ===

==== Haswell-DT ====

Common features:
* Socket: [[LGA 1150]].
* All the CPUs support dual-channel [[DDR3]] RAM, at up to 1600&nbsp;MT/s speed.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[22 nm process|22&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! Core i7
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/75610.html 4770TE]
| 4 (8)
| 2.3
| rowspan=2 |  3.3
| rowspan=4 | [[Intel Graphics Technology#Haswell|HD 4600]]
| rowspan=4 | 350–1000
| 8&nbsp;MB
| 45&nbsp;W
| rowspan=2 | {{dts|2013|June|format=mdy|abbr=off}}
|-
! Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/75468.html 4570TE]
| rowspan=3 | 2 (4)
| 2.7
| rowspan=3 | 4&nbsp;MB
| rowspan=3 | 35&nbsp;W
|-
! rowspan=2 | Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/80918.html 4340TE]
| 2.6
| rowspan=2 {{n/a}}
| {{dts|2014|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/77778.html 4330TE]
| 2.4
| {{dts|2013|September|format=mdy|abbr=off}}
|}

The following models from the Haswell-DT desktop range are also available as embedded processors:
* Core i7-4790S
* Core i7-4770S
* Core i5-4590S
* Core i5-4590T
* Core i5-4570S
* Core i3-4360
* Core i3-4350T
* Core i3-4330

See section [[#Haswell-DT|Desktop processors § Haswell-DT]] for full info.

==== Haswell-H<span class="anchor" id="&quot;Haswell-H&quot; (22 nm)"></span> ====

Common features:
* Socket: BGA 1364.
* All the CPUs support dual-channel [[DDR3L]] RAM, at up to 1600&nbsp;MT/s speed.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Models with Iris Pro 5200 iGPU also feature 128&nbsp;MB of [[eDRAM]], acting as L4 cache.
* Fabrication process: [[22 nm process|22&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan="6" | Core i7
! style="text-align:left;" data-sort-value="sku15" | [https://ark.intel.com/content/www/us/en/ark/products/76298.html 4860EQ]
| rowspan="6" | 4 (8)
| 1.8
| 3.2
| rowspan="2" | [[Intel Graphics Technology#Haswell|Iris Pro 5200]]
| 750–1000
| rowspan="4" | 6&nbsp;MB
| rowspan="4" | 47&nbsp;W
| rowspan="2" | {{dts|2013|August|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku14" | [https://ark.intel.com/content/www/us/en/ark/products/76299.html 4850EQ]
|1.6
|3.2
|650–1000
|-
! style="text-align:left;" data-sort-value="sku13" | [https://ark.intel.com/content/www/us/en/ark/products/76297.html 4701EQ]
| rowspan="2" |2.4
| rowspan="2" |3.4
| rowspan="2" |[[Intel Graphics Technology#Haswell|HD 4600]]
| rowspan="2" |400–1000
|Q3 2013
|-
! style="text-align:left;" data-sort-value="sku12" | [https://ark.intel.com/content/www/us/en/ark/products/75469.html 4700EQ]
| {{dts|2013|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku11" | [https://ark.intel.com/content/www/us/en/ark/products/75555.html 4700EC]
|2.7
| rowspan="2" {{n/a}}
| colspan="2" rowspan="2" {{n/a}}
| rowspan="2" |8&nbsp;MB
|43&nbsp;W
| rowspan="2" | {{dts|2014|March|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/75556.html 4702EC]
|2.0
|27&nbsp;W
|-
! rowspan="5" |Core i5
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/79201.html 4422E]
| rowspan="9" |2 (4)
|1.8
|2.9
| rowspan="4" |HD 4600
|400–900
| rowspan="4" |3&nbsp;MB
|25&nbsp;W
| rowspan="2" | {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/79199.html 4410E]
|2.9
| {{n/a}}
|400–1000
| rowspan="2" |37&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/76292.html 4400E]
|2.7
|3.3
|400–1000
| rowspan="2" | {{dts|2013|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/76307.html 4402E]
|1.6
|2.7
|400–900
|25&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/75554.html 4402EC]
|2.5
| rowspan="5" {{n/a}}
| colspan="2" {{n/a}}
|4&nbsp;MB
|27&nbsp;W
| {{dts|2014|March|format=mdy|abbr=off}}
|-
! rowspan="4" |Core i3
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/79197.html 4110E]
|2.6
| rowspan="4" |HD 4600
| rowspan="4" |400–900
| rowspan="4" |3&nbsp;MB
|37&nbsp;W
| rowspan="2" | {{dts|2014|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/79198.html 4112E]
|1.8
|25&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/76293.html 4100E]
|2.4
|37&nbsp;W
| rowspan="2" | {{dts|2013|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/76294.html 4102E]
|1.6
|25&nbsp;W
|}

=== Core i (5th gen) ===

==== Broadwell-H ====

Common features:
* Socket: BGA 1364.
* All the CPUs support dual-channel [[DDR3L]] RAM, at up to 1600&nbsp;MT/s speed.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 2.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Models with Iris Pro 6200 iGPU also feature 128&nbsp;MB of [[eDRAM]], acting as L4 cache.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/88094.html 5850EQ]
| rowspan=2 | 4 (8)
| 2.7
| rowspan=2 | 3.4
| [[Intel Graphics Technology#Broadwell|Iris Pro 6200]]
| rowspan=2 | 300–1000
| rowspan=2 | 6&nbsp;MB
| rowspan=2 | 47&nbsp;W
| rowspan=2 | {{dts|2015|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/88093.html 5700EQ]
| 2.6
| [[Intel Graphics Technology#Broadwell|HD 5600]]
|}

=== Core i (6th gen) ===

==== Skylake-S ====

Common features:
* Socket: [[LGA 1151]].
* All the CPUs support dual-channel [[DDR4]]-2133 or [[DDR3L]]-1600 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/88201.html 6700TE]
| 4 (8)
| 2.4
| 3.4
| rowspan=3 | [[Intel Graphics Technology#Skylake|HD 530]]
| rowspan=3 | 350–1000
| 8&nbsp;MB
| rowspan=3 | 35&nbsp;W
| rowspan=2 | {{dts|2015|September|format=mdy|abbr=off}}
|-
! Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/88186.html 6500TE]
| 4 (4)
| 2.3
| 3.3
| 6&nbsp;MB
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/88181.html 6100TE]
| 2 (4)
| 2.7
| {{n/a}}
| 4&nbsp;MB
| Q4 2015
|}

==== Skylake-H ====

Common features:
* Socket: BGA 1440.
* All the CPUs support dual-channel [[DDR4]]-2133, [[DDR3L]]-1600 or [[LPDDR3]]-1866 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Models with Iris Pro 580 iGPU also feature 128&nbsp;MB of [[eDRAM]], acting as L4 cache.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/90426.html 6820EQ]
| rowspan=2 | 4 (8)
| 2.8
| 3.5
| rowspan=6 | [[Intel Graphics Technology#Skylake|HD 530]]
| rowspan=4 | 350–1000
| rowspan=2 | 8&nbsp;MB
| 45&nbsp;W
| rowspan=6 | {{dts|2015|October|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/90615.html 6822EQ]
| 2.0
| 2.8
| 25&nbsp;W
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/90425.html 6440EQ]
| rowspan=2 | 4 (4)
| 2.7
| 3.4
| rowspan=2 | 6&nbsp;MB
| 45&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/90617.html 6442EQ]
| 1.9
| 2.7
| 25&nbsp;W
|-
! rowspan=2 | Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/90611.html 6100E]
| rowspan=2 | 2 (4)
| 2.7
| rowspan=2 {{n/a}}
| rowspan=2 | 350–950
| rowspan=2 | 3&nbsp;MB
| 35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/90612.html 6102E]
| 1.9
| 25&nbsp;W
|}

=== Core i (7th gen) ===

==== Kaby Lake-S ====

Common features:
* Socket: [[LGA 1151]].
* All the CPUs support dual-channel [[DDR4]]-2400 or [[DDR3L]]-1600 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=2 | Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/97130.html 7101E]
| rowspan=2 | 2 (4)
| 3.9
| rowspan=2 {{n/a}}
| rowspan=2 | [[Intel Graphics Technology#Kaby Lake|HD 610]]
| rowspan=2 | 350–1100
| rowspan=2 | 3&nbsp;MB
| 54&nbsp;W
| rowspan=2 | {{dts|2017|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/97125.html 7101TE]
| 3.4
| 35&nbsp;W
|}

==== Kaby Lake-H ====

Common features:
* Socket: BGA 1440.
* All the CPUs support dual-channel [[DDR4]]-2400 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! Core i7
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/97127.html 7820EQ]
| 4 (8)
| 3.0
| 3.7
| rowspan=5 | [[Intel Graphics Technology#Kaby Lake|HD 630]]
| rowspan=3 | 350–1000
| 8&nbsp;MB
| rowspan=2 | 45&nbsp;W
| rowspan=5 | {{dts|2017|January|format=mdy|abbr=off}}
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/97523.html 7440EQ]
| rowspan=2 | 4 (4)
| 2.9
| 3.6
| rowspan=2 | 6&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/97532.html 7442EQ]
| 2.1
| 2.9
| 25&nbsp;W
|-
! rowspan=2 | Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/97131.html 7100E]
| rowspan=2 | 2 (4)
| 2.9
| rowspan=2 {{n/a}}
| rowspan=2 | 350–950
| rowspan=2 | 3&nbsp;MB
| 35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/97124.html 7102E]
| 2.1
| 25&nbsp;W
|}

=== Core i (8th gen) ===

==== Whiskey Lake-U ====

Common features:
* Socket: BGA 1528.
* All the CPUs support dual-channel [[DDR4]]-2400 or [[LPDDR3]]-2133 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/193554.html 8665UE]
| rowspan=2 | 4 (8)
| 1.7
| 4.4
| rowspan=3 | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 620]]
| 300–1150
| 8&nbsp;MB
| rowspan=3 | 15&nbsp;W
| {{dts|2019|April|format=mdy|abbr=off}}
|-
! Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/193559.html 8365UE]
| 1.6
| 4.1
| 300–1050
| 6&nbsp;MB
| rowspan=2 | {{dts|2019|June|format=mdy|abbr=off}}
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/193560.html 8145UE]
| 2 (4)
| 2.2
| 3.9
| 300–1000
| 4&nbsp;MB
|}

=== Core i (9th gen) ===

==== Coffee Lake-R ====

Common features:
* Socket: [[LGA 1151-2]].
* All the CPUs support dual-channel [[DDR4]]-2400 RAM. i5 models and up support it at up to 2666&nbsp;MT/s speeds.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/195306.html 9700E]
| rowspan=2 | 8 (8)
| 2.6
| 4.4
| rowspan=6 | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 630]]
| rowspan=2 | 350–1150
| rowspan=2 | 12&nbsp;MB
| 65&nbsp;W
| rowspan=6 | {{dts|2019|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/195329.html 9700TE]
| 1.8
| 3.8
| 35&nbsp;W
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/195324.html 9500E]
| rowspan=2 | 6 (6)
| 3.0
| 4.2
| rowspan=2 | 350–1100
| rowspan=2 | 9&nbsp;MB
| 65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/195327.html 9500TE]
| 2.2
| 3.6
| 35&nbsp;W
|-
! rowspan=2 | Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/194374.html 9100E]
| rowspan=2 | 4 (4)
| 3.1
| 3.7
| rowspan=2 | 350–1050
| rowspan=2 | 6&nbsp;MB
| 65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/194376.html 9100TE]
| 2.2
| 3.2
| 35&nbsp;W
|}

==== Coffee Lake-H (refresh) ====

Common features:
* Socket: BGA 1440.
* All the CPUs support dual-channel [[DDR4]]-2666 RAM.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/195328.html 9850HE]
| rowspan=2 | 6 (12)
| 2.7
| 4.4
| rowspan=3 | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 630]]
| rowspan=2 | 350–1150
| rowspan=2 | 9&nbsp;MB
| 45&nbsp;W
| rowspan=3 | {{dts|2019|June|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/195333.html 9850HL]
| 1.9
| 4.1
| rowspan=2 | 25&nbsp;W
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/194375.html 9100HL]
| 4 (4)
| 1.6
| 2.9
| 350–1100
| 6&nbsp;MB
|}

=== Core i (10th gen) ===

==== Comet Lake-S ====

Common features:
* Socket: [[LGA 1200]].
* All the CPUs support dual-channel [[DDR4]]-2666 RAM. i7 models and higher support it at up to 2933&nbsp;MT/s speeds.
* All CPU models provide 16 lanes of [[PCIe 3.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 4-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 64&nbsp;KB (32&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 256&nbsp;KB per core.
* Fabrication process: [[14 nm process|14&nbsp;nm]].
* i9-10900E features Thermal Velocity Boost.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=2 | Core i9
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/203902.html 10900E]
| rowspan=2 | 10 (20)
| 2.8
| 4.7
| rowspan=8 | [[Intel Graphics Technology#Kaby Lake Refresh / Amber Lake / Coffee Lake / Coffee Lake Refresh / Whiskey Lake / Comet Lake|UHD 630]]
| rowspan=2 | 350–1200
| rowspan=2 | 20&nbsp;MB
| 65&nbsp;W
| rowspan=2 | {{dts|2020|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/203901.html 10900TE]
| 1.8
| rowspan=2 | 4.5
| 35&nbsp;W
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/203908.html 10700E]
| rowspan=2 | 8 (16)
| 2.9
| rowspan=4 | 350–1150
| rowspan=2 | 16&nbsp;MB
| 65&nbsp;W
| rowspan=2 | {{dts|2020|May|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/203906.html 10700TE]
| 2.0
| 4.4
| 35&nbsp;W
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/203893.html 10500E]
| rowspan=2 | 6 (12)
| 3.1
| 4.2
| rowspan=2 | 12&nbsp;MB
| 65&nbsp;W
| rowspan=4 | {{dts|2020|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/203891.html 10500TE]
| 2.3
| 3.7
| 35&nbsp;W
|-
! rowspan=2 | Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/203898.html 10100E]
| rowspan=2 | 4 (8)
| 3.2
| 3.8
| rowspan=2 | 350–1100
| rowspan=2 | 6&nbsp;MB
| 65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/203899.html 10100TE]
| 2.3
| 3.6
| 35&nbsp;W
|}

=== Core i (11th gen) ===

==== Tiger Lake-UP3 ====

Common features:
* Socket: BGA 1449.
* All the CPUs support dual-channel [[DDR4]]-3200 or [[LPDDR4X]]-3733 RAM. i5 models and up support LPDDR4X at up to 4266&nbsp;MT/s speed.
* All CPU models provide 4 lanes of [[PCIe 4.0]], in addition to PCIe 3.0 provided by the on-package PCH.
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 1.25&nbsp;MB per core.
* Fabrication process: [[10 nm process|10&nbsp;nm]].
* All models have configurable TDP (cTDP), which can be set from a minimum of 12&nbsp;W to 28&nbsp;W. Base clocks shown are at 15&nbsp;W TDP; they will be different depending on the cTDP setting chosen.
* -GRE suffix models have a minimum operating temperature of -40°C as opposed to 0°C for the normal models, and also feature "in-band [[Error correcting code|ECC]]" for memory.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/208082.html 1185GRE]
| rowspan=4 | 4 (8)
| rowspan=2 | 1.8
| rowspan=2 | 4.4
| rowspan=2 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| rowspan=2 | ?–1350
| rowspan=2 | 12&nbsp;MB
| rowspan=6 | 15&nbsp;W
| rowspan=6 | {{dts|2020|September|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/208076.html 1185G7E]
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/208078.html 1145GRE]
| rowspan=2 | 1.5
| rowspan=2 | 4.1
| rowspan=2 | Iris Xe<br />(80 EU)
| rowspan=2 | ?–1300
| rowspan=2 | 8&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/208081.html 1145G7E]
|-
! rowspan=2 | Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/208074.html 1115GRE]
| rowspan=2 | 2 (4)
| rowspan=2 | 2.2
| rowspan=2 | 3.9
| rowspan=2 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(48 EU)
| rowspan=2 | ?–1250
| rowspan=2 | 6&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/208079.html 1115G4E]
|}

==== Tiger Lake-H ====

Common features:
* Socket: BGA 1598.
* All the CPUs support dual-channel [[DDR4]]-3200 RAM.
* All CPU models provide 20 lanes of [[PCIe 4.0]], in addition to 24 lanes of PCIe 3.0 provided by the on-package PCH.
* All CPUs feature a [[Direct Media Interface|DMI]] 3.0 bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache: 1.25&nbsp;MB per core.
* Fabrication process: [[10 nm process|10&nbsp;nm]].
* The base clock speed that the CPU runs at corresponds with the configurable TDP (cTDP) setting chosen.
* Minimum operating temperature: 0°C.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="2" | Processor<br />branding
! rowspan="2" | Model
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="2" | [[Smart Cache|Smart<br />Cache]]
! rowspan="2" | [[Thermal design power|TDP]]
! rowspan="2" | Release<br />date
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Model
! class="unsortable" | Clock (MHz)
|-
! Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/217379.html 11850HE]
| 8 (16)
| rowspan=2 | 2.1–2.6
| 4.7
| rowspan=2 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(32 EU)
| rowspan=2 | 350–1350
| 24&nbsp;MB
| rowspan=3 | 35–45&nbsp;W
| rowspan=3 | {{dts|2021|August|format=mdy|abbr=off}}
|-
! Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/217369.html 11500HE]
| 6 (12)
| 4.5
| 12&nbsp;MB
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/217371.html 11100HE]
| 4 (8)
| 1.9–2.4
| 4.4
| UHD Graphics<br />(16 EU)
| 350–1250
| 8&nbsp;MB
|}

=== Core i (12th gen) ===

==== Alder Lake-S ====

Common features:
* Socket: [[LGA 1700]].
* All the CPUs support dual-channel [[DDR4]]-3200 or [[DDR5]]-4800 RAM
* All the CPUs provide 16 lanes of [[PCIe 5.0]] and 4 lanes of [[PCIe 4.0]], but support may vary depending on motherboard and chipsets.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 1.25&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].
* Turbo Boost version is 2.0.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! rowspan="3" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan=2 | Core i9
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/132212.html 12900E]
| rowspan=4 | 8 (16)
| 2.3
| 5.0
| rowspan=2 | 8 (8)
| 1.7
| 3.8
| rowspan=6 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD 770]]
| rowspan=2 | 300–1550
| rowspan=2 | 30&nbsp;MB
| 65&nbsp;W
| rowspan=8 | {{dts|2022|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/132211.html 12900TE]
| 1.1
| rowspan=2 | 4.8
| 1.0
| rowspan=2 | 3.6
| 35&nbsp;W
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/132219.html 12700E]
| 2.1
| rowspan=2 | 4 (4)
| 1.6
| rowspan=2 | 300–1500
| rowspan=2 | 25&nbsp;MB
| 65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/132216.html 12700TE]
| 1.4
| 4.6
| 1.0
| 3.4
| 35&nbsp;W
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/96143.html 12500E]
| rowspan=2 | 6 (12)
| 2.9
| 4.5
| colspan=3 rowspan=4 {{n/a}}
| rowspan=2 | 300–1450
| rowspan=2 | 18&nbsp;MB
| 65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/96142.html 12500TE]
| 1.9
| 4.3
| 35&nbsp;W
|-
! rowspan=2 | Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/132225.html 12100E]
| rowspan=2 | 4 (8)
| 3.2
| 4.2
| rowspan=2 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD 730]]
| rowspan=2 | 300–1400
| rowspan=2 | 12&nbsp;MB
| 60&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/132224.html 12100TE]
| 2.1
| 4.0
| 35&nbsp;W
|}

==== Alder Lake-U ====

Common features:
* Socket: BGA 1744.
* All the CPUs support dual-channel [[DDR5]]-4800, [[DDR4]]-3200, [[LPDDR5]]-5200 or [[LPDDR4X]]-4266 RAM.
* All CPU models provide 8 lanes of [[PCIe 4.0]] and 12 lanes of PCIe 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 1.25&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/227853.html 1265UE]
| rowspan=3 | 2 (4)
| {{dunno}}
| 4.7
| rowspan=2 | 8 (8)
| {{dunno}}
| 3.5
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| ?–1250
| rowspan=2 | 12&nbsp;MB
| rowspan=3 | 15&nbsp;W
| rowspan=3 | 55&nbsp;W
| rowspan=3 | {{dts|2022|February|format=mdy|abbr=off}}
|-
! Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/227854.html 1245UE]
| {{dunno}}
| rowspan=2 | 4.4
| {{dunno}}
| rowspan=2 | 3.3
| Iris Xe<br />(80 EU)
| ?–1200
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/227851.html 1215UE]
| {{dunno}}
| 4 (4)
| {{dunno}}
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(64 EU)
| ?–1100
| 10&nbsp;MB
|}

==== Alder Lake-P ====

Common features:
* Socket: BGA 1744.
* All the CPUs support dual-channel [[DDR5]]-4800, [[DDR4]]-3200, [[LPDDR5]]-5200 or [[LPDDR4X]]-4266 RAM.
* All CPU models provide 8 lanes of [[PCIe 4.0]] and 12 lanes of PCIe 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 1.25&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/132217.html 1270PE]
| rowspan=3 | 4 (8)
| {{dunno}}
| 4.5
| rowspan=2 | 8 (8)
| {{dunno}}
| 3.3
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| ?–1350
| 18&nbsp;MB
| rowspan=3 | 28&nbsp;W
| rowspan=3 | 64&nbsp;W
| rowspan=2 | {{dts|2022|February|format=mdy|abbr=off}}
|-
! Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/227850.html 1250PE]
| {{dunno}}
| 4.4
| {{dunno}}
| 3.2
| Iris Xe<br />(80 EU)
| ?–1300
| rowspan=2 | 12&nbsp;MB
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/227852.html 1220PE]
| {{dunno}}
| 4.2
| 4 (4)
| {{dunno}}
| 3.1
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(48 EU)
| ?–1250
| Q1 2022
|}

==== Alder Lake-PS<span class="anchor" id="&quot;Alder Lake-PS&quot; (Intel 7)"></span> ====

Common features:
* Socket: LGA 1700. While sharing the same socket as Alder Lake-S and Raptor Lake-S, this revision of LGA 1700 is electrically ''incompatible'' with other 12th and 13th generation Intel Core desktop processors.
* All the CPUs support dual-channel [[DDR5]]-4800 or [[DDR4]]-3200 RAM.
* All CPU models provide 8 lanes of [[PCIe 4.0]] and 12 lanes of PCIe 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 1.25&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="4" | Core i7
! style="text-align:left;" data-sort-value="sku10" | [https://ark.intel.com/content/www/us/en/ark/products/229953.html 12800HL]
| rowspan="2" | 6 (12)
| 2.4
| 4.8
| rowspan="8" | 8 (8)
| 1.8
| 3.7
| rowspan="4" | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| rowspan="2" | ?–1400
| rowspan="2" | 24&nbsp;MB
| rowspan="2" | 45&nbsp;W
| rowspan="2" | 65&nbsp;W
| rowspan="10" | Q3 2022
|-
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/228459.html 12700HL]
|2.3
|4.7
|1.7
|3.5
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/230905.html 1265UL]
| rowspan="2" |2 (4)
|1.8
|4.8
|1.3
|2.7
| rowspan="2" |?–1250
| rowspan="2" |12&nbsp;MB
| rowspan="2" |15&nbsp;W
| rowspan="2" |28&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/230904.html 1255UL]
|1.7
|4.7
|1.2
|2.6
|-
! rowspan="4" |Core i5
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/229975.html 12600HL]
| rowspan="2" |4 (8)
|2.7
| rowspan="2" |4.5
|2.0
| rowspan="2" |3.3
| rowspan="4" |Iris Xe<br />(80 EU)
| rowspan="2" |?–1400
| rowspan="2" |18&nbsp;MB
| rowspan="2" |45&nbsp;W
| rowspan="2" |65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/229976.html 12500HL]
|2.5
|1.8
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/230900.html 1245UL]
| rowspan="2" |2 (4)
|1.6
| rowspan="4" |4.4
|1.2
| rowspan="2" |2.5
|?–1250
| rowspan="3" |12&nbsp;MB
| rowspan="2" |15&nbsp;W
| rowspan="2" |28&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/230901.html 1235UL]
|1.3
|1.1
|?–1200
|-
! rowspan="2" |Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/219491.html 12300HL]
|4 (8)
|2.0
| rowspan="2" |4 (4)
|1.5
|3.3
|[[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(48 EU)
|?–1400
|45&nbsp;W
|65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/230902.html 1215UL]
|2 (4)
|1.2
|0.9
|2.5
|UHD Graphics<br />(64 EU)
|?–1100
|10&nbsp;MB
|15&nbsp;W
|28&nbsp;W
|}

==== Alder Lake-H ====

Common features:
* Socket: BGA 1744.
* All the CPUs support dual-channel [[DDR5]]-4800, [[DDR4]]-3200, [[LPDDR5]]-5200 or [[LPDDR4X]]-4266 RAM.
* All CPU models provide 16 lanes of [[PCIe 4.0]], in addition to 12 lanes of PCIe 3.0 provided by the on-package PCH.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 1.25&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/226055.html 12800HE]
| 6 (12)
| 2.4
| 4.6
| rowspan=2 | 8 (8)
| rowspan=2 | 1.8
| 3.5
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| ?–1350
| 24&nbsp;MB
| rowspan=3 | 45&nbsp;W
| rowspan=3 | 115&nbsp;W
| rowspan=3 | {{dts|2022|January|format=mdy|abbr=off}}
|-
! Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/96158.html 12600HE]
| rowspan=2 | 4 (8)
| 2.5
| 4.5
| rowspan=2 | 3.3
| Iris Xe<br />(80 EU)
| ?–1300
| 18&nbsp;MB
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/132226.html 12300HE]
| 1.9
| 4.3
| 4 (4)
| 1.5
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(48 EU)
| ?–1150
| 12&nbsp;MB
|}

=== Core i (13th gen) ===

==== Raptor Lake-S ====

Common features:
* Socket: [[LGA 1700]].
* All the CPUs support dual-channel [[DDR4]]-3200 or [[DDR5]]-5600 RAM.
* All the CPUs provide 16 lanes of [[PCIe 5.0]] and 4 lanes of [[PCIe 4.0]], but support may vary depending on motherboard and chipsets.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core on i7 and above models, 1.25&nbsp;MB per core on i5 and below models.
** E-cores: 4&nbsp;MB per E-core cluster on i7 and above models, 2&nbsp;MB per cluster on i5 and below models (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].
* Turbo Boost version is 2.0.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! rowspan="3" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan=2 | Core i9
! style="text-align:left;" data-sort-value="sku9" | [https://www.intel.com/content/www/us/en/products/sku/232099.html 13900E]
| rowspan=4 | 8 (16)
| 1.8
| 5.2
| rowspan=2 | 16 (16)
| 1.3
| 4.0
| rowspan=7 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD 770]]
| rowspan=2 | 300–1650
| rowspan=2 | 36&nbsp;MB
| 65&nbsp;W
| rowspan=9 | {{dts|2023|January|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku8" | [https://www.intel.com/content/www/us/en/products/sku/232162.html 13900TE]
| 1.0
| 5.0
| 0.8
| rowspan=2 | 3.9
| 35&nbsp;W
|-
! rowspan=2 | Core i7
! style="text-align:left;" data-sort-value="sku7" | [https://www.intel.com/content/www/us/en/products/sku/232168.html 13700E]
| 1.9
| 5.1
| rowspan=4 | 8 (8)
| 1.3
| rowspan=2 | 300–1600
| rowspan=2 | 30&nbsp;MB
| 65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku6" | [https://www.intel.com/content/www/us/en/products/sku/232131.html 13700TE]
| 1.1
| 4.8
| 0.8
| 3.6
| 35&nbsp;W
|-
! rowspan=3 | Core i5
! style="text-align:left;" data-sort-value="sku5" | [https://www.intel.com/content/www/us/en/products/sku/232134.html 13500E]
| rowspan=3 | 6 (12)
| 2.4
| 4.6
| 1.5
| 3.3
| rowspan=3 | 300–1550
| rowspan=2 | 24&nbsp;MB
| 65&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku4" | [https://www.intel.com/content/www/us/en/products/sku/232108.html 13500TE]
| 1.3
| 4.5
| 1.1
| 3.1
| 35&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku3" | [https://www.intel.com/content/www/us/en/products/sku/232148.html 13400E]
| 2.4
| 4.6
| 4 (4)
| 1.5
| 3.3
| 20&nbsp;MB
| 65&nbsp;W
|-
! rowspan=2 | Core i3
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/232163.html 13100E]
| rowspan=2 | 4 (8)
| 3.3
| 4.4
| colspan=3 rowspan=2 {{n/a}}
| rowspan=2 | [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD 730]]
| rowspan=2 | 300–1500
| rowspan=2 | 12&nbsp;MB
| 60&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/232105.html 13100TE]
| 2.4
| 4.1
| 35&nbsp;W
|}

==== Raptor Lake-U ====

Common features:
* Socket: BGA 1744.
* All the CPUs support dual-channel [[DDR5]]-5200, [[DDR4]]-3200, [[LPDDR5]]-6400 or [[LPDDR4X]]-4266 RAM.
* All CPU models provide 8 lanes of [[PCIe 4.0]] and 12 lanes of PCIe 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core.
** E-cores: 4&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core i7
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/233390.html 1365UE]
| rowspan=4 | 2 (4)
| 1.7
| 4.9
| rowspan=3 | 8 (8)
| 1.3
| 3.7
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| ?–1300
| rowspan=3 | 12&nbsp;MB
| rowspan=4 | 15&nbsp;W
| rowspan=4 | 55&nbsp;W
| rowspan=4 | {{dts|2023|January|format=mdy|abbr=off}}
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/233392.html 1345UE]
| 1.4
| 4.6
| 1.2
| 3.4
| rowspan=2 | Iris Xe<br />(80 EU)
| rowspan=2 | ?–1250
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/233389.html 1335UE]
| 1.3
| rowspan=2 | 4.5
| rowspan=2 | 0.9
| rowspan=2 | 3.3
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/233391.html 1315UE]
| 1.2
| 4 (4)
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(64 EU)
| ?–1200
| 10&nbsp;MB
|}

==== Raptor Lake-P ====

Common features:
* Socket: BGA 1744.
* All the CPUs support dual-channel [[DDR5]]-5200, [[DDR4]]-3200, [[LPDDR5]]-6400 or [[LPDDR4X]]-4266 RAM.
* All CPU models provide 8 lanes of [[PCIe 4.0]] and 12 lanes of PCIe 3.0.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core.
** E-cores: 4&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core i7
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/232175.html 1370PE]
| 6 (12)
| 1.9
| 4.8
| rowspan=3 | 8 (8)
| {{dunno}}
| 3.7
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| rowspan=2 | ?–1400
| 24&nbsp;MB
| rowspan=4 | 28&nbsp;W
| rowspan=4 | 64&nbsp;W
| rowspan=4 | {{dts|2023|January|format=mdy|abbr=off}}
|-
! rowspan=2 | Core i5
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/232133.html 1350PE]
| rowspan=3 | 4 (8)
| rowspan=2 | 1.8
| 4.6
| {{dunno}}
| 3.4
| rowspan=2 | Iris Xe<br />(80 EU)
| rowspan=3 | 12&nbsp;MB
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/232157.html 1340PE]
| rowspan=2 | 4.5
| {{dunno}}
| rowspan=2 | 3.3
| ?–1350
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/232169.html 1320PE]
| 1.7
| 4 (4)
| {{dunno}}
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(48 EU)
| ?–1200
|}

==== Raptor Lake-H ====

Common features:
* Socket: BGA 1744.
* All the CPUs support dual-channel [[DDR5]]-5200, [[DDR4]]-3200, [[LPDDR5]]-6400 or [[LPDDR4X]]-4266 RAM.
* All CPU models provide 8 lanes of [[PCIe 5.0]] and 8 lanes of PCIe 4.0, in addition to 12 lanes of PCIe 3.0 provided by the on-package PCH.
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* L1 [[CPU cache|cache]]:
** P-cores: 80&nbsp;KB (48&nbsp;KB data + 32&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core.
** E-cores: 4&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* Fabrication process: [[7 nm process|Intel&nbsp;7]].

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! Core i7
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/232150.html 13800HE]
| 6 (12)
| 2.5
| 5.0
| rowspan=2 | 8 (8)
| 1.8
| 4.0
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|Iris Xe]]<br />(96 EU)
| rowspan=2 | ?–1400
| 24&nbsp;MB
| rowspan=3 | 45&nbsp;W
| rowspan=3 | 115&nbsp;W
| rowspan=3 | {{dts|2023|January|format=mdy|abbr=off}}
|-
! Core i5
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/232152.html 13600HE]
| rowspan=2 | 4 (8)
| 2.7
| 4.8
| 2.1
| 3.6
| Iris Xe<br />(80 EU)
| 18&nbsp;MB
|-
! Core i3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/232151.html 13300HE]
| 2.1
| 4.6
| 4 (4)
| 1.9
| 3.4
| [[Intel Graphics Technology#Xe-LP architecture (Gen12)|UHD Graphics]]<br />(48 EU)
| ?–1300
| 12&nbsp;MB
|}

=== Core / Core Ultra 3/5/7/9 (Series 1) ===

==== Meteor Lake-PS ====

Common features:
* Socket: LGA 1851 (electrically incompatible with the socket used by non-embedded processors such as Arrow Lake-S).
* All the CPUs support dual-channel [[DDR5]]-5600 RAM.
* All CPU models provide 20 lanes of [[PCIe 4.0]].
* All CPUs feature a [[Direct Media Interface|DMI]] 4.0 8-lane bus to the chipset ([[Platform Controller Hub|PCH]]).
* Includes integrated graphics based on [[Arc Alchemist|Alchemist]] architecture.
* L1 [[CPU cache|cache]]:
** P-cores: 112&nbsp;KB (48&nbsp;KB data + 64&nbsp;KB instructions) per core.
** E-cores: 96&nbsp;KB (64&nbsp;KB data + 32&nbsp;KB instructions) per core.
* L2 cache:
** P-cores: 2&nbsp;MB per core.
** E-cores: 2&nbsp;MB per E-core cluster (each "cluster" contains four cores).
* All processor models also feature 2× "LP E-Cores" which are clocked at 0.7&nbsp;GHz base, 2.1&nbsp;GHz boost (2.5&nbsp;GHz on HL-suffix models) and have 2&nbsp;MB of L2 cache.
* Fabrication process: [[5 nm process|Intel&nbsp;4]] (compute tile).
* Configurable TDP (cTDP) of 12–28&nbsp;W is featured on UL-suffix models, and 20–65&nbsp;W on HL-suffix models.

{| class="wikitable sortable nowrap" style="text-align: center;"
|-
! class="unsortable" rowspan="3" | Processor<br />branding
! rowspan="3" | Model
! colspan="3" | P-core (performance)
! colspan="3" | E-core (efficiency)
! colspan="2" | Integrated [[GPU]]
! class="unsortable" rowspan="3" | [[Smart Cache|Smart<br />Cache]]
! colspan="2" | [[Thermal design power|TDP]]
! rowspan="3" | Release<br />date
|-
! class="unsortable" rowspan="2" | [[CPU core|Cores]]<br />([[Thread (computing)|Threads]])
! colspan="2" | [[Clock rate]] (GHz)
! class="unsortable" rowspan="2" | Cores<br />(Threads)
! colspan="2" | Clock rate (GHz)
! class="unsortable" rowspan="2" | Model
! class="unsortable" rowspan="2" | Clock (MHz)
! rowspan="2" | Base
! class="unsortable" rowspan="2" | Max.<br />Turbo
|-
! class="unsortable" | Base
! class="unsortable" | Turbo
! class="unsortable" | Base
! class="unsortable" | Turbo
|-
! rowspan="4" |Core&nbsp;Ultra&nbsp;7
! style="text-align:left;" data-sort-value="sku9" | [https://ark.intel.com/content/www/us/en/ark/products/239788.html 165HL]
| rowspan="2" |6 (12)
| rowspan="2" |1.4
|5.0
| rowspan="8" |8 (8)
| rowspan="2" |0.9
| rowspan="4" |3.8
| rowspan="2" |[[Intel Arc]]<br />(8 Xe-cores)
|?–2300
| rowspan="2" |24&nbsp;MB
| rowspan="2" |45&nbsp;W
| rowspan="2" |115&nbsp;W
| rowspan="9" |{{dts|2024|April|format=mdy|abbr=off}}
|-
! style="text-align:left;" data-sort-value="sku8" | [https://ark.intel.com/content/www/us/en/ark/products/239786.html 155HL]
|4.8
|?–2250
|-
! style="text-align:left;" data-sort-value="sku7" | [https://ark.intel.com/content/www/us/en/ark/products/239802.html 165UL]
| rowspan="2" | 2 (4)
| rowspan="3" | 1.7
| 4.9
| rowspan="2" | 1.2
| rowspan="2" | [[Intel Arc|Intel Graphics]]<br />(4 Xe-cores)
| ?–2000
| rowspan="2" | 12&nbsp;MB
| rowspan="2" | 15&nbsp;W
| rowspan="2" | 57&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku6" | [https://ark.intel.com/content/www/us/en/ark/products/239787.html 155UL]
|4.8
|?–1950
|-
! rowspan="4" |Core&nbsp;Ultra&nbsp;5
! style="text-align:left;" data-sort-value="sku5" | [https://ark.intel.com/content/www/us/en/ark/products/239784.html 135HL]
| rowspan="2" |4 (8)
|4.6
|1.2
| rowspan="4" |3.6
|Intel Arc<br />(8 Xe-cores)
| rowspan="2" |?–2200
| rowspan="2" |18&nbsp;MB
| rowspan="2" |45&nbsp;W
| rowspan="2" |115&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku4" | [https://ark.intel.com/content/www/us/en/ark/products/239782.html 125HL]
|1.2
|4.5
|0.7
|Intel Arc<br />(7 Xe-cores)
|-
! style="text-align:left;" data-sort-value="sku3" | [https://ark.intel.com/content/www/us/en/ark/products/239785.html 135UL]
| rowspan="3" |2 (4)
|1.6
|4.4
|1.1
| rowspan="2" |Intel Graphics<br />(4 Xe-cores)
|?–1900
| rowspan="2" |12&nbsp;MB
| rowspan="3" |15&nbsp;W
| rowspan="3" |57&nbsp;W
|-
! style="text-align:left;" data-sort-value="sku2" | [https://ark.intel.com/content/www/us/en/ark/products/239783.html 125UL]
|1.3
|4.3
|0.8
|?–1850
|-
!Core&nbsp;Ultra&nbsp;3
! style="text-align:left;" data-sort-value="sku1" | [https://ark.intel.com/content/www/us/en/ark/products/239781.html 105UL]
|1.5
|4.2
|4 (4)
|1.0
|3.5
|Intel Graphics<br />(3 Xe-cores)
|?–1800
|10&nbsp;MB
|}

== See also ==
* [[List of Intel Pentium M microprocessors]]
* [[List of Intel Celeron processors]]
* [[List of Intel Pentium processors]]
* [[Intel Core]]
* [[Intel Core 2]]
* [[Comparison of Intel processors]]
* [[Enhanced Pentium M (microarchitecture)]]
* [[Intel Core (microarchitecture)]]
* [[Penryn (microarchitecture)]]
* [[Alder Lake (microprocessor)]]

== References ==
{{reflist}}
*[https://web.archive.org/web/20100304212004/http://www.reghardware.co.uk/2006/05/23/ati_confirms_intel_allendale/ ATI provides pointer to Intel's 'Allendale'], May 23, 2006
*[https://web.archive.org/web/20060716013939/http://www.theinquirer.net/default.aspx?article=32026 Rumoured prices and specifications for Intel Core 2], May 30, 2006
*[http://www.tgdaily.com/2006/07/24/intel_to_launch_core_2_duo TGDaily indicates leaked release dates],{{dead link|date=April 2018 |bot=InternetArchiveBot |fix-attempted=yes}} July 24, 2006
*[http://digitimes.com/mobos/a20060717PB213.html Intel to unveil five Merom CPUs in July, paper says]{{subscription required}} as re-reported by DigiTimes, July 17, 2006
*[https://web.archive.org/web/20060811230151/http://www.intel.com/pressroom/archive/releases/20060727comp.htm Intel Unveils World's Best Processor],{{dead link|date=October 2018}} July 27, 2006
*[https://web.archive.org/web/20070911160332/http://www.intel.com/pressroom/archive/releases/20070716corp_a.htm?iid=pr1_releasepri_20070716ar Intel Takes Popular Laptops to 'Extreme' with First-Ever Extreme Edition Mobile Processor; Adds New Desktop Chip],{{dead link|date=October 2018}} July 16, 2007
*[http://xtreview.com/addcomment-id-2933-view-Core-2-duo-1333-mhz-stepping.html CORE 2 DUO 1333 MHZ STEPPING] {{Webarchive|url=https://web.archive.org/web/20220520215131/http://xtreview.com/addcomment-id-2933-view-Core-2-duo-1333-mhz-stepping.html |date=May 20, 2022 }}, July 18, 2007

== External links ==
* [http://qdms.intel.com/MDDS/MDDSView.aspx Search MDDS Database]
* [http://ark.intel.com/ Intel ARK Database]
*[http://ark.intel.com/sspecqdf.aspx SSPEC/QDF Reference] (Intel)
*[http://www.intel.com/products/processor_number Intel® Processor Names, Numbers and Generation List]
* [http://pc.watch.impress.co.jp/img/pcw/docs/360/112/html/1.jpg.html Intel CPU Transition Roadmap 2008–2013]
* [http://pc.watch.impress.co.jp/img/pcw/docs/360/112/html/2.jpg.html Intel Desktop CPU Roadmap 2004–2011]
* [http://www.intel.com/support/notebook/sb/CS-022129.htm Intel Core Solo mobile processor product order code table]
* [http://www.intel.com/support/notebook/sb/CS-022128.htm Intel Core Duo mobile processor product order code table]
* [http://download.intel.com/design/mobile/datashts/30922106.pdf Intel Core Duo Processor and Core Solo Processor on 65 nm Process Datasheet]
* [https://web.archive.org/web/20071129150113/http://download.intel.com/design/mobile/SPECUPDT/30922210.pdf Intel Core Duo Processor and Core Solo Processor on 65 nm Process Specification Update]
*[http://www.intel.com/design/intarch/core2duo/tech_docs.htm Intel Core 2 Duo Processors Technical Documents]
* [http://www.intel.com/support/processors/corei3/sb/CS-031170.htm Intel Core i3 desktop processor product order code table]
* [http://www.intel.com/support/processors/mobile/corei3/sb/CS-031171.htm Intel Core i3 mobile processor product order code table]
* [http://www.intel.com/support/processors/corei5/sb/CS-030855.htm Intel Core i5 desktop processor product order code table]
* [http://www.intel.com/support/processors/mobile/corei5/sb/CS-031172.htm Intel Core i5 mobile processor product order code table]
* [http://www.intel.com/support/processors/corei7/sb/CS-029906.htm Intel Core i7 desktop processor product order code table]
* [http://www.intel.com/support/processors/mobile/corei7/sb/CS-030872.htm Intel Core i7 mobile processor product order code table]
* [http://www.intel.com/support/processors/corei7ee/sb/CS-029905.htm Intel Core i7 desktop processor Extreme Edition product order code table]
* [http://www.intel.com/support/processors/mobile/corei7extreme/sb/CS-030874.htm Intel Core i7 mobile processor Extreme Edition product order code table]
* [http://www.intel.com/products/processor/corei7/index.htm Intel's Core i7 web page]
* [http://www.intel.com/products/processor/corei7EE/index.htm Intel's Core i7 Extreme Edition web page]
* [http://www.intel.com/products/processor_number/chart/corei7.htm?iid=pn_det+list_ci7 Intel's Core i7 Processor Numbers]
* [http://www.intel.com/products/processor_number/chart/corei7ee.htm?iid=pn_det+list_ci7ee Intel's Core i7 Extreme Edition Processor Numbers]
* [https://web.archive.org/web/20141104224122/http://www.intc.com/pricelist.cfm Intel Corporation – Processor Price List]
* [https://www.intc.com/investor-relations/investor-education-and-news/cpu-price-list/default.aspx Intel Corporation – Processor Price List]
* [http://ark.intel.com/products/family/123588/Intel-Core-X-series-Processors/ Intel Core X-series processors]

{{Intel processors}}

{{Authority control}}

[[Category:Intel x86 microprocessors|
*Core
*Core 2
*Core i3
*Core i5
*Core i7
*Core i9]]
[[Category:Lists of microprocessors|
Intel Core
Intel Core 2
Intel Core i3
Intel Core i5
Intel Core i7
Intel Core i9]]