View source for General-purpose computing on graphics processing units

{{Short description|Use of a GPU for computations typically assigned to CPUs}}
{{Use dmy dates|date=January 2015}}
{{More citations needed|date=February 2022}}

'''General-purpose computing on graphics processing units''' ('''GPGPU''', or less often '''GPGP''') is the use of a [[graphics processing unit]] (GPU), which typically handles computation only for [[computer graphics]], to perform computation in applications traditionally handled by the [[central processing unit]] (CPU).<ref>{{Cite conference |last1=Fung |first1=James |last2=Tang |first2=Felix |last3=Mann |first3=Steve |date=7–10 October 2002 |title=Mediated Reality Using Computer Graphics Hardware for Computer Vision |url=http://www.eyetap.org/papers/docs/iswc02-fung.pdf |conference=Proceedings of the International Symposium on Wearable Computing 2002 (ISWC2002) |location=Seattle, Washington, USA |pages=83–89 |archive-url=https://web.archive.org/web/20120402173637/http://www.eyetap.org/~fungja/glorbits_final.pdf |archive-date=2 April 2012}}</ref><ref name="Aimone">{{cite journal | url=https://link.springer.com/article/10.1007/s00779-003-0239-6 | doi=10.1007/s00779-003-0239-6 | title=An Eye ''Tap'' video-based featureless projective motion estimation assisted by gyroscopic tracking for wearable computer mediated reality | year=2003 | last1=Aimone | first1=Chris | last2=Fung | first2=James | last3=Mann | first3=Steve | journal=Personal and Ubiquitous Computing | volume=7 | issue=5 | pages=236–248 | s2cid=25168728 | url-access=subscription }}</ref><ref>[http://www.eyetap.org/papers/docs/procicassp2004.pdf "Computer Vision Signal Processing on Graphics Processing Units", Proceedings of the IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2004)] {{webarchive|url=https://web.archive.org/web/20110819000326/http://www.eyetap.org/papers/docs/procicassp2004.pdf |date=19 August 2011 }}: Montreal, Quebec, Canada, 17–21 May 2004, pp. V-93 – V-96</ref><ref>Chitty, D. M. (2007, July). [https://www.cs.york.ac.uk/rts/docs/GECCO_2007/docs/p1566.pdf A data parallel approach to genetic programming using programmable graphics hardware] {{webarchive|url=https://web.archive.org/web/20170808190114/https://www.cs.york.ac.uk/rts/docs/GECCO_2007/docs/p1566.pdf |date=8 August 2017 }}. In Proceedings of the 9th annual conference on Genetic and evolutionary computation (pp. 1566-1573). ACM.</ref> The use of multiple [[video card]]s in one computer, or large numbers of graphics chips, further parallelizes the already parallel nature of graphics processing.<ref>[http://eyetap.org/papers/docs/procicpr2004.pdf "Using Multiple Graphics Cards as a General Purpose Parallel Computer: Applications to Computer Vision", Proceedings of the 17th International Conference on Pattern Recognition (ICPR2004)] {{webarchive|url=https://web.archive.org/web/20110718193841/http://eyetap.org/papers/docs/procicpr2004.pdf |date=18 July 2011 }}, Cambridge, United Kingdom, 23–26 August 2004, volume 1, pages 805–808.</ref>

Essentially, a GPGPU [[graphics pipeline|pipeline]] is a kind of [[Parallel computing|parallel processing]] between one or more GPUs and CPUs that analyzes data as if it were in image or other graphic form. While GPUs operate at lower frequencies, they typically have many times the number of [[Multi-core processor|cores]]. Thus, GPUs can process far more pictures and graphical data per second than a traditional CPU. Migrating data into graphical form and then using the GPU to scan and analyze it can create a large [[speedup]].

GPGPU pipelines were developed at the beginning of the 21st century for [[graphics processing]] (e.g. for better [[shader]]s). These pipelines were found to fit [[scientific computing]] needs well, and have since been developed in this direction.

The best-known GPGPUs are [[Nvidia Tesla]] that are used for [[Nvidia DGX]], alongside [[AMD Instinct]] and Intel Gaudi.

==History==

In principle, any arbitrary [[Boolean function]], including addition, multiplication, and other mathematical functions, can be built up from a [[functional completeness|functionally complete]] set of logic operators. In 1987, [[Conway's Game of Life]] became one of the first examples of general-purpose computing using an early [[stream processing|stream processor]] called a [[blitter]] to invoke a special sequence of [[bit blit|logical operations]] on bit vectors.<ref>{{cite journal|last=Hull|first=Gerald|title=LIFE|journal=Amazing Computing|volume=2|issue=12|pages=81–84|date=December 1987|url=https://archive.org/stream/amazing-computing-magazine-1987-12/Amazing_Computing_Vol_02_12_1987_Dec#page/n81/mode/2up}}</ref>

General-purpose computing on GPUs became more practical and popular after about 2001, with the advent of both programmable [[shader]]s and [[floating point]] support on graphics processors. Notably, problems involving [[matrix (mathematics)|matrices]] and/or [[vector (mathematics and physics)|vector]]s{{snd}} especially two-, three-, or four-dimensional vectors{{snd}} were easy to translate to a GPU, which acts with native speed and support on those types. A significant milestone for GPGPU was the year 2003 when two research groups independently discovered GPU-based approaches for the solution of general linear algebra problems on GPUs that ran faster than on CPUs.<ref>{{Cite journal |last1=Krüger |first1=Jens |last2=Westermann |first2=Rüdiger |date=July 2003 |title=Linear algebra operators for GPU implementation of numerical algorithms |url=https://dl.acm.org/doi/10.1145/882262.882363 |journal=ACM Transactions on Graphics |language=en |volume=22 |issue=3 |pages=908–916 |doi=10.1145/882262.882363 |issn=0730-0301|url-access=subscription }}</ref><ref>{{Cite journal |last1=Bolz |first1=Jeff |last2=Farmer |first2=Ian |last3=Grinspun |first3=Eitan |last4=Schröder |first4=Peter |date=July 2003 |title=Sparse matrix solvers on the GPU: conjugate gradients and multigrid |url=https://dl.acm.org/doi/10.1145/882262.882364 |journal=ACM Transactions on Graphics |language=en |volume=22 |issue=3 |pages=917–924 |doi=10.1145/882262.882364 |issn=0730-0301|url-access=subscription }}</ref> These early efforts to use GPUs as general-purpose processors required reformulating computational problems in terms of graphics primitives, as supported by the two major APIs for graphics processors, [[OpenGL]] and [[DirectX]]. This cumbersome translation was obviated by the advent of general-purpose programming languages and APIs such as [[Lib Sh|Sh]]/[[RapidMind]], [[BrookGPU|Brook]] and Accelerator.<ref>{{cite journal |last1=Tarditi |first1=David |first2=Sidd |last2=Puri |first3=Jose |last3=Oglesby |title=Accelerator: using data parallelism to program GPUs for general-purpose uses |journal=ACM SIGARCH Computer Architecture News |volume=34 |issue=5 |date=2006|url=https://www.cs.cmu.edu/afs/cs/academic/class/15740-f07/public/discussion-papers/26-tarditi-asplos06.pdf|doi=10.1145/1168919.1168898 }}</ref><ref>{{cite journal |last1=Che |first1=Shuai |last2=Boyer |first2=Michael |last3=Meng |first3=Jiayuan |last4=Tarjan |first4=D. |last5=Sheaffer |first5=Jeremy W. |last6=Skadron |first6=Kevin |title=A performance study of general-purpose applications on graphics processors using CUDA |journal=J. Parallel and Distributed Computing |volume=68 |issue=10 |date=2008 |pages=1370–1380 |doi=10.1016/j.jpdc.2008.05.014 |df=dmy-all |citeseerx=10.1.1.143.4849 }}</ref><ref>{{cite journal |last1=Glaser |first1=J. |last2=Nguyen |first2=T. D. |last3=Anderson |first3=J. A. |last4=Lui |first4=P. |last5=Spiga |first5=F. |last6=Millan |first6=J. A. |last7=Morse |first7=D. C. |last8=Glotzer |first8=S. C. |date=2015 |title=Strong scaling of general-purpose molecular dynamics simulations on GPUs |journal=Computer Physics Communications |volume=192 |pages=97–107 | doi=10.1016/j.cpc.2015.02.028|arxiv=1412.3387 |bibcode=2015CoPhC.192...97G | doi-access=free}}</ref>

These were followed by Nvidia's [[CUDA]], which allowed programmers to ignore the underlying graphical concepts in favor of more common [[high-performance computing]] concepts.<ref name="du">{{Cite journal |doi= 10.1016/j.parco.2011.10.002 |title= From CUDA to OpenCL: Towards a performance-portable solution for multi-platform GPU programming |journal= Parallel Computing |volume= 38 |issue= 8 |pages= 391–407 |year= 2012 |last1= Du |first1= Peng |last2= Weber |first2= Rick |last3= Luszczek |first3= Piotr |last4= Tomov |first4= Stanimire |last5= Peterson |first5= Gregory |last6= Dongarra |first6= Jack |author-link6= Jack Dongarra |df= dmy-all |citeseerx= 10.1.1.193.7712 }}</ref> Newer, hardware-vendor-independent offerings include Microsoft's [[DirectCompute]] and Apple/Khronos Group's [[OpenCL]].<ref name="du"/>  This means that modern GPGPU pipelines can leverage the speed of a GPU without requiring full and explicit conversion of the data to a graphical form.

Mark Harris, the founder of GPGPU.org, claims he coined the term ''GPGPU''.<ref>{{cite web|url=https://developer.nvidia.com/blog/even-easier-introduction-cuda|title=An Even Easier Introduction to CUDA|last=Harris|first=Mark|date=2017-01-25|work=Nvidia|access-date=16 February 2025}}</ref>

==Implementations==
Any language that allows the code running on the CPU to poll a GPU [[shader]] for return values, can create a GPGPU framework. Programming standards for parallel computing include [[OpenCL]] (vendor-independent), [[OpenACC]], [[OpenMP]] and [[OpenHMPP]]. 

{{As of|2016}}, OpenCL is the dominant open general-purpose GPU computing language, and is an open standard defined by the [[Khronos Group]].{{Citation needed|date=September 2020|reason=No source for claim of dominance at the time and possibly very outdated now}} OpenCL provides a [[cross-platform]] GPGPU platform that additionally supports data parallel compute on CPUs. OpenCL is actively supported on Intel, AMD, Nvidia, and ARM platforms. The Khronos Group has also standardised and implemented [[SYCL]], a higher-level programming model for [[OpenCL]] as a single-source domain specific embedded language based on pure C++11.

The dominant proprietary framework is [[Nvidia]] [[CUDA]].<ref>{{cite web |url=http://www.hpcwire.com/hpcwire/2012-02-28/opencl_gains_ground_on_cuda.html |title=OpenCL Gains Ground on CUDA |access-date=2012-04-10 |url-status=live |archive-url=https://web.archive.org/web/20120423060057/http://www.hpcwire.com/hpcwire/2012-02-28/opencl_gains_ground_on_cuda.html |archive-date=23 April 2012 |df=dmy-all |date=2012-02-28 }} "As the two major programming frameworks for GPU computing, OpenCL and CUDA have been competing for mindshare in the developer community for the past few years."</ref> Nvidia launched CUDA in 2006, a [[software development kit]] (SDK) and [[application programming interface]] (API) that allows using the programming language [[C (programming language)|C]] to code algorithms for execution on [[GeForce 8 series]] and later GPUs.

[[ROCm]], launched in 2016, is AMD's open-source response to CUDA. It is, as of 2022, on par with CUDA with regards to features,{{source?|date=December 2024}} and still lacking in consumer support.{{source?|date=December 2024}}

OpenVIDIA was developed at [[University of Toronto]] between 2003–2005,<ref name="Fung">{{cite book | last1 = Fung | first1 = James | last2 = Mann | first2 = Steve | author-link2 = Steve Mann (inventor) | last3 = Aimone | first3 = Chris | chapter = OpenVIDIA: Parallel GPU computer vision | title = Proceedings of the 13th annual ACM international conference on Multimedia | publication-date = 6 November 2005 | date = 6–11 November 2005 | isbn = 1595930442 | publisher = [[Association for Computing Machinery]] | location = Singapore | doi = 10.1145/1101149.1101334 | pages = 849–852 | accessdate = 18 March 2025 | chapter-url = http://www.eyetap.org/papers/docs/oss1-fung.pdf | archive-url = https://web.archive.org/web/20191223164955/http://www.eyetap.org/papers/docs/oss1-fung.pdf | archive-date = 23 December 2019}}</ref> in collaboration with Nvidia.

Altimesh Hybridizer created by [[Altimesh]] compiles [[Common Intermediate Language]] to CUDA binaries.<ref>{{cite web|title=Hybridizer|url=http://www.altimesh.com/hybridizer-essentials/|website=Hybridizer|url-status=live|archive-url=https://web.archive.org/web/20171017150337/http://www.altimesh.com/hybridizer-essentials/|archive-date=17 October 2017|df=dmy-all}}</ref><ref>{{cite web|title=Home page|url=http://www.altimesh.com/|website=Altimesh|url-status=live|archive-url=https://web.archive.org/web/20171017145518/http://www.altimesh.com/|archive-date=17 October 2017|df=dmy-all}}</ref> It supports generics and virtual functions.<ref>{{cite web|title=Hybridizer generics and inheritance|url=http://www.altimesh.com/generics-and-inheritance/|url-status=live|archive-url=https://web.archive.org/web/20171017145927/http://www.altimesh.com/generics-and-inheritance/|archive-date=17 October 2017|df=dmy-all|date=2017-07-27}}</ref> Debugging and profiling is integrated with [[Visual Studio]] and Nsight.<ref>{{cite web|title=Debugging and Profiling with Hybridizer|url=http://www.altimesh.com/debugging-and-profiling/|url-status=live|archive-url=https://web.archive.org/web/20171017201449/http://www.altimesh.com/debugging-and-profiling/|archive-date=17 October 2017|df=dmy-all|date=2017-06-05}}</ref> It is available as a Visual Studio extension on Visual Studio Marketplace.

[[Microsoft]] introduced the [[DirectCompute]] GPU computing API, released with the [[DirectX 11]] API.

''{{visible anchor|Alea GPU}}'',<ref>{{cite web|title=Introduction|url=http://www.aleagpu.com/release/3_0_2/doc/|website=Alea GPU|access-date=15 December 2016|url-status=live|archive-url=https://web.archive.org/web/20161225051728/http://www.aleagpu.com/release/3_0_2/doc/|archive-date=25 December 2016|df=dmy-all}}</ref> created by QuantAlea,<ref>{{cite web|title=Home page|url=http://www.quantalea.com/|website=Quant Alea|access-date=15 December 2016|url-status=live|archive-url=https://web.archive.org/web/20161212112729/http://www.quantalea.com/|archive-date=12 December 2016|df=dmy-all}}</ref> introduces native GPU computing capabilities for the Microsoft .NET languages [[F Sharp (programming language)|F#]]<ref>{{cite web|title=Use F# for GPU Programming|url=http://fsharp.org/use/gpu/|publisher=F# Software Foundation|access-date=15 December 2016|url-status=dead|archive-url=https://web.archive.org/web/20161218090254/http://fsharp.org/use/gpu/|archive-date=18 December 2016|df=dmy-all}}</ref> and [[C Sharp (programming language)|C#]]. Alea GPU also provides a simplified GPU programming model based on GPU parallel-for and parallel aggregate using delegates and automatic memory management.<ref>{{cite web | url=http://www.quantalea.com/features | website=Quant Alea | title=Alea GPU Features | access-date=15 December 2016 | url-status=live | archive-url=https://web.archive.org/web/20161221090440/http://quantalea.com/features/ | archive-date=21 December 2016 | df=dmy-all }}</ref>

[[MATLAB]] supports GPGPU acceleration using the ''Parallel Computing Toolbox'' and ''MATLAB Distributed Computing Server'',<ref>{{cite web|title=MATLAB Adds GPGPU Support|url=http://www.hpcwire.com/features/MATLAB-Adds-GPGPU-Support-103307084.html|date=20 September 2010|url-status=dead|archive-url=https://web.archive.org/web/20100927155948/http://www.hpcwire.com/features/MATLAB-Adds-GPGPU-Support-103307084.html|archive-date=27 September 2010|df=dmy-all}}</ref> and third-party packages like [[Jacket (software)|Jacket]].

GPGPU processing is also used to simulate [[Newtonian physics]] by [[physics engine]]s,<ref name="Joselli"/> and commercial implementations include [[Havok (software)|Havok Physics, FX]] and [[PhysX]], both of which are typically used for computer and [[video game]]s.

C++ Accelerated Massive Parallelism ([[C++ AMP]]) is a library that accelerates execution of [[C++]] code by exploiting the data-parallel hardware on GPUs.

===Mobile computers===
Due to a trend of increasing power of mobile GPUs, general-purpose programming became available also on the mobile devices running major [[mobile operating system]]s.

[[Google]] [[Android (operating system)|Android]] 4.2 enabled running [[RenderScript]] code on the mobile device GPU.<ref>{{cite web|url=http://developer.android.com/about/versions/android-4.2.html|title=Android 4.2 APIs - Android Developers|website=developer.android.com|url-status=live|archive-url=https://web.archive.org/web/20130826191621/http://developer.android.com/about/versions/android-4.2.html|archive-date=26 August 2013|df=dmy-all}}</ref>  Renderscript has since been deprecated in favour of first OpenGL compute shaders<ref>{{cite web | url=https://developer.android.com/guide/topics/renderscript/migrate/migrate-gles | title=Migrate scripts to OpenGL ES 3.1 }}</ref> and later Vulkan Compute.<ref>{{cite web | url=https://developer.android.com/guide/topics/renderscript/migrate/migrate-vulkan | title=Migrate scripts to Vulkan }}</ref> OpenCL is available on many Android devices, but is not officially supported by Android.<ref>{{cite web|url=https://khronos.org/blog/catching-up-with-khronos-experts-qa-on-opencl-3.0-and-sycl-2020|title=Catching Up with Khronos: Experts' Q&A on OpenCL 3.0 and SYCL 2020|last=McIntosh-Smith|first=Simon|date=2020-07-15|publisher=The Khronos Group|access-date=16 February 2025}}</ref> [[Apple Inc.|Apple]] introduced the proprietary [[Metal (API)|Metal]] API for [[iOS]] applications, able to execute arbitrary code through Apple's GPU compute shaders.{{fact|date=June 2024}}

==Hardware support==
Computer [[video card]]s are produced by various vendors, such as [[Nvidia]], [[AMD]]. Cards from such vendors differ on implementing data-format support, such as [[integer]] and [[floating-point]] formats (32-bit and 64-bit). [[Microsoft]] introduced a ''[[High-Level Shading Language#Shader model comparison|Shader Model]]'' standard, to help rank the various features of graphic cards into a simple Shader Model version number (1.0, 2.0, 3.0, etc.).

===Integer numbers===
Pre-DirectX 9 video cards only supported [[Palette (computing)|paletted]] or integer color types. Sometimes another alpha value is added, to be used for transparency.<!-- What about alpha? what about RG or R formats? Are we documenting texture formats or computing (always 4D)? "Transparency is graphics specific! Must it be cited? --> Common formats are:

* 8 bits per pixel – Sometimes palette mode, where each value is an index in a table with the real color value specified in one of the other formats. Sometimes three bits for red, three bits for green, and two bits for blue.
* 16 bits per pixel – Usually the bits are allocated as five bits for red, six bits for green, and five bits for blue.
* 24 bits per pixel – There are eight bits for each of red, green, and blue.
* 32 bits per pixel – There are eight bits for each of red, green, blue, and [[alpha compositing|alpha]].

===Floating-point numbers===
For early [[fixed-function]] or limited programmability graphics (i.e., up to and including DirectX 8.1-compliant GPUs) this was sufficient because this is also the representation used in displays. This representation does have certain limitations. Given sufficient graphics processing power even graphics programmers would like to use better formats, such as [[floating point]] data formats, to obtain effects such as [[high-dynamic-range imaging]]. Many GPGPU applications require floating point accuracy, which came with video cards conforming to the DirectX 9 specification.

DirectX 9 Shader Model 2.x suggested the support of two precision types: full and partial precision. Full precision support could either be FP32 or FP24 (floating point 32- or 24-bit per component) or greater, while partial precision was FP16. [[ATI Technologies|ATI's]] [[Radeon R300]] series of GPUs supported FP24 precision only in the programmable fragment pipeline (although FP32 was supported in the vertex processors) while [[Nvidia]]'s [[GeForce FX|NV30]] series supported both FP16 and FP32; other vendors such as [[S3 Graphics]] and [[XGI Technology|XGI]] supported a mixture of formats up to FP24.

The implementations of floating point on Nvidia GPUs are mostly [[IEEE floating-point standard|IEEE]] compliant; however, this is not true across all vendors.<ref name="nVidiaIsIEEE">{{cite book | chapter-url=https://dl.acm.org/doi/10.1145/1198555.1198768 | doi=10.1145/1198555.1198768 | chapter=Mapping computational concepts to GPUs | title=ACM SIGGRAPH 2005 Courses on - SIGGRAPH '05 | year=2005 | last1=Harris | first1=Mark | pages=50–es | isbn=9781450378338 | s2cid=8212423 }}</ref><!-- It doesn't match even with Intel and AMD. It's just OK for FP. -->  This has implications for correctness which are considered important to some scientific applications. While 64-bit floating point values (double precision float) are commonly available on CPUs, these are not universally supported on GPUs. Some GPU architectures sacrifice IEEE compliance, while others lack double-precision.  Efforts have occurred to emulate double-precision floating point values on GPUs; however, the speed tradeoff negates any benefit to offloading the computing onto the GPU in the first place.<ref name="doublePrecisionOnGPU">[http://www.mathematik.tu-dortmund.de/papers/GoeddekeStrzodkaTurek2005.pdf Double precision on GPUs (Proceedings of ASIM 2005)] {{webarchive|url=https://web.archive.org/web/20140821160055/http://www.mathematik.tu-dortmund.de/papers/GoeddekeStrzodkaTurek2005.pdf |date=21 August 2014 }}: Dominik Goddeke, Robert Strzodka, and Stefan Turek. Accelerating Double Precision (FEM) Simulations with (GPUs). Proceedings of ASIM 2005{{snd}} 18th Symposium on Simulation Technique, 2005.</ref>

===Vectorization===
{{Unreferenced section|date=July 2017}}
Most operations on the GPU operate in a vectorized fashion: one operation can be performed on up to four values at once. For example, if one color {{angbr|R1, G1, B1}} is to be modulated by another color {{angbr|R2, G2, B2}}, the GPU can produce the resulting color {{angbr|R1*R2, G1*G2, B1*B2}} in one operation. This functionality is useful in graphics because almost every basic data type is a vector (either 2-, 3-, or 4-dimensional).{{citation needed|date=July 2017}} Examples include vertices, colors, normal vectors, and texture coordinates. Many other applications can put this to good use, and because of their higher performance, vector instructions, termed single instruction, multiple data ([[Single instruction, multiple data|SIMD]]), have long been available on CPUs.{{citation needed|date=July 2017}}

==GPU vs. CPU==
{{Original research section|date=February 2015}}
{{Unreferenced section|date=July 2017}}
Originally, data was simply passed one-way from a [[central processing unit]] (CPU) to a [[graphics processing unit]] (GPU), then to a [[display device]]. As time progressed, however, it became valuable for GPUs to store at first simple, then complex structures of data to be passed back to the CPU that analyzed an image, or a set of scientific-data represented as a 2D or 3D format that a video card can understand. Because the GPU has access to every draw operation, it can analyze data in these forms quickly, whereas a CPU must poll every pixel or data element much more slowly, as the speed of access between a CPU and its larger pool of [[random-access memory]] (or in an even worse case, a [[hard drive]]) is slower than GPUs and video cards, which typically contain smaller amounts of more expensive memory that is much faster to access. Transferring the portion of the data set to be actively analyzed to that GPU memory in the form of textures or other easily readable GPU forms results in speed increase. The distinguishing feature of a GPGPU design is the ability to transfer information [[Duplex (telecommunications)|bidirectionally]] back from the GPU to the CPU; generally the data throughput in both directions is ideally high, resulting in a [[multiplier (coefficient)|multiplier]] effect on the speed of a specific high-use [[algorithm]]. 

GPGPU pipelines may improve efficiency on especially large data sets and/or data containing 2D or 3D imagery. It is used in complex graphics pipelines as well as [[scientific computing]]; more so in fields with large data sets like [[genome mapping]], or where two- or three-dimensional analysis is useful{{snd}} especially at present [[biomolecule]] analysis, [[protein]] study, and other complex [[organic chemistry]]. An example of such applications is [[NVIDIA Parabricks|NVIDIA software suite for genome analysis]].

Such pipelines can also vastly improve efficiency in [[image processing]] and [[computer vision]], among other fields; as well as [[Parallel computing|parallel processing]] generally. Some very heavily optimized pipelines have yielded speed increases of several hundred times the original CPU-based pipeline on one high-use task.

A simple example would be a GPU program that collects data about average [[lighting]] values as it renders some view from either a camera or a computer graphics program back to the main program on the CPU, so that the CPU can then make adjustments to the overall screen view. A more advanced example might use [[edge detection]] to return both numerical information and a processed image representing outlines to a [[computer vision]] program controlling, say, a mobile robot. Because the GPU has fast and local hardware access to every [[pixel]] or other picture element in an image, it can analyze and average it (for the first example) or apply a [[Sobel operator|Sobel edge filter]] or other [[convolution]] filter (for the second) with much greater speed than a CPU, which typically must access slower [[random-access memory]] copies of the graphic in question.

GPGPU is fundamentally a software concept, not a hardware concept; it is a type of [[algorithm]], not a piece of equipment. Specialized equipment designs may, however, even further enhance the efficiency of GPGPU pipelines, which traditionally perform relatively few algorithms on very large amounts of data. Massively parallelized, gigantic-data-level tasks thus may be parallelized even further via specialized setups such as rack computing (many similar, highly tailored machines built into a ''rack''), which adds a third layer{{snd}} many computing units each using many CPUs to correspond to many GPUs. Some [[Bitcoin]] "miners" used such setups for high-quantity processing.

===Caches===
Historically, CPUs have used hardware-managed [[CPU cache|caches]], but the earlier GPUs only provided software-managed local memories. However, as GPUs are being increasingly used for general-purpose applications, state-of-the-art GPUs are being designed with hardware-managed multi-level caches  which have helped the GPUs to move towards mainstream computing. For example, [[GeForce 200 series]] GT200 architecture GPUs did not feature an L2 cache, the [[Fermi (microarchitecture)|Fermi]] GPU has 768&nbsp;KiB last-level cache, the [[Kepler (microarchitecture)|Kepler]] GPU has 1.5&nbsp;MiB last-level cache,<ref>{{cite web |url= http://www.nvidia.com/content/PDF/kepler/NVIDIA-Kepler-GK110-Architecture-Whitepaper.pdf |title= Nvidia-Kepler-GK110-Architecture-Whitepaper |url-status= live |archive-url= https://web.archive.org/web/20150221021022/http://www.nvidia.com/content/PDF/kepler/NVIDIA-Kepler-GK110-Architecture-Whitepaper.pdf |archive-date= 21 February 2015 |df= dmy-all }}</ref> the [[Maxwell (microarchitecture)|Maxwell]] GPU has 2&nbsp;MiB last-level cache, and the [[Pascal (microarchitecture)|Pascal]] GPU has 4&nbsp;MiB last-level cache.

===Register file===
GPUs have very large [[Register file|register files]], which allow them to reduce context-switching latency. Register file size is also increasing over different GPU generations, e.g., the total register file size on Maxwell (GM200), Pascal and Volta GPUs are 6&nbsp;MiB, 14&nbsp;MiB and 20&nbsp;MiB, respectively.<ref>"[https://devblogs.nvidia.com/parallelforall/inside-pascal/ Inside Pascal: Nvidia’s Newest Computing Platform] {{webarchive|url=https://web.archive.org/web/20170507110037/https://devblogs.nvidia.com/parallelforall/inside-pascal/ |date=7 May 2017 }}"</ref><ref>"[https://devblogs.nvidia.com/inside-volta/ Inside Volta: The World’s Most Advanced Data Center GPU] {{webarchive|url=https://web.archive.org/web/20200101171030/https://devblogs.nvidia.com/inside-volta/ |date=1 January 2020 }}"</ref> By comparison, the size of a [[Processor register|register file on CPUs]] is small, typically tens or hundreds of kilobytes.

===Energy efficiency===
The high performance of GPUs comes at the cost of high power consumption, which under full load is in fact as much power as the rest of the PC system combined.<ref>"https://www.tomshardware.com/reviews/geforce-radeon-power,2122.html How Much Power Does Your Graphics Card Need?"</ref> The maximum power consumption of the Pascal series GPU (Tesla P100) was specified to be 250W.<ref>"https://images.nvidia.com/content/tesla/pdf/nvidia-tesla-p100-PCIe-datasheet.pdf Nvidia
 Tesla P100 GPU Accelerator {{webarchive|url=https://web.archive.org/web/20180724140610/https://images.nvidia.com/content/tesla/pdf/nvidia-tesla-p100-PCIe-datasheet.pdf |date=24 July 2018 }}"</ref>

== Classical GPGPU ==
Before CUDA was published in 2007, GPGPU was "classical" and involved repurposing graphics primitives. A standard structure of such was:

# Load arrays into textures
# Draw a quadrangle
# Apply pixel shaders and textures to quadrangle
# Read out pixel values in the quadrangle as array

More examples are available in part 4 of ''GPU Gems 2''.<ref>{{Cite book |url=https://developer.nvidia.com/gpugems/gpugems2/ |title=GPU gems 2: programming techniques for high-performance graphics and general-purpose computation |date=2006 |publisher=Addison-Wesley |isbn=978-0-321-33559-3 |editor-last=Pharr |editor-first=Matt |edition=3. print |location=Upper Saddle River, NJ Munich |chapter=Part IV: General-Purpose Computation on GPUS: A Primer |chapter-url=https://developer.nvidia.com/gpugems/gpugems2/part-iv-general-purpose-computation-gpus-primer}}</ref>

=== Linear algebra ===
Using GPU for numerical linear algebra began at least in 2001.<ref>{{Cite book |last1=Larsen |first1=E. Scott |last2=McAllister |first2=David |chapter=Fast matrix multiplies using graphics hardware |date=2001-11-10 |title=Proceedings of the 2001 ACM/IEEE conference on Supercomputing |chapter-url=https://dl.acm.org/doi/10.1145/582034.582089 |language=en |publisher=ACM |pages=55 |doi=10.1145/582034.582089 |isbn=978-1-58113-293-9}}</ref> It had been used for Gauss-Seidel solver, conjugate gradients, etc.<ref>{{Cite book |last1=Krüger |first1=Jens |last2=Westermann |first2=Rüdiger |title=ACM SIGGRAPH 2005 Courses on - SIGGRAPH '05 |date=2005 |chapter=Linear algebra operators for GPU implementation of numerical algorithms |chapter-url=http://portal.acm.org/citation.cfm?doid=1198555.1198795 |language=en |publisher=ACM Press |pages=234 |doi=10.1145/1198555.1198795}}</ref>

==Stream processing==
{{Main|Stream processing}}
GPUs are designed specifically for graphics and thus are very restrictive in operations and programming. Due to their design, GPUs are only effective for problems that can be solved using [[stream processing]] and the hardware can only be used in certain ways.

The following discussion referring to vertices, fragments and textures concerns mainly the legacy model of GPGPU programming, where graphics APIs ([[OpenGL]] or [[DirectX]]) were used to perform general-purpose computation. With the introduction of the [[CUDA]] (Nvidia, 2007) and [[OpenCL]] (vendor-independent, 2008) general-purpose computing APIs, in new GPGPU codes it is no longer necessary to map the computation to graphics primitives. The stream processing nature of GPUs remains valid regardless of the APIs used. (See e.g.,<ref name=goddeke2010>{{cite web|url=http://d-nb.info/100545535X/34|title=D. Göddeke, 2010. Fast and Accurate Finite-Element Multigrid Solvers for PDE Simulations on GPU Clusters. Ph.D. dissertation, Technischen Universität Dortmund.|url-status=live|archive-url=https://web.archive.org/web/20141216020143/http://d-nb.info/100545535X/34|archive-date=16 December 2014|df=dmy-all}}</ref>)

GPUs can only process independent vertices and fragments, but can process many of them in parallel. This is especially effective when the programmer wants to process many vertices or fragments in the same way. In this sense, GPUs are stream processors{{snd}} processors that can operate in parallel by running one kernel on many records in a stream at once.

A ''stream'' is simply a set of records that require similar computation. Streams provide data parallelism.  ''[[Compute kernel|Kernels]]'' are the functions that are applied to each element in the stream. In the GPUs, ''vertices'' and ''fragments'' are the elements in streams and vertex and fragment shaders are the kernels to be run on them.{{dubious|reason=false see CUDA shared memory: Since GPUs process elements independently there is no way to have shared or static data.|date=February 2017}} For each element we can only read from the input, perform operations on it, and write to the output. It is permissible to have multiple inputs and multiple outputs, but never a piece of memory that is both readable and writable.{{Vague|date=March 2008}}<!-- unclear: it is possible to have temporary arrays. With G80 they can be dynamically indexed also even on the PS. -->

Arithmetic intensity is defined as the number of operations performed per word of memory transferred. It is important for GPGPU applications to have high arithmetic intensity else the memory access latency will limit computational speedup.<ref>{{cite journal |last1= Asanovic |first1= K. |author-link3= James Demmel |last2= Bodik |first2= R. |last3= Demmel |first3= J. |last4= Keaveny |first4= T. |last5= Keutzer |first5= K. |last6= Kubiatowicz |first6= J. |last7= Morgan |first7= N. |last8= Patterson |first8= D. |last9= Sen |first9= K. |last10= Wawrzynek |first10= J. |last11= Wessel |first11= D. |last12= Yelick |first12= K. |year= 2009 |title= A view of the parallel computing landscape |journal= Commun. ACM |volume= 52 |issue= 10| pages= 56–67 |doi=10.1145/1562764.1562783|doi-access= free }}</ref> <!-- Both NV and ATi suggested to use GPGPU even with high bandwidth requirements since they bus is far faster than "standard". -->

Ideal GPGPU applications have large data sets, high parallelism, and minimal dependency between data elements.

===GPU programming concepts===

====Computational resources====
There are a variety of computational resources available on the GPU:

* Programmable processors – vertex, primitive, fragment and mainly compute pipelines allow programmer to perform kernel on streams of data
* Rasterizer – creates fragments and interpolates per-vertex constants such as texture coordinates and color
* Texture unit – read-only memory interface
* Framebuffer – write-only memory interface

In fact, a program can substitute a write only texture for output instead of the framebuffer. This is done either through [[Framebuffer object#Uses|Render to Texture]] (RTT), Render-To-Backbuffer-Copy-To-Texture (RTBCTT), or the more recent<!-- framebuffer_objects: please! it's GL specific, and it's really a switchable RTT/backbuffer--> stream-out.<!--stream-out under DX10, transform-feedback for GL-->

====Textures as stream====
The most common form for a stream to take in GPGPU is a 2D grid because this fits naturally with the rendering model built into GPUs. Many computations naturally map into grids: matrix algebra, image processing, physically based simulation, and so on.
<!-- This is redundant, trivial and could be inferred from above text. Further, it sounds more like a gory implementation detail. If this isn't enough, it needs to be updated for stream-out. ...
A common way to perform operations on a grid is to draw a screen sized quad, which creates a fragment for each pixel. A fragment program is run on each fragment and the resulting pixel is stored into the frame buffer for display. If the algorithm involves multiple steps, Render-To-Texture (RTT) or Copy-To-Texture (CTT) can be used to store the result to a texture, which can then be read as input for the next step. -->

Since textures are used as memory, texture lookups are then used as memory reads.<!-- Better: it doesn't call in cause tcCoords, which can be generated procedurally. -->  Certain operations can be done automatically by the GPU because of this.  <!-- Consider removing this one. It can be trivially inferred from knowing what the interpolator does!...
For example, it is common to specify texture coordinates (i.e., input addresses) for the corners of a full screen quad and have the GPU calculate the appropriate input address for each fragment generated. This data is then provided to the programmer at no additional cost. -->

====Kernels====
[[Compute kernel]]s can be thought of as the body of [[loop (computing)|loop]]s. For example, a programmer operating on a grid on the CPU might have code that looks like this:

<syntaxhighlight lang="C">

// Input and output grids have 10000 x 10000 or 100 million elements.

void transform_10k_by_10k_grid(float in[10000][10000], float out[10000][10000])
{
    for (int x = 0; x < 10000; x++) {
        for (int y = 0; y < 10000; y++) {
            // The next line is executed 100 million times
            out[x][y] = do_some_hard_work(in[x][y]);
        }
    }
}

</syntaxhighlight>

On the GPU, the programmer only specifies the body of the loop as the kernel and what data to loop over by invoking<!-- see the GL specs. sounds better considering the context --> geometry processing.

====Flow control====
In sequential code it is possible to control the flow of the program using if-then-else statements and various forms of loops. Such flow control structures have only recently been added to GPUs.<ref name="book">{{cite web|url=https://developer.nvidia.com/gpugems/GPUGems2/gpugems2_chapter34.html|title=GPU Gems – Chapter 34, GPU Flow-Control Idioms}}</ref><!--not really, branching could be zeroed out even on NV20, which gives roughly the same result--> Conditional writes could be performed using a properly crafted series of arithmetic/bit operations, but looping and conditional branching were not possible.

Recent{{When|date=July 2024}} GPUs allow branching, but usually with a performance penalty. Branching should generally be avoided in inner loops, whether in CPU or GPU code, and various methods, such as static branch resolution, pre-computation, predication, loop splitting,<ref name="Tutorial on eliminating branches">[https://web.archive.org/web/20110603193749/http://www.futurechips.org/tips-for-power-coders/basic-technique-to-help-branch-prediction.html Future Chips]. "Tutorial on removing branches", 2011</ref> and Z-cull<ref name="survey">[http://graphics.idav.ucdavis.edu/publications/print_pub?pub_id=907 GPGPU survey paper] {{webarchive|url=https://web.archive.org/web/20070104090919/http://graphics.idav.ucdavis.edu/publications/print_pub?pub_id=907 |date=4 January 2007 }}: John D. Owens, David Luebke, Naga Govindaraju, Mark Harris, Jens Krüger, Aaron E. Lefohn, and Tim Purcell. "A Survey of General-Purpose Computation on Graphics Hardware". Computer Graphics Forum, volume 26, number 1, 2007, pp. 80–113.</ref> can be used to achieve branching when hardware support does not exist.

===GPU methods===

====Map====
{{Main|Map (parallel pattern)}}
The map operation simply applies the given function (the kernel) to every element in the stream. A simple example is multiplying each value in the stream by a constant (increasing the brightness of an image). The map operation is simple to implement on the GPU. The programmer generates a fragment for each pixel on screen and applies a fragment program to each one. The result stream of the same size is stored in the output buffer.

====Reduce====
{{Main|Fold (higher-order function)}}
Some computations require calculating a smaller stream (possibly a stream of only one element) from a larger stream. This is called a reduction of the stream. Generally, a reduction can be performed in multiple steps. The results from the prior step are used as the input for the current step and the range over which the operation is applied is reduced until only one stream element remains.

====Stream filtering====
Stream filtering is essentially a non-uniform reduction. Filtering involves removing items from the stream based on some criteria.

====Scan====
The scan operation, also termed ''[[prefix sum#Parallel algorithm|parallel prefix sum]]'', takes in a vector (stream) of data elements and an [[monoid|(arbitrary) associative binary function '+' with an identity element 'i']]. If the input is [a0, a1, a2, a3, ...], an ''exclusive scan'' produces the output [i, a0, a0 + a1, a0 + a1 + a2, ...], while an ''inclusive scan'' produces the output [a0, a0 + a1, a0 + a1 + a2, a0 + a1 + a2 + a3, ...] and [[semigroup|does not require an identity]] to exist. While at first glance the operation may seem inherently serial, efficient parallel scan algorithms are possible and have been implemented on graphics processing units. The scan operation has uses in e.g., quicksort and sparse matrix-vector multiplication.<ref name=goddeke2010 /><ref>{{cite web|url=http://www.idav.ucdavis.edu/func/return_pdf?pub_id=915|title=S. Sengupta, M. Harris, Y. Zhang, J. D. Owens, 2007. Scan primitives for GPU computing. In T. Aila and M. Segal (eds.): Graphics Hardware (2007).|url-status=dead|archive-url=https://web.archive.org/web/20150605081020/http://www.idav.ucdavis.edu/func/return_pdf?pub_id=915|archive-date=5 June 2015|df=dmy-all|access-date=16 December 2014}}</ref><ref>{{cite journal | last1 = Blelloch | first1 = G. E. | year = 1989 | title = Scans as primitive parallel operations | url = http://www.cs.berkeley.edu/~knight/cs267/papers/scan_primitive.pdf | journal = IEEE Transactions on Computers | volume = 38 | issue = 11 | pages = 1526–1538 | doi = 10.1109/12.42122 | url-status = dead | archive-url = https://web.archive.org/web/20150923211604/http://www.cs.berkeley.edu/~knight/cs267/papers/scan_primitive.pdf | archive-date = 23 September 2015 | df = dmy-all | access-date = 16 December 2014 }}</ref><ref>{{cite web|url=https://developer.nvidia.com/gpugems/gpugems3/part-vi-gpu-computing/chapter-39-parallel-prefix-sum-scan-cuda|title=M. Harris, S. Sengupta, J. D. Owens. Parallel Prefix Sum (Scan) with CUDA. In Nvidia: GPU Gems 3, Chapter 39.}}</ref>

====Scatter====
The [[scatter (vector addressing)|scatter]] operation is most naturally defined on the vertex processor. The vertex processor is able to adjust the position of the [[vertex (geometry)|vertex]], which allows the programmer to control where information is deposited on the grid. Other extensions are also possible, such as controlling how large an area the vertex affects.

The fragment processor cannot perform a direct scatter operation because the location of each fragment on the grid is fixed at the time of the fragment's creation and cannot be altered by the programmer. However, a logical scatter operation may sometimes be recast or implemented with another gather step. A scatter implementation would first emit both an output value and an output address. An immediately following gather operation uses address comparisons to see whether the output value maps to the current output slot.

In dedicated [[compute kernel]]s, scatter can be performed by indexed writes.

====Gather====
[[Gather (vector addressing)|Gather]] is the reverse of scatter. After scatter reorders elements according to a map, gather can restore the order of the elements according to the map scatter used. In dedicated compute kernels, gather may be performed by indexed reads. In other shaders, it is performed with texture-lookups.

====Sort====
The sort operation transforms an unordered set of elements into an ordered set of elements. The most common implementation on GPUs is using [[radix sort]] for integer and floating point data and coarse-grained [[merge sort]] and fine-grained [[sorting networks]] for general comparable data.<ref name="merrill-thesis">[https://sites.google.com/site/duanemerrill/dissertation.pdf Merrill, Duane.  Allocation-oriented Algorithm Design with Application to GPU Computing].  Ph.D. dissertation, Department of Computer Science, University of Virginia.  Dec. 2011.</ref><ref name="modern-gnu">[https://nvlabs.github.io/moderngpu/mergesort.html Sean Baxter. Modern gpu] {{webarchive|url=https://web.archive.org/web/20161007190316/https://nvlabs.github.io/moderngpu/mergesort.html |date=7 October 2016 }}, 2013.</ref>

====Search====
The search operation allows the programmer to find a given element within the stream, or possibly find neighbors of a specified element. Mostly the search method used is [[binary search]] on sorted elements.

====Data structures====
A variety of data structures can be represented on the GPU:

* Dense [[Array data structure|arrays]]
* [[Sparse matrix|Sparse matrices]] ([[sparse array]]) {{snd}} static or dynamic
* Adaptive structures ([[union type]])

==Applications==
The following are some of the areas where GPUs have been used for general purpose computing:

* [[Automatic parallelization]]<ref>Leung, Alan, Ondřej Lhoták, and Ghulam Lashari. "[https://cormack.uwaterloo.ca/~olhotak/pubs/pppj09.pdf Automatic parallelization for graphics processing units]." Proceedings of the 7th International Conference on Principles and Practice of Programming in Java. ACM, 2009.</ref><ref>Henriksen, Troels, Martin Elsman, and Cosmin E. Oancea. "[https://futhark-lang.org/publications/fhpc14.pdf Size slicing: a hybrid approach to size inference in futhark]." Proceedings of the 3rd ACM SIGPLAN workshop on Functional high-performance computing. ACM, 2014.</ref><ref>{{Cite book |chapter-url=https://www.researchgate.net/publication/221235428 |doi=10.1145/1375527.1375562|chapter=A compiler framework for optimization of affine loop nests for gpgpus |title=Proceedings of the 22nd annual international conference on Supercomputing - ICS '08 |year=2008 |last1=Baskaran |first1=Muthu Manikandan |last2=Bondhugula |first2=Uday |last3=Krishnamoorthy |first3=Sriram |last4=Ramanujam |first4=J. |last5=Rountev |first5=Atanas |last6=Sadayappan |first6=P. |page=225 |isbn=9781605581583 |s2cid=6137960 }}</ref>
* [[Computational physics|Physical based simulation]] and [[physics engine]]s<ref name="Joselli">{{cite book | chapter-url=https://dl.acm.org/doi/10.1145/1401843.1401871 | doi=10.1145/1401843.1401871 | chapter=A new physics engine with automatic process distribution between CPU-GPU | title=Proceedings of the 2008 ACM SIGGRAPH symposium on Video games | date=2008 | last1=Joselli | first1=Mark | last2=Clua | first2=Esteban | last3=Montenegro | first3=Anselmo | last4=Conci | first4=Aura | last5=Pagliosa | first5=Paulo | pages=149–156 | isbn=978-1-60558-173-6 }}</ref> (usually based on [[Newtonian physics]] models)
** [[Conway's Game of Life]], [[cloth simulation]], fluid [[incompressible flow]] by solution of [[Euler equations (fluid dynamics)]]<ref>{{cite web|url=https://developer.nvidia.com/gpugems/gpugems3/part-v-physics-simulation/chapter-30-real-time-simulation-and-rendering-3d-fluids|title=K. Crane, I. Llamas, S. Tariq, 2008. Real-Time Simulation and Rendering of 3D Fluids. In Nvidia: GPU Gems 3, Chapter 30.}}</ref> or [[Navier–Stokes equations]]<ref>{{cite web|url=http://developer.nvidia.com/GPUGems/gpugems_ch38.html|title=M. Harris, 2004. Fast Fluid Dynamics Simulation on the GPU. In Nvidia: GPU Gems, Chapter 38.|work=NVIDIA Developer |url-status=live|archive-url=https://web.archive.org/web/20171007170306/https://developer.nvidia.com/GPUGems/gpugems_ch38.html|archive-date=7 October 2017|df=dmy-all}}</ref>
* [[Statistical physics]]
** [[Ising model]]<ref>{{cite journal | arxiv=1007.3726 | doi=10.1016/j.cpc.2010.05.005 | title=Multi-GPU accelerated multi-spin Monte Carlo simulations of the 2D Ising model | year=2010 | last1=Block | first1=Benjamin | last2=Virnau | first2=Peter | last3=Preis | first3=Tobias | journal=Computer Physics Communications | volume=181 | issue=9 | pages=1549–1556 | bibcode=2010CoPhC.181.1549B | s2cid=14828005 }}</ref>
* [[Lattice gauge theory]]<ref>{{cite web|url=https://indico.fnal.gov/event/22303/contributions/245806/attachments/157699/206544/SnowmassTalk.pdf|title=New Computational Trends in Lattice Gauge Theory|last=Boyle|first=Peter|publisher=Lawrence Berkeley National Laboratory|access-date=16 February 2025}}</ref>
* [[Segmentation (image processing)|Segmentation]]{{snd}} 2D and 3D<ref>{{cite journal | pmc=3657761 | year=2011 | last1=Sun | first1=S. | last2=Bauer | first2=C. | last3=Beichel | first3=R. | title=Automated 3-D Segmentation of Lungs with Lung Cancer in CT Data Using a Novel Robust Active Shape Model Approach | journal=IEEE Transactions on Medical Imaging | volume=31 | issue=2 | pages=449–460 | doi=10.1109/TMI.2011.2171357 | pmid=21997248 }}</ref>
* [[Level set methods]]
* [[Computed tomography|CT]] reconstruction<ref>Jimenez, Edward S., and Laurel J. Orr. "[https://www.osti.gov/servlets/purl/1106909 Rethinking the union of computed tomography reconstruction and GPGPU computing]." Penetrating Radiation Systems and Applications XIV. Vol. 8854. International Society for Optics and Photonics, 2013.</ref>
* [[Fast Fourier transform]]<ref>{{Cite journal |url=https://www.researchgate.net/publication/5462925 |doi=10.1109/TMI.2007.909834 |title=Accelerating the Nonequispaced Fast Fourier Transform on Commodity Graphics Hardware |year=2008 |last1=Sorensen |first1=T.S. |last2=Schaeffter |first2=T. |last3=Noe |first3=K.O. |last4=Hansen |first4=M.S. |journal=IEEE Transactions on Medical Imaging |volume=27 |issue=4 |pages=538–547 |pmid=18390350 |s2cid=206747049 }}</ref>
* GPU learning{{snd}} [[machine learning]] and [[data mining]] computations, e.g., with software BIDMach
* [[k-nearest neighbor algorithm]]<ref>{{cite arXiv | eprint=0804.1448 | last1=Garcia | first1=Vincent | last2=Debreuve | first2=Eric | last3=Barlaud | first3=Michel | title=Fast k Nearest Neighbor Search using GPU | year=2008 | class=cs.CV }}</ref>
* [[Fuzzy logic]]<ref>{{Cite book |chapter-url=https://www.researchgate.net/publication/224245725 |doi=10.1109/CISDA.2011.5945947 |chapter=Rapid prototyping of high performance fuzzy computing applications using high level GPU programming for maritime operations support |title=2011 IEEE Symposium on Computational Intelligence for Security and Defense Applications (CISDA) |year=2011 |last1=Cococcioni |first1=Marco |last2=Grasso |first2=Raffaele |last3=Rixen |first3=Michel |pages=17–23 |isbn=978-1-4244-9939-7 |s2cid=2089441 }}</ref>
* [[Tone mapping]]
* [[Audio signal processing]]<ref>{{Cite book |last=Whalen |first=Sean |title=Audio and the Graphics Processing Unit |date=March 10, 2005 |citeseerx=10.1.1.114.365}}</ref>
** Audio and sound effects processing, to use a [[GPU]] for [[digital signal processing]] (DSP)
** [[Analog signal processing]]
** [[Speech processing]]
* [[Digital image processing]]
* [[Video processing]]<ref>{{cite news
 |first=Ron 
 |last=Wilson 
 |title=DSP brings you a high-definition moon walk 
 |newspaper=EDN 
 |date=3 September 2009 
 |access-date=3 September 2009 
 |quote=Lowry is reportedly using Nvidia Tesla GPUs (graphics-processing units) programmed in the company's CUDA (Compute Unified Device Architecture) to implement the algorithms. Nvidia claims that the GPUs are approximately two orders of magnitude faster than CPU computations, reducing the processing time to less than one minute per frame. 
 |url=http://www.edn.com/article/CA6685974.html
|archive-url=https://archive.today/20130122054214/http://www.edn.com/article/CA6685974.html
|url-status=dead
|archive-date=22 January 2013
}}</ref>
** Hardware accelerated video decoding and post-processing
*** [[Motion compensation]] (mo comp)
*** Inverse [[discrete cosine transform]] (iDCT)
*** Variable-length decoding (VLD), [[Huffman coding]]
*** Inverse quantization (IQ, not to be confused with [[Intelligence Quotient]])
*** In-loop deblocking
*** Bitstream processing ([[CAVLC]]/[[CABAC]]) using special purpose hardware for this task because this is a serial task not suitable for regular GPGPU computation
*** [[Deinterlacing]]
**** Spatial-temporal deinterlacing
*** Noise reduction
*** Edge enhancement
*** Color correction
** Hardware accelerated video encoding and pre-processing
* [[Global illumination]]{{snd}} [[ray tracing (graphics)|ray tracing]], [[photon mapping]], [[Radiosity (computer graphics)|radiosity]] among others, [[subsurface scattering]]
* Geometric computing{{snd}} [[constructive solid geometry]], distance fields, [[collision detection]], transparency computation, shadow generation
* Scientific computing
** [[Monte Carlo simulation]] of light propagation<ref name=Alerstam2009_JBO>{{cite journal |last1= Alerstam |first1= E. |last2= Svensson |first2= T. |last3= Andersson-Engels |first3= S. |author3-link=Stefan Andersson-Engels|year= 2008 |title= Parallel computing with graphics processing units for high speed Monte Carlo simulation of photon migration |url= http://www.atomic.physics.lu.se/fileadmin/atomfysik/Biophotonics/Publications/Alerstam2008_JBOLetters.pdf |journal= Journal of Biomedical Optics |volume= 13 |issue= 6 |page= 060504 |doi= 10.1117/1.3041496 |pmid= 19123645 |bibcode= 2008JBO....13f0504A |url-status= live |archive-url= https://web.archive.org/web/20110809125745/http://www.atomic.physics.lu.se/fileadmin/atomfysik/Biophotonics/Publications/Alerstam2008_JBOLetters.pdf |archive-date= 9 August 2011 |df= dmy-all |doi-access= free }}</ref>
** [[Weather forecasting]]
** [[Climate research]]
** [[Molecular modeling on GPU]]<ref name="Hasan Khondker S. 2014 pp. 612–17">{{Cite book | chapter-url=https://link.springer.com/content/pdf/10.1007/978-3-662-44917-2_65.pdf | doi=10.1007/978-3-662-44917-2_65| chapter=Performance Prediction Model and Analysis for Compute-Intensive Tasks on GPUs| title=Advanced Information Systems Engineering| volume=7908| pages=612–617| series=Lecture Notes in Computer Science| year=2014| last1=Hasan| first1=Khondker S.| last2=Chatterjee| first2=Amlan| last3=Radhakrishnan| first3=Sridhar| last4=Antonio| first4=John K.| isbn=978-3-642-38708-1| url=https://hal.inria.fr/hal-01403164/file/978-3-662-44917-2_65_Chapter.pdf}}</ref>
** [[Quantum mechanical]] physics
** [[Astrophysics]]<ref>{{cite web|url=http://www.astro.lu.se/compugpu2010/|title=Computational Physics with GPUs: Lund Observatory|website=www.astro.lu.se|url-status=live|archive-url=https://web.archive.org/web/20100712062316/http://www.astro.lu.se/compugpu2010/|archive-date=12 July 2010|df=dmy-all}}</ref>
* [[Number theory]]
** [[Primality test]]ing and [[integer factorization]]<ref>{{cite web|url=https://mersenne.org/various/works.php|title=How GIMPS Works|work=Great Internet Mersenne Prime Search|access-date=6 March 2025}}</ref>
* [[Bioinformatics]]<ref>{{cite journal|doi=10.1186/1471-2105-8-474|pmid=18070356|pmc=2222658|title=High-throughput sequence alignment using Graphics Processing Units|journal=BMC Bioinformatics|volume=8|pages=474|year=2007|last1=Schatz|first1=Michael C|last2=Trapnell|first2=Cole|last3=Delcher|first3=Arthur L|last4=Varshney|first4=Amitabh |doi-access=free }}</ref><ref name=Manavski2008>{{cite journal |author=Svetlin A. Manavski |author2=Giorgio Valle |title=CUDA compatible GPU cards as efficient hardware accelerators for Smith-Waterman sequence alignment |journal=BMC Bioinformatics |volume=9 |issue=Suppl. 2 |page=S10 |date=2008 |doi=10.1186/1471-2105-9-s2-s10 |pmid=18387198 |pmc=2323659 |df=dmy-all |doi-access=free }}</ref>
* [[Medical imaging]]
* [[Clinical decision support system]] (CDSS)<ref>{{cite journal|last1=Olejnik|first1=M|last2=Steuwer|first2=M|last3=Gorlatch|first3=S|last4=Heider|first4=D|title=gCUP: rapid GPU-based HIV-1 co-receptor usage prediction for next-generation sequencing.|journal=Bioinformatics|date=15 November 2014|volume=30|issue=22|pages=3272–3|pmid=25123901|doi=10.1093/bioinformatics/btu535|doi-access=free}}</ref>
* [[Computer vision]]<ref>Wang, Guohui, et al. "[https://scholarship.rice.edu/bitstream/handle/1911/75009/2013_ICASSP_Wang_0002629.pdf?sequence=1&isAllowed=y Accelerating computer vision algorithms using OpenCL framework on the mobile GPU-a case study]." 2013 IEEE International Conference on Acoustics, Speech and Signal Processing. IEEE, 2013.</ref>
* [[Digital signal processing]] / [[signal processing]]
* [[Control engineering]]{{citation needed|date=May 2019}}
* [[Operations research]]<ref>{{cite book | chapter-url=https://ieeexplore.ieee.org/document/6651078 | doi=10.1109/IPDPSW.2013.45 | chapter=Recent Advances on GPU Computing in Operations Research | title=2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and PhD Forum | year=2013 | last1=Boyer | first1=Vincent | last2=El Baz | first2=Didier | pages=1778–1787 | isbn=978-0-7695-4979-8 | s2cid=2774188 | url=https://hal.archives-ouvertes.fr/hal-01151607/file/4979b778.pdf }}</ref><ref>{{cite journal |last1= Bukata |first1= Libor |last2= Sucha |first2= Premysl |last3= Hanzalek |first3= Zdenek |year= 2014 |title= Solving the Resource Constrained Project Scheduling Problem using the parallel Tabu Search designed for the CUDA platform |doi= 10.1016/j.jpdc.2014.11.005 |journal= Journal of Parallel and Distributed Computing |volume= 77|pages= 58–68 | arxiv= 1711.04556|s2cid= 206391585 }}</ref><ref name=BaumeltZdenek>{{cite journal
 |last1= Bäumelt |first1= Zdeněk
 |last2= Dvořák |first2= Jan
 |last3= Šůcha |first3= Přemysl
 |last4= Hanzálek |first4= Zdeněk
 |title= A Novel Approach for Nurse Rerostering based on a Parallel Algorithm
 |journal= [[European Journal of Operational Research]]
 |date= 2016
 |doi=10.1016/j.ejor.2015.11.022 |volume=251 |issue= 2
 |pages=624–639}}
</ref>
** Implementations of: the GPU Tabu Search algorithm solving the Resource Constrained Project Scheduling problem is freely available on GitHub;<ref>[https://github.com/CTU-IIG CTU-IIG] {{webarchive|url=https://web.archive.org/web/20160109193106/https://github.com/CTU-IIG |date=9 January 2016 }} Czech Technical University in Prague, Industrial Informatics Group (2015).</ref> the GPU algorithm solving the [[Nurse scheduling problem]] is freely available on GitHub.<ref>[https://github.com/CTU-IIG/NRRPGpu NRRPGpu] {{webarchive|url=https://web.archive.org/web/20160109193106/https://github.com/CTU-IIG/NRRPGpu |date=9 January 2016 }} Czech Technical University in Prague, Industrial Informatics Group (2015).</ref>
* [[Neural network]]s
* [[Database]] operations<ref>{{cite web |url=http://www.cs.cmu.edu/afs/cs.cmu.edu/Web/People/ngm/15-823/project/Final.pdf |title=GPU-based Sorting in PostgreSQL |author=Naju Mancheril |work=School of Computer Science – Carnegie Mellon University |url-status=live |archive-url=https://www.webcitation.org/60dQHCPfS?url=http://www.cs.cmu.edu/afs/cs.cmu.edu/Web/People/ngm/15-823/project/Final.pdf |archive-date=2 August 2011 |df=dmy-all }}</ref>
* [[Computational Fluid Dynamics]] especially using [[Lattice Boltzmann methods]]
* [[Cryptography]]<ref>Manavski, Svetlin A. "[https://koala.cs.pub.ro/redmine/attachments/download/1745/cuda_aes.pdf CUDA compatible GPU as an efficient hardware accelerator for AES cryptography] {{Webarchive|url=https://web.archive.org/web/20190507205236/https://koala.cs.pub.ro/redmine/attachments/download/1745/cuda_aes.pdf |date=7 May 2019 }}." 2007 IEEE International Conference on Signal Processing and Communications. IEEE, 2007.</ref> and [[cryptanalysis]]
* Performance modeling: computationally intensive tasks on GPU<ref name="Hasan Khondker S. 2014 pp. 612–17"/>
** Implementations of: [[MD6]], [[Advanced Encryption Standard]] (AES),<ref>{{Cite book|doi=10.1007/978-3-540-74735-2_15|chapter=AES Encryption Implementation and Analysis on Commodity Graphics Processing Units|title=Cryptographic Hardware and Embedded Systems - CHES 2007|volume=4727|pages=209|series=Lecture Notes in Computer Science|year=2007|last1=Harrison|first1=Owen|last2=Waldron|first2=John|isbn=978-3-540-74734-5|df=dmy-all|citeseerx=10.1.1.149.7643}}</ref><ref>[http://www.usenix.org/events/sec08/tech/harrison.html AES and modes of operations on SM4.0 compliant GPUs.] {{webarchive|url=https://web.archive.org/web/20100821131630/http://www.usenix.org/events/sec08/tech/harrison.html |date=21 August 2010 }} Owen Harrison, John Waldron, Practical Symmetric Key Cryptography on Modern Graphics Hardware. In proceedings of USENIX Security 2008.</ref> [[Data Encryption Standard]] (DES), [[RSA (algorithm)|RSA]],<ref>{{Cite book|doi=10.1007/978-3-642-02384-2_22|chapter=Efficient Acceleration of Asymmetric Cryptography on Graphics Hardware|title=Progress in Cryptology – AFRICACRYPT 2009|volume=5580|pages=350|series=Lecture Notes in Computer Science|year=2009|last1=Harrison|first1=Owen|last2=Waldron|first2=John|isbn=978-3-642-02383-5|df=dmy-all|citeseerx=10.1.1.155.5448}}</ref> [[elliptic curve cryptography]] (ECC)
** [[Password cracking]]<ref name="gtri">{{cite web|url=http://www.gtri.gatech.edu/casestudy/Teraflop-Troubles-Power-Graphics-Processing-Units-GPUs-Password-Security-System|title=Teraflop Troubles: The Power of Graphics Processing Units May Threaten the World's Password Security System|publisher=[[Georgia Tech Research Institute]]|access-date=7 November 2010|url-status=dead|archive-url=https://web.archive.org/web/20101230063449/http://www.gtri.gatech.edu/casestudy/Teraflop-Troubles-Power-Graphics-Processing-Units-GPUs-Password-Security-System|archive-date=30 December 2010|df=dmy-all}}</ref><ref name="msnbc">{{cite news|url=http://www.nbcnews.com/id/38771772|archive-url=https://web.archive.org/web/20130711022009/http://www.nbcnews.com/id/38771772/|url-status=dead|archive-date=11 July 2013|title=Want to deter hackers? Make your password longer|work=[[NBC News]]|date=19 August 2010|access-date=7 November 2010|df=dmy-all}}</ref>
** [[Cryptocurrency]] transactions processing ("mining") ([[Bitcoin network#Mining|Bitcoin mining]])
* [[Electronic design automation]]<ref>{{Cite news
|url=https://www.eetimes.com/viewpoint-mass-gpus-not-cpus-for-eda-simulations/
|title=Viewpoint: Mass GPUs, not CPUs for EDA simulations
|first=Larry
|last=Lerner
|date=9 April 2009
|access-date=14 September 2023
|newspaper=EE Times
}}</ref><ref>
{{cite web
 |url= http://www.keysight.com/en/pd-1582838-pn-W2500EP/ads-transient-convolution-gt
 |title= W2500 ADS Transient Convolution GT
 |quote= accelerates signal integrity simulations on workstations that have Nvidia Compute Unified Device Architecture (CUDA)-based Graphics Processing Units (GPU)}}</ref>
* [[Antivirus software]]<ref>[http://www.ics.forth.gr/dcs/Activities/papers/gravity-raid10.pdf GrAVity: A Massively Parallel Antivirus Engine] {{webarchive|url=https://web.archive.org/web/20100727201743/http://www.ics.forth.gr/dcs/Activities/papers/gravity-raid10.pdf |date=27 July 2010 }}. Giorgos Vasiliadis and Sotiris Ioannidis, GrAVity: A Massively Parallel Antivirus Engine. In proceedings of RAID 2010.</ref><ref>{{cite news
 |work        = Kaspersky Lab
 |title       = Kaspersky Lab utilizes Nvidia technologies to enhance protection
 |date        = 14 December 2009
 |quote       = During internal testing, the Tesla S1070 demonstrated a 360-fold increase in the speed of the similarity-defining algorithm when compared to the popular Intel Core 2 Duo central processor running at a clock speed of 2.6 GHz.
 |url         = http://www.kaspersky.com/news?id=207575979
 |url-status     = live
 |archive-url  = https://web.archive.org/web/20100619154146/http://www.kaspersky.com/news?id=207575979
 |archive-date = 19 June 2010
 |df          = dmy-all
}}</ref>
* [[Intrusion detection]]<ref>[http://www.ics.forth.gr/dcs/Activities/papers/gnort.raid08.pdf Gnort: High Performance Network Intrusion Detection Using Graphics Processors] {{webarchive|url=https://web.archive.org/web/20110409103931/http://www.ics.forth.gr/dcs/Activities/papers/gnort.raid08.pdf |date=9 April 2011 }}. Giorgos Vasiliadis et al., Gnort: High Performance Network Intrusion Detection Using Graphics Processors. In proceedings of RAID 2008.</ref><ref>[http://www.ics.forth.gr/dcs/Activities/papers/gnort-regexp.raid09.pdf Regular Expression Matching on Graphics Hardware for Intrusion Detection] {{webarchive|url=https://web.archive.org/web/20100727201749/http://www.ics.forth.gr/dcs/Activities/papers/gnort-regexp.raid09.pdf |date=27 July 2010 }}. Giorgos Vasiliadis et al., Regular Expression Matching on Graphics Hardware for Intrusion Detection. In proceedings of RAID 2009.</ref>
* Increase computing power for [[distributed computing]] projects like [[SETI@home]], [[Einstein@home]]

===Bioinformatics===
GPGPU usage in Bioinformatics:<ref name="Hasan Khondker S. 2014 pp. 612–17"/><ref name="nvidia.com">{{Cite web |title=GPU-Accelerated Applications |url=http://www.nvidia.com/docs/IO/123576/nv-applications-catalog-lowres.pdf |url-status=live |archive-url=https://web.archive.org/web/20130325031816/http://www.nvidia.com/docs/IO/123576/nv-applications-catalog-lowres.pdf |archive-date=25 March 2013 |access-date=2013-09-12 |df=dmy-all}}</ref>
{| class="wikitable"
! Application
! Description
! Supported features
! Expected speed-up†
! GPU‡
! Multi-GPU support
! Release status
|-
| BarraCUDA||DNA, including epigenetics, sequence mapping software<ref name="Langdon:2015:GECCO">{{Cite book|doi=10.1145/2739480.2754652|pages=1063–1070|chapter=Improving CUDA DNA Analysis Software with Genetic Programming|title=Proceedings of the 2015 on Genetic and Evolutionary Computation Conference - GECCO '15|year=2015|last1=Langdon|first1=William B|last2=Lam|first2=Brian Yee Hong|last3=Petke|first3=Justyna|last4=Harman|first4=Mark|isbn=9781450334723|s2cid=8992769}}</ref>||Alignment of short sequencing reads||6–10x||T 2075, 2090, K10, K20, K20X||{{Yes}}||Available now, version 0.7.107f
|-
| CUDASW++||Open source software for Smith-Waterman protein database searches on GPUs||Parallel search of Smith-Waterman database||10–50x||T 2075, 2090, K10, K20, K20X||{{Yes}}||Available now, version 2.0.8
|-
| CUSHAW||Parallelized short read aligner||Parallel, accurate long read aligner{{snd}} gapped alignments to large genomes||10x||T 2075, 2090, K10, K20, K20X||{{Yes}}||Available now, version 1.0.40
|-
| GPU-BLAST||Local search with fast ''k''-tuple heuristic||Protein alignment according to blastp, multi CPU threads||3–4x||T 2075, 2090, K10, K20, K20X||{{No|Single only}}||Available now, version 2.2.26
|-
| GPU-HMMER||Parallelized local and global search with profile hidden Markov models||Parallel local and global search of hidden Markov models||60–100x||T 2075, 2090, K10, K20, K20X|| {{Yes}} ||Available now, version 2.3.2
|-
| mCUDA-MEME||Ultrafast scalable motif discovery algorithm based on MEME ||Scalable motif discovery algorithm based on MEME||4–10x||T 2075, 2090, K10, K20, K20X||{{Yes}}||Available now, version 3.0.12
|-
| SeqNFind||A GPU accelerated sequence analysis toolset||Reference assembly, blast, Smith–Waterman, hmm, de novo assembly||400x||T 2075, 2090, K10, K20, K20X||{{Yes}}||Available now
|-
| UGENE||Opensource Smith–Waterman for SSE/CUDA, suffix array based repeats finder and dotplot||Fast short read alignment||6–8x||T 2075, 2090, K10, K20, K20X||{{Yes}}||Available now, version 1.11
|-
| WideLM||Fits numerous linear models to a fixed design and response||Parallel linear regression on multiple similarly-shaped models||150x||T 2075, 2090, K10, K20, K20X|| {{Yes}} ||Available now, version 0.1-1
|}

====Molecular dynamics====
{{further|Molecular modeling on GPUs|Comparison of software for molecular mechanics modeling}}
{| class="wikitable"
! Application
! Description
! Supported features
! Expected speed-up†
! GPU‡
! Multi-GPU support
! Release status
|-
| [[Abalone (molecular mechanics)|Abalone]]||Models molecular dynamics of biopolymers for simulations of proteins, DNA and ligands||Explicit and implicit solvent, [[hybrid Monte Carlo]]||4–120x||T 2075, 2090, K10, K20, K20X||{{No|Single only}}||Available now, version 1.8.88
|-
| ACEMD||GPU simulation of molecular mechanics force fields, implicit and explicit solvent ||Written for use on GPUs||160 ns/day GPU version only||T 2075, 2090, K10, K20, K20X||{{Yes}}||Available now
|-
| AMBER||Suite of programs to simulate molecular dynamics on biomolecule||PMEMD: explicit and implicit solvent|| 89.44 ns/day JAC NVE ||T 2075, 2090, K10, K20, K20X||{{Yes}}||Available now, version 12 + bugfix9
|-
| DL-POLY||Simulate macromolecules, polymers, ionic systems, etc. on a distributed memory parallel computer||Two-body forces, link-cell pairs, Ewald SPME forces, Shake VV||4x||T 2075, 2090, K10, K20, K20X||{{Yes}}||Available now, version 4.0 source only
|-
| [[CHARMM]]||MD package to simulate molecular dynamics on biomolecule.||Implicit (5x), explicit (2x) solvent via OpenMM||TBD||T 2075, 2090, K10, K20, K20X ||{{Yes}}||In development Q4/12
|-
| [[GROMACS]]||Simulate biochemical molecules with complex bond interactions||Implicit (5x), explicit (2x) solvent||165 ns/Day DHFR ||T 2075, 2090, K10, K20, K20X||{{No|Single only}} ||Available now, version 4.6 in Q4/12
|-
| HOOMD-Blue||Particle dynamics package written grounds up for GPUs||Written for GPUs ||2x ||T 2075, 2090, K10, K20, K20X||{{Yes}}||Available now
|-
| [[LAMMPS]]||Classical molecular dynamics package ||Lennard-Jones, Morse, Buckingham, CHARMM, tabulated, course grain SDK, anisotropic Gay-Bern, RE-squared, "hybrid" combinations||3–18x||T 2075, 2090, K10, K20, K20X||{{Yes}}||Available now
|-
| [[NAMD]]||Designed for high-performance simulation of large molecular systems||100M atom capable||6.44 ns/days STMV 585x 2050s||T 2075, 2090, K10, K20, K20X||{{Yes}}||Available now, version 2.9
|-
| OpenMM||Library and application for molecular dynamics for HPC with GPUs||Implicit and explicit solvent, custom forces||Implicit: 127–213 ns/day; Explicit: 18–55 ns/day DHFR||T 2075, 2090, K10, K20, K20X||{{Yes}}||Available now, version 4.1.1
|}

† Expected speedups are highly dependent on system configuration. GPU performance compared against multi-core [[x86]] CPU socket. GPU performance benchmarked on GPU supported features and may be a [[Kernel (image processing)|kernel]] to kernel performance comparison. For details on configuration used, view application website. Speedups as per Nvidia in-house testing or ISV's documentation.

‡ Q=[[Quadro GPU]], T=[[Nvidia Tesla|Tesla GPU]]. Nvidia recommended GPUs for this application. Check with developer or ISV to obtain certification information.

==See also==
* [[AI accelerator]]
* [[Audio processing unit]]
* [[Close to Metal]]
* [[Deep learning processor]] (DLP)
* [[Fastra II]]
* [[Larrabee (microarchitecture)]]
* Physics engine
** [[Advanced Simulation Library]]
** [[Physics processing unit]] (PPU)

==References==
{{Reflist}}

== Further reading ==
* {{Cite journal |last1=Owens |first1=J.D. |last2=Houston |first2=M. |last3=Luebke |first3=D. |last4=Green |first4=S. |last5=Stone |first5=J.E. |last6=Phillips |first6=J.C. |date=May 2008 |title=GPU Computing |url=https://ieeexplore.ieee.org/document/4490127 |journal=Proceedings of the IEEE |volume=96 |issue=5 |pages=879–899 |doi=10.1109/JPROC.2008.917757 |s2cid=17091128 |issn=0018-9219|url-access=subscription }}
* {{Cite journal |last1=Brodtkorb |first1=André R. |last2=Hagen |first2=Trond R. |last3=Sætra |first3=Martin L. |date=2013-01-01 |title=Graphics processing unit (GPU) programming strategies and trends in GPU computing |url=https://www.sciencedirect.com/science/article/pii/S0743731512000998 |journal=Journal of Parallel and Distributed Computing |series=Metaheuristics on GPUs |volume=73 |issue=1 |pages=4–13 |doi=10.1016/j.jpdc.2012.04.003 |issn=0743-7315|hdl=10852/40283 |hdl-access=free }}


{{Graphics Processing Unit}}
{{CPU technologies}}
{{Parallel computing}}
{{emerging technologies|topics=yes|infocom=yes}}

{{DEFAULTSORT:Gpgpu}}
[[Category:GPGPU| ]]
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