View source for GDDR5 SDRAM

{{short description|Type of high performance DRAM graphics card memory}}
{{about|DDR graphics RAM (SGRAM)|non-graphics (dynamic) DDR memory|DDR5 SDRAM}}
{{Infobox memory
| abbr       = GDDR5 SDRAM
| name       = Graphics Double Data Rate 5 Synchronous Dynamic Random-Access Memory
| image      = GDDR5 980Ti.jpg
| caption    = GDDR5 chips on a [[Nvidia GeForce GTX 980 Ti]]
| developer  = [[JEDEC]]
| type       = [[Synchronous dynamic random-access memory]]
| generation = 5th generation
| release    = 
| standards  =
| clock_rate = 
| cycle_time = 
| prefetch   = 
| bus_clock_rate =
| transfer_rate  = 
| bandwidth = 
| voltage   = 
| predecessor = [[GDDR4 SDRAM]]
| successor = [[GDDR6 SDRAM]]
}}
'''Graphics Double Data Rate 5 Synchronous Dynamic Random-Access Memory''' ('''GDDR5 SDRAM''') is a type of [[Synchronous dynamic random-access memory#Synchronous graphics RAM .28SGRAM.29|synchronous graphics random-access memory]] (SGRAM) with a high [[Bandwidth (computing)|bandwidth]] ("[[double data rate]]") interface designed for use in [[Video card|graphics cards]], [[Video game console|game consoles]], and [[high-performance computing]].<ref>[https://www.micron.com/~/media/documents/products/technical-note/dram/tned01_gddr5_sgram_introduction.pdf Micron TN-ED-01: GDDR5 SGRAM Introduction.] {{Webarchive|url=https://web.archive.org/web/20150918173406/http://www.micron.com/~/media/documents/products/technical-note/dram/tned01_gddr5_sgram_introduction.pdf |date=2015-09-18 }} Accessed April 11, 2014</ref> It is a type of [[GDDR SDRAM]] (graphics [[DDR SDRAM]]).

== Overview ==
Like its predecessor, [[GDDR4]], GDDR5 is based on [[DDR3 SDRAM]] memory, which has double the data lines compared to [[DDR2 SDRAM]]. GDDR5 also uses 8-bit wide [[prefetch buffer]]s similar to [[GDDR4]] and [[DDR3 SDRAM]].
  
<!--Note to "hyphen patrollers": the industry norm is to use 8N-prefetch as a hyphenated term (similar to "double-prefetch" adj-noun construction) for clarity; please leave 'stet'. --DennisDallas 03May2011-->
GDDR5 [[Dynamic random-access memory#Synchronous graphics RAM|SGRAM]] conforms to the standards which were set out in the GDDR5 specification by the [[JEDEC]]. SGRAM is single-ported. However, it can open two memory pages at once, which simulates the dual-port nature of other VRAM technologies. It uses an 8N-[[Prefetch buffer|prefetch]] architecture and [[Double data rate|DDR]] interface to achieve high performance operation and can be configured to operate in ×32 mode or ×16 (clamshell) mode which is detected during device initialization. The GDDR5 interface transfers two [[32-bit]] wide [[Word (data type)|data words]] per write clock (WCK) cycle to/from the I/O pins. Corresponding to the 8N-prefetch, a single write or read access consists of a 256-bit wide two CK clock cycle data transfer at the internal memory core and eight corresponding 32-bit wide one-half WCK clock cycle data transfers at the I/O pins.

GDDR5 operates with two different clock types. A differential command clock (CK) as a reference for address and command inputs, and a forwarded differential write clock (WCK) as a reference for data reads and writes, that runs at twice the CK frequency. Being more precise, the GDDR5 SGRAM uses a total of three clocks: two write clocks associated with two bytes (WCK01 and WCK23) and a single command clock (CK). Taking a GDDR5 with 5&nbsp;[[gigabit|Gbit]]/s data rate per pin as an example, the CK runs with 1.25&nbsp;GHz and both WCK clocks at 2.5&nbsp;GHz. The CK and WCKs are phase aligned during the initialization and training sequence. This alignment allows read and write access with minimum latency.

A single 32-bit GDDR5 chip has about 67 signal pins and the rest are power and grounds in the 170 [[Ball grid array|BGA]] package.

==Commercialization of GDDR5==
GDDR5 was revealed by [[Samsung Electronics]] in July 2007. They announced that they would mass-produce GDDR5 starting in January 2008.<ref>{{cite news |last1=Pancescu |first1=Alexandru |title=Samsung Pushes The GDDR5 Standard Forward |url=https://news.softpedia.com/news/Samsung-Pushes-The-GDDR5-Standard-Forward-60237.shtml |access-date=18 September 2019 |work=[[Softpedia]] |date=July 18, 2007}}</ref>

[[Hynix Semiconductor]] introduced the industry's first 60&nbsp;nm class "1&nbsp;Gb" (1024<sup>3</sup> bit) GDDR5 memory in 2007.<ref name="hynix2000s">{{cite web |title=History: 2000s |url=https://www.skhynix.com/eng/about/history2000.jsp |website=[[SK Hynix]] |access-date=8 July 2019 |archive-date=6 August 2020 |archive-url=https://web.archive.org/web/20200806163108/https://www.skhynix.com/eng/about/history2000.jsp |url-status=dead }}</ref> It supported a bandwidth of 20&nbsp;GB/s on a 32-bit bus, which enables memory configurations of 1 [[Gigabyte|GB]] at 160&nbsp;GB/s with only 8 circuits on a 256-bit bus. The following year, in 2008, Hynix bested this technology with its 50&nbsp;nm class "1&nbsp;Gb" GDDR5 memory.

<!-- Qimonda has since gone thru bankruptcy and re-org. [See: http://www.qimonda-licensing.com/NewsArchive/Press_Release_1April_en_2009.pdf] This section's White Paper reference may be available elsewhere online. --DennisDallas 03May2011 -->
In November 2007, [[Qimonda]], a spin-off of [[Infineon]], demonstrated and sampled GDDR5,<ref>[http://www.reghardware.co.uk/2007/11/01/qimonda_samples_gddr5 Register report] {{Webarchive|url=https://web.archive.org/web/20080706004800/http://www.reghardware.co.uk/2007/11/01/qimonda_samples_gddr5 |date=2008-07-06 }}. Retrieved November 2, 2007.</ref> and released a paper about the technologies behind GDDR5.<ref>[http://www.hwstation.net/img/news/allegati/Qimonda_GDDR5_whitepaper.pdf Qimonda GDDR5] {{Webarchive|url=https://web.archive.org/web/20160826085818/http://www.hwstation.net/img/news/allegati/Qimonda_GDDR5_whitepaper.pdf |date=2016-08-26 }} White Paper</ref> As of May 10, 2008, Qimonda announced volume production of 512&nbsp;[[Megabit|Mb]] GDDR5 components rated at 3.6&nbsp;[[Gbit/s]] (900&nbsp;[[MHz]]), 4.0&nbsp;Gbit/s (1&nbsp;GHz), and 4.5&nbsp;Gbit/s (1.125&nbsp;GHz).<ref>[http://www.xbitlabs.com/news/video/display/20080510113121_GDDR5_in_Production_New_Round_of_Graphics_Cards_War_Imminent.html GDDR5 in Production, New Round of Graphics Cards War Imminent.], retrieved May 11, 2008</ref>

On November 20, 2009, [[Elpida Memory]] announced the opening of the company's Munich Design Center, responsible for Graphics DRAM ([[GDDR]]) design and engineering. Elpida received [[GDDR]] design assets from [[Qimonda|Qimonda AG]] in August 2009 after Qimonda's bankruptcy. The design center has approximately 50 employees and is equipped with high-speed memory testing equipment for use in the design, development and evaluation of Graphics memory.<ref>{{Cite web|title = Elpida officially opens Munich Design Center|url = http://www.fabtech.org/news/_a/elpida_officially_opens_munich_design_center/|website = www.fabtech.org|access-date = 2015-09-09|first = Milan|last = Topalov|archive-date = 2016-01-17|archive-url = https://web.archive.org/web/20160117041355/http://www.fabtech.org/news/_a/elpida_officially_opens_munich_design_center/|url-status = dead}}</ref><ref>{{Cite web|title = Elpida Opens High Speed DRAM Test Laboratory at Munich Design Center {{!}} Business Wire|url = http://www.businesswire.com/news/home/20091119006409/en/Elpida-Opens-High-Speed-DRAM-Test-Laboratory#.VfCxfpeb8ec|website = www.businesswire.com|access-date = 2015-09-09}}</ref> On July 31, 2013, [[Elpida Memory|Elpida]] became a fully owned subsidiary of [[Micron Technology]] and based on current public [[LinkedIn]] professional profiles, Micron continues to operate the Graphics Design Center in Munich.<ref>{{Cite web|title = Micron (MU) Completes Elpida Memory, Rexchip Purchases|url = http://www.streetinsider.com/Corporate+News/Micron+%2528MU%2529+Completes+Elpida+Memory,+Rexchip+Purchases/8549956.html|access-date = 2015-09-09}}</ref><ref>{{Cite web|url = http://www.linkedin.com/pub/markus-balb/ab/289/311/en|title = Markus Balb {{!}} LinkedIn}}</ref>

Hynix 40&nbsp;nm class "2&nbsp;Gb" (2 × 1024<sup>3</sup> bit) GDDR5 was released in 2010. It operates at 7&nbsp;GHz effective clock-speed and processes up to 28&nbsp;GB/s.<ref>[https://www.skhynix.com/inc/pdfDownload.jsp?path=/download/products/1H11_Product_Catalog.pdf Hynix 1H '11 Product Catalog, page 8.] {{webarchive|url=https://web.archive.org/web/20140313111749/http://www.skhynix.com/inc/pdfDownload.jsp?path=%2Fdownload%2Fproducts%2F1H11_Product_Catalog.pdf |date=2014-03-13 }} Accessed July 24, 2014.</ref><ref>[https://www.skhynix.com/products/graphics/view.jsp?info.ramKind=26&info.serialNo=H5GQ2H24AFR Hynix H5GQ2H24AFR Product Overview.] {{webarchive|url=https://web.archive.org/web/20140723083929/http://www.skhynix.com/products/graphics/view.jsp?info.ramKind=26&info.serialNo=H5GQ2H24AFR |date=2014-07-23 }} Accessed July 24, 2014.</ref> "2&nbsp;Gb" GDDR5 memory chips will enable graphics cards with 2&nbsp;GB or more of onboard memory with 224&nbsp;GB/s or higher peak bandwidth. On June 25, 2008, [[Advanced Micro Devices|AMD]] became the first company to ship products using GDDR5 memory with its [[Radeon R700#Radeon HD 4800|Radeon HD 4870]] [[video card]] series, incorporating Qimonda's 512&nbsp;Mb memory modules at 3.6&nbsp;Gbit/s bandwidth.<ref>[http://www.qimonda.com/about/press/releases/05_2008_GDDR5_AMD_e.html Qimonda Press Release]. May 21, 2008 {{webarchive |url=https://web.archive.org/web/20080916140737/http://www.qimonda.com/about/press/releases/05_2008_GDDR5_AMD_e.html |date=September 16, 2008 }}</ref><ref>[https://www.amd.com/gb-uk/Corporate/VirtualPressRoom/0,,51_104_543~126847,00.html AMD Press Release]. June 25, 2008</ref>

In June 2010, [[Elpida Memory]] announced the company's 2&nbsp;Gb GDDR5 memory solution, which was developed at the company's Munich Design Center. The new chip can work at up to 7&nbsp;GHz effective clock-speed and will be used in graphics cards and other high bandwidth memory applications.<ref>{{Cite web|title = Elpida Starts Making GDDR5 Graphics Memory, Delivers 2Gb Chip|url = http://news.softpedia.com/news/Elpida-Starts-Making-GDDR5-Graphics-Memory-Unveils-2Gb-Chip-145368.shtml|access-date = 2015-09-09|first = Sebastian|last = Pop}}</ref>

"4&nbsp;Gb" (4 × 1024<sup>3</sup> bit) GDDR5 components became available in the third quarter of 2013. Initially released by Hynix, [[Micron Technology]] quickly followed up with their implementation releasing in 2014. On February 20, 2013, it was announced that the [[PlayStation 4]] would use sixteen 4 [[Gigabit|Gb]] GDDR5 memory chips for a total of 8&nbsp;[[Gigabyte|GB]] of GDDR5 @ 176&nbsp;Gbit/s (CK 1.375&nbsp;GHz and WCK 2.75&nbsp;GHz) as combined system and graphics RAM for use with its [[AMD]]-powered [[system on a chip]] comprising 8 [[Jaguar (microarchitecture)|Jaguar cores]], 1152 [[Graphics Core Next|GCN]] shader processors and [[AMD TrueAudio]].<ref>{{cite web |url=http://techon.nikkeibp.co.jp/english/NEWS_EN/20130401/274313/?P=1 |title=Interview with PS4 system architect |date=2013-04-01}}</ref> Product teardowns later confirmed the implementation of 4 [[Gigabit|Gb]] based GDDR5 memory in the [[PlayStation 4]].<ref>{{Cite web|title = PlayStation 4 Teardown|url = https://www.ifixit.com/Teardown/PlayStation+4+Teardown/19493|access-date = 2015-09-09}}</ref><ref>{{Cite web|title = Sony PlayStation 4 Teardown : Board & Chip Shots and Images (Digital Home Teardown)|url = http://www.techinsights.com/sony-playstation-4/|website = www.techinsights.com|access-date = 2015-09-09|last = teardown.com|archive-date = 2015-10-02|archive-url = https://web.archive.org/web/20151002111214/http://www.techinsights.com/sony-playstation-4/|url-status = dead}}</ref>

In February 2014, as a result of its acquisition of Elpida, [[Micron Technology]] added 2 [[Gigabit|Gb]] and 4 Gb GDDR5 products into the company's portfolio of [[GDDR|graphics memory]] solutions.<ref>{{Cite web|title=Micron Technology, Inc.—GDDR5 {{!}} DRAM |url=http://www.micron.com/products/dram/gddr5 |website=www.micron.com |access-date=2016-09-06 |url-status=dead |archive-url=https://web.archive.org/web/20160320072251/https://www.micron.com/products/dram/gddr5 |archive-date=2016-03-20 }}</ref>

As of January 15, 2015, [[Samsung Electronics|Samsung]] announced in a press release that it had begun mass production of "8 [[Gigabit|Gb]]" (8 × 1024<sup>3</sup> bits) GDDR5 memory chips based on a 20&nbsp;nm [[fabrication process]]. To meet the demand of higher resolution displays (such as [[4K resolution|4K]]) becoming more mainstream, higher density chips are required in order to facilitate larger [[frame buffer]]s for graphically intensive computation, namely [[PC gaming]] and other [[3D rendering]]. Increased [[bandwidth (computing)|bandwidth]] of the new high-density modules equates to 8&nbsp;Gbit/s per pin × 170 pins on the [[ball grid array|BGA package]] x 32-bits per [[I/O scheduling|I/O cycle]], or 256&nbsp;Gbit/s effective bandwidth per chip.<ref>{{cite web |url=http://www.samsung.com/semiconductor/insights/news/13921|title=Samsung Electronics Starts Mass Producing Industry's First 8-Gigabit Graphics DRAM (GDDR5) |date=2015-01-15}}</ref>

On January 6, 2015, [[Micron Technology]] President Mark Adams announced the successful sampling of 8&nbsp;Gb GDDR5 on the company's fiscal Q1-2015 earnings call.<ref>{{Cite web|title = Micron Technology's (MU) CEO Mark Durcan on Q1 2015 Results—Earnings Call Transcript|url = http://seekingalpha.com/article/2802325-micron-technologys-mu-ceo-mark-durcan-on-q1-2015-results-earnings-call-transcript|website = Seeking Alpha|access-date = 2015-09-09}}</ref><ref>{{Cite web|title = Micron: We are sampling 8Gb GDDR5 for 8GB graphics cards|url = http://www.kitguru.net/components/graphic-cards/anton-shilov/micron-we-are-sampling-8gb-gddr5-chips-for-8gb-graphics-cards/|access-date = 2015-09-09}}</ref> The company then announced, on January 25, 2015, that it had begun commercial shipments of GDDR5 using a 20&nbsp;nm process technology.<ref>{{Cite web|title = Micron Technology's (MU) CEO Mark Durcan on Q3 2015 Results—Earnings Call Transcript|url = http://seekingalpha.com/article/3284965-micron-technologys-mu-ceo-mark-durcan-on-q3-2015-results-earnings-call-transcript|website = Seeking Alpha|access-date = 2015-09-09}}</ref><ref>{{Cite web|title = Micron begins commercial shipments of 20nm GDDR5 chips|url = http://www.kitguru.net/components/graphic-cards/anton-shilov/micron-begins-commercial-shipments-of-20nm-gddr5-chips/|access-date = 2015-09-09}}</ref><ref>{{Cite web|title = Micron delivers GDDR5 memory on 20 nm|url = http://www.hitechreview.com/it-products/pc/micron-delivers-gddr5-memory-on-20-nm/51252/|website = www.hitechreview.com|access-date = 2015-09-09}}</ref> The formal announcement of [[Micron Technology|Micron]]'s 8&nbsp;Gb GDDR5 appeared in the form of a [http://www.micron.com/about/blogs/2015/august/next-gen-graphics-products-get-extreme-speed-from-latest-graphics-memory-solutions blog post] {{Webarchive|url=https://web.archive.org/web/20150907013228/http://www.micron.com/about/blogs/2015/august/next-gen-graphics-products-get-extreme-speed-from-latest-graphics-memory-solutions |date=2015-09-07 }} by Kristopher Kido on the company's website September 1, 2015.<ref>{{Cite web|title = Micron Starts Shipping 8Gb GDDR5 Memory For Next Generation Graphics Cards {{!}} HotHardware|url = http://hothardware.com/news/micron-starts-shipping-8gb-gddr5-memory-for-next-generation-graphics-cards|access-date = 2015-09-09}}</ref><ref>{{Cite web|title = Micron Technology, Inc.—Next-Gen Graphics Products Get Extreme Speed From Latest Graphics Memory Solutions|url = http://www.micron.com/about/blogs/2015/august/next-gen-graphics-products-get-extreme-speed-from-latest-graphics-memory-solutions|website = www.micron.com|access-date = 2015-09-09|archive-date = 2015-09-07|archive-url = https://web.archive.org/web/20150907013228/http://www.micron.com/about/blogs/2015/august/next-gen-graphics-products-get-extreme-speed-from-latest-graphics-memory-solutions|url-status = dead}}</ref>

== GDDR5X ==

In January 2016, JEDEC standardized GDDR5X SGRAM.<ref>{{Cite web|url=https://www.jedec.org/news/pressreleases/jedec-announces-publication-gddr5x-graphics-memory-standard |publisher=JEDEC |title=JEDEC Announces Publication of GDDR5X Graphics Memory Standard |date=2016-01-26 |access-date=2016-02-10}}</ref> GDDR5X targets a transfer rate of 10 to 14&nbsp;Gbit/s per pin, twice that of GDDR5.<ref>{{cite web|title=JEDEC Publishes GDDR5X Specifications – Double the Bandwidth of GDDR5 With Lowered Power Consumption|url=http://wccftech.com/jedec-publishes-gddr5x-specification-double-bandwidth/|access-date=6 June 2016}}</ref> Essentially, it provides the memory controller the option to use either a double data rate mode that has a prefetch of 8n, or a quad data rate mode that has a prefetch of 16n.<ref name="MicronGDDR5X">{{Cite web | url=https://www.micron.com/~/media/documents/products/data-sheet/dram/gddr5/8gb_gddr5x_sgram_brief.pdf | title=GDDR5X SGRAM: MT58K256M32 – 16 Meg x 32 I/O x 16 banks, 32 Meg x 16 I/O x 16 banks | date=May 2016 | access-date=May 29, 2016 | publisher=[[Micron Technology]] | archive-date=February 7, 2017 | archive-url=https://web.archive.org/web/20170207162829/https://www.micron.com/~/media/documents/products/data-sheet/dram/gddr5/8gb_gddr5x_sgram_brief.pdf | url-status=dead }}</ref> GDDR5 only has a double data rate mode that has an 8n prefetch.<ref name="MicronGDDR5">{{Cite web | url=https://www.micron.com/~/media/documents/products/data-sheet/dram/gddr5/8gb_gddr5_sgram_brief.pdf | title=GDDR5 SGRAM: MT51J256M32 – 16 Meg x 32 I/O x 16 banks, 32 Meg x 16 I/O x 16 banks | date=November 2015 | access-date=May 29, 2016 | publisher=[[Micron Technology]] | archive-date=February 7, 2017 | archive-url=https://web.archive.org/web/20170207223245/https://www.micron.com/~/media/documents/products/data-sheet/dram/gddr5/8gb_gddr5_sgram_brief.pdf | url-status=dead }}</ref> GDDR5X also uses 190 pins per chip (190 [[Ball grid array|BGA]]).<ref name="MicronGDDR5X"/> By comparison, standard GDDR5 has 170 pins per chip; (170 [[Ball grid array|BGA]]).<ref name="MicronGDDR5"/> It therefore requires a modified [[Printed circuit board|PCB]]. QDR (quad data rate) may be used in reference to the write command clock (WCK) and ODR (Octal Data Rate) in reference to the command clock (CK).<ref>{{Cite web|url=https://www.anandtech.com/show/15978/micron-spills-on-gddr6x-pam4-signaling-for-higher-rates-coming-to-nvidias-rtx-3090|title=Micron Spills on GDDR6X: PAM4 Signaling For Higher Rates, Coming to NVIDIA's RTX 3090|first=Ryan|last=Smith|website=www.anandtech.com}}</ref>

===GDDR5X commercialization===
[[File:GDDR5X 1080ti.jpg|thumb|right|GDDR5X on the 1080 Ti]]
[[Micron Technology]] began sampling GDDR5X chips in March 2016,<ref>{{cite news |last1=Shilov |first1=Anton |title=Micron Begins to Sample GDDR5X Memory, Unveils Specs of Chips |url=https://www.anandtech.com/show/10193/micron-begins-to-sample-gddr5x-memory |access-date=16 July 2019 |work=[[AnandTech]] |date=March 29, 2016}}</ref> and began mass production in May 2016.<ref>{{cite news |last1=Shilov |first1=Anton |title=Micron Confirms Mass Production of GDDR5X Memory |url=https://www.anandtech.com/show/10316/micron-confirms-mass-production-of-gddr5x-memory |access-date=16 July 2019 |work=[[AnandTech]] |date=May 12, 2016}}</ref>

[[Nvidia]] officially announced the first graphics card using GDDR5X, the [[Pascal (microarchitecture)|Pascal]]-based [[GeForce 10 series|GeForce GTX 1080]] on May 6, 2016.<ref>{{cite web|url=http://nvidianews.nvidia.com/news/a-quantum-leap-in-gaming:-nvidia-introduces-geforce-gtx-1080|title=A Quantum Leap in Gaming: NVIDIA Introduces GeForce GTX 1080|first=NVIDIA|last=Newsroom|website=NVIDIA Newsroom Newsroom}}</ref> Later, the second graphics card to use GDDR5X, the Nvidia Titan X (Pascal) on July 21, 2016,<ref>{{cite web|url=https://blogs.nvidia.com/blog/2016/07/21/titan-x/|title=The New NVIDIA TITAN X: The Ultimate. Period. - The Official NVIDIA Blog|date=21 July 2016|website=nvidia.com}}</ref> the GeForce GTX 1080 Ti on February 28, 2017,<ref>{{cite web|url=http://nvidianews.nvidia.com/news/nvidia-introduces-the-beastly-geforce-gtx-1080-ti-fastest-gaming-gpu-ever|title=NVIDIA Introduces the Beastly GeForce GTX 1080 Ti -- Fastest Gaming GPU Ever|first=NVIDIA|last=Newsroom|website=NVIDIA Newsroom Newsroom}}</ref> and Nvidia Titan Xp on April 6, 2017.<ref>{{cite web|url=https://blogs.nvidia.com/blog/2017/04/06/titan-xp/|title=The New Titan Is Here: NVIDIA TITAN Xp - NVIDIA Blog|date=6 April 2017|website=nvidia.com}}</ref>

==See also==
* [[List of interface bit rates]]

==References==

{{Reflist|30em}}

==External links==
* [https://web.archive.org/web/20110720090920/http://www.elpida.com/pdfs/E1600E10.pdf Introduction To GDDR5 SGRAM(by ELPIDA)]
* [https://web.archive.org/web/20110707094741/http://cp.literature.agilent.com/litweb/pdf/5990-6130EN.pdf Making Accurate Measurements on GDDR5 Memory Systems]
* [http://www.interfacebus.com/GDDR5-Memory-IC-Pinout.html GDDR5 Pinout and Description]

{{DRAM}}
{{Graphics Processing Unit}}

{{DEFAULTSORT:Gddr5}}
[[Category:SDRAM]]
[[Category:South Korean inventions]]