Physical address

2025-01-05T19:40:58Z

103.97.2.161: /* Use by other devices */

{{About|computer memory addressing|the meaning in networking|MAC address|addresses of physical locations|Address}}
[[Image:Virtual address space and physical address space relationship.svg|thumb|300px|Diagram of relationship between the virtual and physical address spaces]]
In [[computing]], a '''physical address''' (also '''real address''', or '''binary address'''), is a [[memory address]] that is represented in the form of a [[binary number]] on the [[address bus]] circuitry in order to enable the [[Bus (computing)|data bus]] to access a ''particular'' storage cell of [[main memory]], or a register of [[memory-mapped I/O]] device.

==Use by central processing unit==
In a computer supporting [[virtual memory]], the term ''physical address'' is used mostly to differentiate from a ''[[virtual address space|virtual address]]''. In particular, in computers utilizing a [[memory management unit]] (MMU) to translate memory addresses, the virtual and physical addresses refer to an address before and after translation performed by the MMU, respectively.<ref>{{cite web
| url = http://cseweb.ucsd.edu/classes/su09/cse120/lectures/Lecture7.pdf
| title = Lecture 7: Memory Management
| work = CSE 120: Principles of Operating Systems
| year = 2009 | access-date = 2013-12-04
| author = Frank Uyeda | publisher = UC San Diego
}}</ref>

===Unaligned addressing===
Depending upon its underlying [[computer architecture]], the performance of a computer may be hindered by ''unaligned'' access to memory. For example, a [[16-bit computing|16-bit]] computer with a 16-bit memory data bus, such as [[Intel 8086]], generally has less [[computational overhead|overhead]] if the access is aligned to an even address. In that case fetching one 16-bit value requires a single memory read operation, a single transfer over a data bus.<ref name="lwn-alignment">{{cite web
| url = https://lwn.net/Articles/260832/
| title = Memory access and alignments
| date = 2007-12-04 | access-date = 2013-12-04
| author = Daniel Drake | publisher = [[LWN.net]]
}}</ref><ref>{{cite web
| url = https://www.kernel.org/doc/Documentation/unaligned-memory-access.txt
| title = Documentation/unaligned-memory-access.txt
| access-date = 2013-12-04
| author1 = Daniel Drake | author2 = Johannes Berg
| publisher = kernel.org
}}</ref>

If the 16-bit data value starts at an odd address, the processor may need to perform two memory read cycles to load the value into it, i.e. one for the low address (throwing away half of it) and then a second read cycle to load the high address (throwing away again half of the retrieved data). On some [[Processor (computing)|processors]], such as the [[Motorola 68000]] and [[Motorola 68010]] processors, and [[SPARC]] processors, unaligned memory accesses will result in an exception being raised (usually resulting in a software exception, such as [[POSIX]]'s [[SIGBUS]], being raised).<ref name="lwn-alignment" />

==Use by other devices==
{{expand section|date=January 2012}}

The [[direct memory access]] (DMA) feature allows other devices in the [[mother board]] besides the CPU to address the main memory. Such devices, therefore, also need to have a knowledge of physical addresses.

The [[memory-mapped I/O]] addresses are also physical addresses, which may be accessed by the [[device driver]]s in an operating system.

==See also==
* [[Address constant]]
* [[Addressing mode]]
* [[Address space]]
* [[Page address register]]
* [[Pointer (computer programming)]]
* [[Primary storage]], also known as ''main memory''
* [[Virtual memory]]
** [[Virtual address]], also known as [[logical address]]
** [[Page table]]
** [[Memory management unit]] (MMU)
* [[Gray code addressing]]

==References==
{{Reflist}}

{{Data types}}

[[Category:Computer memory]]
[[Category:Virtual memory]]
[[Category:Data types]]

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Physical address